DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 08/23/2023, 11/13/2023, 01/31/2024, 04/15/2024, 07/25/2024, 01/14/2025, and 03/18/2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Election/Restrictions
Applicant’s election without traverse of Invention I and Claims 1-15 in the reply filed on 03/18/2026 is acknowledged. Claims 16-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 03/18/2026.
Claim Objections
Claim 4 is objected to because of the following informalities:
Claim 4 recites “further comprising a passivation layer inserted between the PIC and the CMOS.”; this should be written as “further comprising a passivation layer inserted between the PIC and the CMOS wafer.”
Appropriate correction is required.
Claim 14 is objected to under 37 CFR 1.75 as being a substantial duplicate of claim 9. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 13 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 13 recites the limitation "the one or more photodetectors” in line 1. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Pinguet al. (US20120132993A1; hereinafter Pinguet) in view of Wang et al. (US20220003842A1; hereinafter Wang).
Regarding Claim 1, Pinguet discloses an electronic system (optoelectronic devices on a CMOS chip, [0029]) comprising:
a complementary metal-oxide semiconductor (CMOS) wafer (CMOS chip 130), FIG. 1A reproduced below, [0028];
a photonic integrated circuit (PIC) (electronic devices/circuits 131, the optical and optoelectronic devices 133) disposed on the CMOS wafer (CMOS chip 130, FIG. 1B, [0028], [0036]).
Pinguet also discloses a photonic integrated circuit (PIC) (CMOS photonics chip 450 including optical devices 420) disposed on the CMOS wafer (CMOS chip 460, FIG. 4D, [0091]).
the PIC including: first CMOS electronic circuits (analog and digital control circuits 109, and control sections 112A-112D) disposed on the CMOS wafer (chip 130) and configured to control high speed optical modulators 105A-105D, FIG. 1A, [0029]; and
second CMOS electronic circuits (photodiodes 111A-111D and TIA/LA 107A-107D) disposed on the CMOS wafer (130) and configured to amplify and process signals detected by the optical array, FIG. 1A, [0032].
Pinguet discloses the high speed photodiodes 111A-111D convert optical signals received from grating couplers 117A-117D into electrical signals, which are communicated to transimpedance amplifiers TIA/limiting amplifiers LA 107A-107D for amplification and processing.
PNG
media_image1.png
850
1117
media_image1.png
Greyscale
Pinguet: FIG. 1A
Pinguet does not explicitly disclose” an array of light emitters disposed on the CMOS wafer; an optical switch disposed on the CMOS wafer and coupled to the array of light emitters; an optical array disposed on the CMOS wafer and including a plurality of optical antennas having transmit and receive functions; a programmable optical network disposed on the CMOS wafer and configured to provide a light path from the optical switch to a selected optical antenna; first CMOS electronic circuits disposed on the CMOS wafer and configured to control the programmable optical network.”
In a similar art, Wang discloses a single chip LIDAR module [0003].
Pinguet discloses a photonic integrated circuit (PIC) (electronic devices/circuits
131, the optical and optoelectronic devices 133) disposed on the CMOS wafer (CMOS chip 130, FIG. 1B, [0028], [0036]).
Wang discloses: an array of light emitters (optical antennas 104) disposed on the photonic integrated circuit (PIC) chip 102, FIG. 1, [0083];
an optical switch (type I switch 818) disposed on the substrate 802 and coupled to the array of light emitters (optical antennae 806), FIG. 8, [0107];
an optical array (optical antennae 1006) disposed on the substrate 1002 and including a plurality of optical antennas (1006) having transmit and receive functions, FIG. 10 reproduced below, [0109].
Wang [0109] discloses that light source 1014 is distributed via the type I switches 1018 to the optical antennas 1006 to create a beam 1016, and the received light is gathered via the optical antennas 1006 towards the light detector 1024, thus optical array has both transmit and receive functions.
a programmable optical network (bus waveguide 1110 coupled with a main bus waveguide via a type I switch 1118) disposed on the substrate 1102 and configured to provide a light path from the optical switch (1118) to a selected optical antenna (1106), FIG. 11, [0111].
first CMOS electronic circuits (column contact controller 1404 and row contact controller 1406) disposed on the substrate 1402 and configured to control the programmable optical network (bus waveguide 1110 coupled with a main bus waveguide via a type I switch 1118), FIG. 14, [0115], [0116]; and
Wang [0115], [0116] discloses the system 1400 includes electronic circuits controller 1404 and row contact controller 1406. The column contact controller 1404c is enabled thereby turning ON selected or all switches associated with that column, and row contact controller 1406.3 is enabled, thereby turning ON the waveguide associated with that switch. The result includes turning ON optical switch 1408, enabling light 1410 to be emitted from a single optical switch of the array, controlling the routing of light through the programmable optical network, including bus waveguides 1110 and type I switches 1118.
PNG
media_image2.png
512
655
media_image2.png
Greyscale
Wang: FIG. 10
Wang discloses that a system as taught enables the implementation of simpler control electronics and improves reliability [0087]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Pinguet’s system in order to implement simpler control electronics and improve reliability as disclosed by Wang [0087].
Regarding Claim 2, The combination of Pinguet and Wang discloses the system of claim 1.
Pinguet discloses a photonic integrated circuit (PIC) (electronic devices/circuits 131, the optical and optoelectronic devices 133) disposed on the CMOS wafer (CMOS chip 130, FIG. 1B, [0028], [0036]).
Pinguet does not disclose “wherein the first CMOS electronic circuits are selected from the group consisting of digital addressing circuits, and micro-electro-mechanical system (MEMS) drivers.”
Wang discloses: wherein the first electronic circuits (column contact controller 1404 and row contact controller 1406) are selected from the group consisting of digital addressing circuits, and micro-electro-mechanical system (MEMS) drivers, [0115], [0116].
Wang [0015], [0116] discloses the MEMS switches are actuated by applying suitable voltages through column and row controllers 1404 and 1406, indicating the first electronic circuits are MEMS drivers.
Wang discloses that a system as taught including MEMS drivers can provide an optical switch that is compact and fast switching with high extinction ratio [0088]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Pinguet’s system in order to provide an optical switch which is compact and fast switching with high extinction ratio as disclosed by Wang [0088].
Regarding Claim 3, The combination of Pinguet and Wang discloses the system of claim 1.
Pinguet discloses: wherein the second CMOS electronic circuits (photodiodes 111A-111D and TIA/LA 107A-107D) are selected from the group consisting of trans-impedance amplifiers (TIA), multi-stage amplifiers, analog-to-digital converters (ADC), digital signal processing (DSP), and circuits to communicate with external systems, (trans-impedance amplifiers (TIA) and limiting amplifiers LA 107A-107D, FIG. 1A, [0029]).
Regarding Claim 11, The combination of Pinguet and Wang discloses the system of claim 1.
Pinguet discloses: wherein the PIC (electronic devices/circuits 131, the optical and optoelectronic devices 133) is directly fabricated on the CMOS wafer (CMOS chip 130), FIG. 1B, [0028], [0036].
Regarding Claim 12, The combination of Pinguet and Wang discloses the system of claim 1.
Pinguet discloses: further comprising one or more photodetectors (high-speed photodiodes 111A-111D, monitor photodiodes 113A-113H) disposed on the CMOS wafer (130), FIG. 1A, [0029].
Regarding Claim 13, The combination of Pinguet and Wang discloses the system of claim 1.
Pinguet discloses: wherein the one or more photodetectors comprise germanium photodetectors (deposition of germanium for integrated photodetectors on the SOI silicon wafers [0069]).
Claims 4 – 6, 8 – 10, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Pinguet in view of Wang, further in view of Piggot et al. (US20210257396A1; hereinafter Piggot).
Regarding Claim 4, The combination of Pinguet and Wang discloses the system of claim 1.
The combination of Pinguet and Wang does not disclose “further comprising a passivation layer inserted between the PIC and the CMOS.”
In a similar art, Piggot discloses an integrated photonic LiDAR [0044].
Piggot discloses: further comprising a passivation layer (oxides 632 and 633) inserted between the PIC (PIC layers 633-636) and the CMOS (EIC 630-632), FIG. 6, [0056].
Piggot [0056] discloses using the oxide layers 632 and 633 wafer bonding between the EIC 630-632 and PIC layers 633-636. The oxide layers 632 and 633 are interpreted as a passivation layer since they electrically isolate and separate the EIC and PIC layers.
Piggot discloses that a system as taught improves electrical isolation between the PIC and the CMOS chip and improves system performance [0046], [0056]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Pinguet and Wang’s system in order to improve electrical isolation between the PIC and the CMOS chip and improve system performance as disclosed by Piggot [0046], [0056].
Regarding Claim 5, The combination of Pinguet, Wang, and Piggot discloses the system of claim 4.
The combination of Pinguet and Wang does not disclose “wherein the passivation layer comprises silicon dioxide.”
Piggot discloses: wherein the passivation layer (oxides 632 and 633) comprises silicon dioxide, [0053], [0056]. Piggot [0056] discloses the layer 632 and 633 are oxides, and [0053] discloses the dielectric layer 412 is made of silicon dioxide, indicating the passivation layer (632 and 633) may comprise silicon dioxide.
Piggot discloses that a system as taught improves electrical isolation between the PIC and the CMOS chip and improves system performance [0046], [0056]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify the system in order to improve electrical isolation between the PIC and the CMOS chip and improve system performance as disclosed by Piggot [0046], [0056].
Regarding Claim 6, The combination of Pinguet, Wang, and Piggot discloses the system of claim 4.
Pinguet does not disclose “wherein the optical switch comprises a micro-electro-mechanical system (MEMS) switch.”
Wang discloses: wherein the optical switch (MEMS switch 600) comprises a micro-electro-mechanical system (MEMS) switch, FIG. 6, [0097]
Wang discloses that a system as taught including MEMS switch can be compact and fast switching with high extinction ratio [0088]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify the system in order to implement a switch which is compact and fast switching with high extinction ratio as disclosed by Wang [0088].
Regarding Claim 8, The combination of Pinguet, Wang, and Piggot discloses the system of claim 4.
The combination of Pinguet and Wang does not disclose “wherein the passivation layer is configured to provide a lower cladding layer for the PIC to reduce optical loss.”
Piggot discloses: wherein the passivation layer (632 and 633) is configured to provide a lower cladding layer for the PIC (633-636) to reduce optical loss, FIG. 6, [0049], [0056].
Piggot [0049] discloses the dielectric layers in the wiring stack absorbs, scatters, and deflects light and that the optical performance may be improved, indicating the oxide layers 632 and 633 between the PIC and the CMOS circuitry, may be configured to provide a lower cladding layer for the PIC to reduce optical loss.
Piggot discloses that a system as taught improves electrical isolation between the PIC and the CMOS chip and improves optical performance [0049], [0056]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify the system in order to improve electrical isolation between the PIC and the CMOS chip and improve optical performance as disclosed by Piggot [0049], [0056].
Regarding Claim 9, The combination of Pinguet and Wang discloses the system of claim 1.
The combination of Pinguet and Wang does not disclose “further comprising a semiconductor optical amplifier (SOA) integrated on the PIC.”
Piggot discloses: further comprising a semiconductor optical amplifier (SOA) (optical amplifier 904 may be a semiconductor optical amplifier) integrated on the PIC, FIG. 9, [0065].
Piggot [0065] discloses a LiDAR system with the transmitter 901 monolithically integrated into a single PIC which includes an optical amplifier 904, which may be a SOA, indicating the SOA is integrated on the PIC.
Piggot discloses that a system as taught improves optical power and improves system performance [0065]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Pinguet and Wang’s system to improve optical power and system performance as disclosed by Piggot [0065].
Regarding Claim 10, The combination of Pinguet and Wang disclose the system of claim 1.
The combination of Pinguet and Wang does not disclose “wherein the PIC is fabricated on a handle wafer and attached to the CMOS wafer.”
Piggot discloses: wherein the PIC (633-636) is fabricated on a handle wafer (handle wafer 636) and attached to the CMOS wafer (630-632), FIG. 6, [0056].
Piggot discloses that a system as taught including a handle wafer provides support during fabrication [0056]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Pinguet and Wang’s system to include a handle wafer in order to provide support during fabrication as disclosed by Piggot [0056].
Regarding Claim 14, The combination of Pinguet and Wang discloses the system of claim 1.
The combination of Pinguet and Wang does not disclose “further comprising a semiconductor optical amplifier (SOA) integrated on the PIC.”
Piggot discloses: further comprising a semiconductor optical amplifier (SOA) (optical amplifier 904 may be a semiconductor optical amplifier) integrated on the PIC, FIG. 9, [0065].
Piggot [0065] discloses a LiDAR system with the transmitter 901 monolithically integrated into a single PIC which includes an optical amplifier 904, which may be a SOA, indicating the SOA is integrated on the PIC.
Piggot discloses that a system as taught improves optical power and improves system performance [0065]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Pinguet and Wang’s system to improve optical power and system performance as disclosed by Piggot [0065].
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Pinguet in view of Wang, further in view of Piggot, still further in view of Peczalski et al. (US20100140670A1; hereinafter Peczalski).
Regarding Claim 7, The combination of Pinguet, Wang, and Piggot discloses the system of claim 6.
The combination of Pinguet, Wang, and Piggot does not disclose “wherein the passivation layer is configured to protect the first and second CMOS electronic circuits from a release etch performed during manufacturing to free up the MEMS switch”
In a similar art, Peczalski discloses a CMOS process integrated with a MEMS fabrication process [0014].
Peczalski discloses: wherein the passivation layer (150) is configured to protect the first and second CMOS electronic circuits (CMOS circuitry 135, 140, 145, FIG.1 [0018]) from a release etch performed during manufacturing to free up the MEMS switch (step 1012: HF: water etch to release MEMS structure, FIG. 10, [0026]).
Peczalski discloses that a system as taught protects the CMOS circuitry and improves reliability and manufacturability of the system [0018], [0026]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Pinguet, Wang, and Piggot’s system in order to protect the CMOS circuitry and improve reliability and manufacturability of the system as disclosed by Peczalski [0018], [0026].
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Pinguet in view of Wang, further in view of Piggot, still further in view of Fiorentino et al. (US20180122785A1; hereinafter Fiorentino).
Regarding Claim 15, The combination of Pinguet, Wang, and Piggot discloses the system of claim 14.
The combination of Pinguet and Wang does not disclose “further comprising an integrated laser formed on the PIC with the SOA and an optical cavity.”
Piggot discloses: further comprising an integrated laser (laser source 902) formed on the PIC with the SOA (optical amplifier 904), FIG. 9, [0065].
Piggot [0065] discloses a LiDAR system with the transmitter 901 monolithically integrated into a single PIC which includes a laser source 902 with a laser driver and a semiconductor optical amplifier 904, but does not explicitly disclose an optical cavity.
In a similar art, Fiorentino discloses an assembly including a silicon photonics wafer and a CMOS wafer [0032].
Fiorentino discloses: further comprising an integrated laser (DBG semiconductor laser 400) bonded to the PIC (300) with the SOA (an active layer 420) and an optical cavity (laser cavity 630), FIG. 18, [0106], [0107].
Fiorentino discloses that a system as taught including a laser with an optical cavity improves optical performance [0107]. Therefore, it would have been obvious to one having an ordinary skill in the art before the effective filing date of the claimed invention to modify Pinguet, Wang, and Piggot’s system in order to improve optical performance as disclosed by Fiorentino [0107].
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Krishna J Palaniswamy whose telephone number is (571)272-6239. The examiner can normally be reached Monday - Friday 8:30AM - 5PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at 408-918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Krishna J. Palaniswamy/Examiner, Art Unit 2899
/ZANDRA V SMITH/Supervisory Patent Examiner, Art Unit 2899
Prosecution Insights