DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to amendment
2. This Office Action is in response to Amendment filed on 03/04/2026
Specification
The specification has been amended on 03/04/2026 and the specification objection mailed on01/18/2024 has been withdrawn.
Claims
Claims 1, 8-9, 12 and 17 have been amended.
Claims 2-7, 10-11, 13-16 and 18-20 have been remained
Claims 1-20 are currently pending in the application.
Response to Arguments
3. Applicant's arguments filed 03/04/2026 have been fully considered but they are notpersuasive.
Information Disclosure Statement
4. The office acknowledges receipt of the following items from the applicant:
Information Disclosure Statement (IDS) filed on 03/04/2026.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
5. Claims 1-2, 4, 7, 9-13, 15 and 20 are rejected under 35 U.S.C. 103(a) as being unpatentable over CHEN et al., hereafter “CHEN” (U.S. Publication No. 2018/0096949 A1) in view of HUANG J (CN-1761381-A).
Regarding claim 1, CHEN discloses an electronic package for mounting to a circuit board (110), the electronic package comprising:
a substrate (122) having a first side (lower side) and a second side (upper side);
a first electronic module (104) mounted to the first side (lower side) of the substrate (122);
a first mold structure (105) extending over at least part of the first side (lower side) of the substrate (122); and
a group of through-mold connections (106) that are electrically conductive and provided on the first side (lower side) of the substrate (122), the first mold structure (105) substantially encapsulating the group of through-mold connections (106), the group of through-mold connections (106) exposed through the first mold structure (105), and the group of through-mold connections (106) configured to couple to a circuit board (110) by a corresponding group of intermediate solder portions (116), the intermediate solder portions (116) extending from exposed surfaces of through-mold connections (106) beyond the first mold structure (105) in a direction toward the circuit board (110) (Fig. 3 and para [0072]-[0075]).
CHEN discloses the features of the claimed invention as discussed above, but does not disclose the through-mold connections having a melting point in excess of a melting point of the intermediate solder portions.
HUANG J, however, discloses the through-mold connections (3/6) having a melting point in excess of a melting point of the intermediate solder portions (9a/10a) (Fig. 5 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHEN to provide the through-mold connections having a melting point in excess of a melting point of the intermediate solder portions as taught by HUANG J for a purpose of improving food electrical connections for the electronic package.
Regarding claim 2, CHEN and HUANG J (citations to CHEN unless otherwise noted) discloses in which an outer surface of the first mold structure (105) is free of any moat or channel circumscribing and adjacent to each of the through- mold connections (106) (Fig. 3).
Regarding claim 4, CHEN and HUANG J (citations to CHRN unless otherwise noted) discloses in which at least one of the group of through- mold connections (106) is directly fused to a corresponding electrically conductive node (116) provided on or embedded in the substrate (122) (Fig. 3).
Regarding claim 7, CHEN and HUANG J (citations to CHRN unless otherwise noted) discloses further comprising the corresponding group of intermediate solder portions (116), each intermediate solder portion (116) directly fused to an end face of a corresponding one of the group of through-mold connections (106) (Fig. 3).
Regarding claim 9, CHEN discloses an electronic assembly, the electronic assembly comprising:
a circuit board (110);
a group of intermediate solder portions (116); and
an electronic package (100) mounted to the circuit board (110), the electronic package (100) including a substrate (122) having a first side (lower side) and a second side (upper side), a first electronic module (104) mounted to the first side (lower side) of the substrate (122), a first mold structure (105) extending over at least part of the first side (lower side) of the substrate (122), and a group of through-mold connections (106) that are electrically conductive and provided on the first side (lower side) of the substrate (122), each intermediate solder portion of the group of intermediate solder portions (116) coupled to the circuit board (110) by way of a respective through-mold connection of the group of through-mold connections (106), the first mold structure (105) substantially encapsulating the group of through- mold connections (106), the group of through-mold connections (106) exposed through the first mold structure (105), the group of intermediate solder portions (116) being in physical contact with the exposed surfaces of the through-mold connections (106) and protruding above an outer surface of the first mold structure (105) (Fig. 3 and para [0072]-[0075]).
CHEN discloses the features of the claimed invention as discussed above, but does not disclose the group of through-mold connections having a melting point in excess of a melting point of the group of intermediate solder portions.
HUANG J, however, discloses the group of through-mold connections (3/6) having a melting point in excess of a melting point of the group of intermediate solder portions (9a/10a) (Fig. 5 and English Text).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHEN to provide the group of through-mold connections having a melting point in excess of a melting point of the group of intermediate solder portions as taught by HUANG J for a purpose of improving food electrical connections for the electronic package.
Regarding claim 10, CHEN and HUANG J (citations to CHRN unless otherwise noted) discloses in which each intermediate solder portion of the group of intermediate solder portions (116) is directly fused to an end face of a corresponding one of the group of through-mold connections (106) (Fig. 3).
Regarding claim 11, CHEN and HUANG J (citations to CHRN unless otherwise noted) discloses in which the end face (of the group of through-mold connections (106)) is substantially flush with an outer surface of the first mold structure (105) (Fig. 3).
Regarding claim 12, CHEN and HUANG J (citations to CHRN unless otherwise noted) discloses in which the group of intermediate solder portions (116) protrude above an outer surface of the first mold structure (105) (Fig. 3).
Regarding claim 13, CHEN and HUANG J (citations to CHRN unless otherwise noted) discloses in which an outer surface of the first mold structure (105) is free of any moat or channel circumscribing and adjacent to each of the through- mold connections (106) (Fig. 3).
Regarding claim 15, CHEN and HUANG J discloses the features of the claimed invention as discussed above, but does not disclose in which the melting point of the through- mold connections exceed the melting point of the intermediate solder portions by at least 10 degrees Celsius.
However, the selection of the claimed device parameters would have been obvious to one having ordinary skill in the art before the effective filing date was made to provide the melting point of the through- mold connections exceeds the melting point of the intermediate solder portions by at least 10 degrees Celsius, since it is well settle that when the general conditions of a claim are discloses in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 20, CHEN and HUANG J (citations to CHEN unless otherwise noted) discloses in which the electronic package (100) is a dual-sided electronic package (Fig. 3 and para [0075]).
6. Claim 3 is rejected under 35 U.S.C. 103(a) as being unpatentable over CHEN and HUANG J in view of YOO (Publication No. 2020/0118992 A1).
Regarding claim 3, CHEN and HUANG J disclose the features of the claimed invention as discussed above, but does not disclose in which the through-mold connection is formed of an alloy including tin and antimony.
YOO, however, discloses the through-mold connection is (580) formed of an alloy including tin and antimony (Fig. 10 and para [0089]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHEN and HUANG J to provide in which the through-mold connection is formed of an alloy including tin and antimony as taught by YOO for a purpose of providing welding more easier for the electronic package.
7. Claims 5-6 are rejected under 35 U.S.C. 103(a) as being unpatentable over CHEN and HUANG J in view of Yu et al., hereafter “Yu” (Publication No. 2020/0152587 A1).
Regarding claim 5, CHEN and HUANG J disclose the features of the claimed invention as discussed above, but does not disclose in which the through-mold connection is formed of a non-solder material.
Yu, however, discloses in which the through-mold connection is formed of a non-solder material (para [0047]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHEN and HUANG J to provide the through-mold connection is formed of a non-solder material as taught by Yu for a purpose of improving thermomechanical characteristics for the electronic package.
Regarding claim 6, CHEN, HUANG J and YOO (citations to CHRN unless otherwise noted) discloses in which at least one of the group of through- mold connections (106) is integrally formed as a single unitary piece with a corresponding electrically conductive node (116) provided on or embedded in the substrate (122) (Fig. 3).
8. Claims 14 is rejected under 35 U.S.C. 103(a) as being unpatentable over CHEN and HUANG J in view of IRISAWA A (WO-201525855).
Regarding claim 14, CHEN and HUANG J disclose the features of the claimed invention as discussed above, but does not disclose in which the through-mold connections are formed of an alloy, the alloy configured to have a solidus temperature greater than a liquidus temperature of the intermediate solder portions.
IRISAWA A, however, discloses solder alloy of this embodiment has, for example, a solidus temperature that is a melting start temperature of 220 ° C. to 240 ° C., preferably 230 ° C. to 236 ° C., and a liquidus temperature that is a solidification start temperature of 221 ° C. to 250 ° C. The range is preferably 230 ° C to 245 ° C (see English Text).
However, the selection of the claimed device parameters would have been obvious to one having ordinary skill in the art before the effective filing date was made to provide the through-mold connections are formed of an alloy, the alloy configured to have a solidus temperature greater than a liquidus temperature of the intermediate solder portions, since it is well settle that when the general conditions of a claim are discloses in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
9. Claims 16 is rejected under 35 U.S.C. 103(a) as being unpatentable over CHEN and HUANG J in view of Yoo (U.S Publication No. 2020/0118992 A1).
Regarding claim 16, CHEN and HUANG J disclose the features of the claimed invention as discussed above, but does not disclose in which the through-mold connections are formed of an alloy including tin and antimony.
Yoo, however, discloses in which the through-mold connections (580) are formed of an alloy including tin and antimony (Fig. 10 and para [0089]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHEN and HUANG J to provide the through-mold connections are formed of an alloy including tin and antimony as taught by Yoo for a purpose of having welding more easier for the electronic assembly.
10. Claims 17 is rejected under 35 U.S.C. 103(a) as being unpatentable over CHEN, HUANG J and Yoo in view of IRISAWA A (WO-201525855).
Regarding claim 17, CHEN, HUANG J and Yoo disclose the features of the claimed invention as discussed above, but does not disclose in which the alloy has a solidus temperature of at least 240 degrees Celsius.
IRISAWA A, however, discloses in which the alloy has a solidus temperature of at least 240 degrees Celsius (see English Text).
However, the selection of the claimed device parameters would have been obvious to one having ordinary skill in the art before the effective filing date was made to provide the alloy is has a solidus temperature is within the claimed range, since it is well settle that when the general conditions of a claim are discloses in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
11. Claims 18-19 are rejected under 35 U.S.C. 103(a) as being unpatentable over CHEN and HUANG J in view of Yu et al., hereafter “Yu” (Publication No. 2020/0152587 A1).
Regarding claim 18, CHEN and HUANG J disclose the features of the claimed invention as discussed above, but does not disclose in which the through-mold connection is formed of a non-solder material.
Yu, however, discloses in which the through-mold connection is formed of a non-solder material (para [0047]).
It would have been obvious to one having ordinary skilled in the art before the effective filing date of the claimed invention to modify the teaching of CHEN and HUANG J to provide the through-mold connection is formed of a non-solder material as taught by Yu for a purpose of improving thermomechanical characteristics for the electronic package.
Regarding claim 19, CHEN, HUANG J and YOO (citations to CHRN unless otherwise noted) discloses in which at least one of the group of through- mold connections (106) is integrally formed as a single unitary piece with a corresponding electrically conductive node (116) provided on or embedded in the substrate (122) (Fig. 3).
12. Claim 8 is rejected under 35 U.S.C. 103(a) as being unpatentable over CHEN et al., hereafter “CHEN” (U.S. Publication No. 2018/0096949 A1) in view of JP’407 (JP-3689407-B2) and further in view of IRISAWA A (WO-2015125855-A).
Regarding claim 8, CHEN discloses an electronic package for mounting to a circuit board, the electronic package comprising:
a substrate (122) having a first side (lower side) and a second side (upper side);
a first electronic module (104) mounted to the first side (lower side) of the substrate (122);
a first mold structure (105) extending over at least part of the first side (lower side) of the substrate (122); and
a group of through-mold connections (106) that are electrically conductive and provided on the first side (lower side) of the substrate (122), the first mold structure (105) substantially encapsulating the group of through-mold connections (106), the group of through-mold connections (106) exposed through the first mold structure (105); and at least one of the group of through- mold connections directly fused to a corresponding electrically conductive node provided on or embedded in the substrate (Fig. 3 and para [0072]-[0075]).
CHEN discloses the features of the claimed invention as discussed above, but does not disclose in which the through-mold connections are formed of an alloy including 95% by weight of tin and 5% by weight of antimony.
JP’407, however, discloses in which the through-mold connections (refers solder balls (16)) are formed of an alloy including 10% by weight of antimony rather than 15% by weight of antimony. As a result, the preferred antimony weight percent in the tin-antimony alloy is about 5-10%, or about 3-10% (Fig. 1 and English Text).
However, the selection of the claimed device parameters would have been obvious to one having ordinary skill in the art before the effective filing date was made to provide the alloy including 95% by weight of tin and 5% by weight of antimony as claimed (Note: If the antimony is about 5%, the tin in the tin-antimony alloy of the solder balls will be 95% by weight of tin), since it is well settles that when the general conditions of a claim are discloses in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
CHEN and JP’407 disclose the features of the claimed invention as discussed above, but does not disclose in which the alloy is has a solidus temperature of at least 240 degrees Celsius.
IRISAWA A, however, discloses in which the alloy is has a solidus temperature of at least 240 degrees Celsius (see English Text).
However, the selection of the claimed device parameters would have been obvious to one having ordinary skill in the art before the effective filing date was made to provide the alloy is has a solidus temperature is within the claimed range, since it is well settles that when the general conditions of a claim are discloses in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Conclusion13. Applicant’s amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information14. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Phuc T. Dang whose telephone number is (571) 272-1776. The examiner can normally be reached on M-F (9-6:00pm). If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Choi, can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 703-872-9306.
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/PHUC T DANG/Primary Examiner, Art Unit 2897
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