DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 23 June 2026 has been entered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5, 8-10, and 12-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kwon (US 2019/0355667).
Regarding claim 1, Kwon discloses a method for mounting an electronic package (10) to a circuit board (600, Figure 3, considered a circuit board because 600 comprises a plurality of insulating layers and conductive traces therein, see para. [0046], which is the structure of a circuit board), the method comprising:
providing an electronic package (10), the electronic package (10) including a substrate (100) having a first side (upper side) and a second side (lower side), a first electronic module (210) mounted to the first side (upper side) of the substrate (100, see Figure 3), a first mold structure (500) extending over at least part of the first side (upper side) of the substrate (100, see Figure 3), and a group of through-mold connections (400) that are electrically conductive (“conductive structure” 400, para. [0047], “may include at least one selected from metals, for example, copper, aluminum, gold, lead, stainless steel, iron, and alloys thereof”) and provided on the first side (upper side) of the substrate (100, see Figure 3), the group of through-mold connections (400) being flush with an outer surface of the first mold structure (500, the outer surface of the first mold structure being the left and right side surfaces of 500 in direct physical contact with the right and left side surfaces of 410 and 420, respectively, where “flush” is interpreted to mean “directly abutting or immediately adjacent” according to a definition of flush by Merriam-Webster, these surfaces are directly abutting each other thus are considered being flush with each other) and exposed through the first mold structure (500, see upper and lower surfaces of the through-mold connections 400 that are not in direct physical contact with the mold structure 500, thus are exposed through the mold structure 500, see Figure 3), the first mold structure (500) at least partly encapsulating the first electronic module (210, see Figure 3);
providing a circuit board (600, see Figure 3, para. [0068]); and
mounting the electronic package (10) to the circuit board (600) by use of a group of intermediate solder portions (452, connected to upper surfaces of each through-mold connections 400, because the through-mold connections 400 are connected to the circuit board through the group of intermediate solder portions 452, the intermediate solder portions are considered as being used to mount to package 10 to the circuit board 600) such that each intermediate solder portion (452) of the group of intermediate solder portions (452) couples a corresponding through-mold connection (400) of the group of through-mold connections (400) to the circuit board (600, see Figure 3), the intermediate solder portions (452) protruding from the outer surface of the first mold structure (500, outer surfaces are the left and right side surfaces of 500 in contact with the right and left side surfaces of 410 and 420, respectively, and the intermediate solder portion 452 have a thickness in the vertical direction with a lower surface in contact with the edge of the outer surface of the mold structure, thus protrude and extend vertically from the outer surface of the mold structure 500), the through-mold connections (400) having a melting point in excess of a melting point of the intermediate solder portions (452, see para. [0048] which discloses that the through-mold connections 400 have a higher melting point than that of the intermediate solder portions 452).
Regarding claim 2, Kwon discloses the mounting the electronic package (10) to the circuit board (600) comprises fusing each intermediate solder portion (452) directly to an end face of a corresponding one of the group of through-mold connections (400, para. [0093] discloses a soldering method of melting, i.e. reflowing, the intermediate solder portions 452 on the through-mold connections 400, which would comprise fusing the intermediate solder portions 452 to the though-mold connections 400).
Regarding claim 3, Kwon discloses the mounting the electronic package (10) to the circuit board (600) comprises performing a reflow operation (melting intermediate solder portions 452, see para. [0093]) that reflows each intermediate solder portion (452) directly to an end face of a corresponding one of the through-mold connections (400, see Figures 3, 7A, and para. [0093]).
Regarding claim 4, Kwon discloses that performing the reflow operation (melting, para. [0093]) includes applying heat sufficient to liquify the intermediate solder portions (452, see para. [0093] which discloses that intermediate solder portions 452 are heated to their melting point) in preference to the through-mold connections (400, para. [0048] discloses that the melting point of through-mold connections 400 is greater than that of the intermediate solder portions 452, and since the temperature applied is the melting point of the intermediate solder portions 452, the intermediate solder portions 452 are liquified in preference to the through-mold connections 400).
Regarding claim 5, Kwon discloses that performing the reflow operation (melting, para. [0093]) includes controlling the application of heat so as to avoid liquification of the through-mold connections (400) during the reflow operation (para. [0093] discloses that the temperature applied is the melting temperature of the intermediate solder portions 452, which is lower than that of the through-mold connections, thus liquification of the through-mold connections 400 is avoided, and the through-mold connections are disclosed as keeping their shape during the heat treatment, i.e. reflow/melting, process).
Regarding claim 8, Kwon discloses that performing the reflow operation (melting, para. [0093]) comprises controlling the application of heat such that the through-mold connection (400) remains wholly or partially in a solid phase throughout the reflow operation (para. [0093] discloses that the through-mold connections 400 keep their shape during the heat treatment, i.e. reflow/melting, process and that the heat treatment process is performed at the melting point of the intermediate solder portions 452 which is less than that of the through-mold connections 400).
Regarding claim 9, Kwon discloses that an outer surface of the first mold structure (500) is free of any moat or channel circumscribing and adjacent to each of the through-mold connections (400, see Figure 3 which shows flat surfaces of the molding structure 500 around the through-mold connections 400).
Regarding claim 10, Kwon discloses that the through-mold connections (400) are formed of an alloy (see para. [0047]), the alloy having a solidus temperature greater than a liquidus temperature of the intermediate solder portions (452, the melting point of the intermediate solder portions is less than that of the though-mold connections 400).
Regarding claim 12, Kwon discloses that the through-mold connections (400) are formed of a metallic material (see metallic materials for through-mold connections 400 listed in para. [0047]).
Regarding claim 13, Kwon discloses that the through-mold connections (400) are formed of a solder material (example solder materials for through-mold connections 400 are listed in para. [0047]).
Regarding claim 14, Kwon discloses that the solder material (para. [0047]) is free of lead (while lead is listed as a possible solder materials used for through-mold connections 400, other possible metals/alloys may be used as well, see para. [0047]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 11 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Kwon as applied to claim 1 above, and further in view of Ishii (US 2023/0223317).
Regarding claim 11, Kwon does not disclose that the melting point of the through-mold connections exceeds the melting point of the intermediate solder portions by at least 10 degrees Celsius.
Ishii discloses through-mold connections (41/42, see Figure 4, extending through mold 9) where the melting point of the through-mold connections exceeds the melting point of the intermediate solder portions (module bonding material 10) by at least 10 degrees Celsius (see para. [0056], a temperature difference of 30 degrees Celsius is disclosed).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Ishii into the teachings of Kwon to include a melting point difference between the through-mold connections and the intermediate solder portions for the purpose of utilizing a material with a high melting point, for the through-mold connections, in order to avoid remelting of said material during subsequent heating/bonding processes during manufacture (Ishii, para. [0056]).
Regarding claim 15, Kwon does not disclose that the through-mold connection is formed of an alloy including tin and antimony.
Ishii discloses an alloy used for through-mold connections (41/42, see Figure 4 which shows the connections 41/42 extend through the mold material 9 to connect different elements of the device) including tin and antimony (see para. [0056]).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Ishii into the teachings of Kwon to include a tin and antimony alloy material for the through-mold connections for the purpose of utilizing a material with a high melting point in order to avoid remelting of said material during subsequent heating/bonding processes during manufacture (Ishii, para. [0056]). Additionally, the selection of a known material based on its suitability for its intended purpose is prima facie obvious, see MPEP 2144.07 and Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945).
Regarding claim 16, Kwon does not disclose that the alloy has a solidus temperature of at least 240 degrees Celsius.
Ishii discloses an alloy used for through-mold connections (41/42, see Figure 4 which shows the connections 41/42 extend through the mold material 9 to connect different elements of the device) includes tin and antimony (see para. [0056]), and that the alloy has a solidus temperature of at least 240 degrees Celsius (para. [0056] discloses that the liquidus temperature of the tin/antimony alloy of the through-mold connections 41/42 is about 240 degrees Celsius, thus the solidus temperature is at least 240 degrees Celsius).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Ishii into the teachings of Kwon to include a tin and antimony alloy material for the through-mold connections having a solidus temperature of at least 240 degrees Celsius for the purpose of utilizing a material with a high melting point in order to avoid remelting of said material during subsequent heating/bonding processes during manufacture (Ishii, para. [0056]). Additionally, the selection of a known material based on its suitability for its intended purpose is prima facie obvious, see MPEP 2144.07 and Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945).
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Kwon as applied to claim 1 above, and further in view of Kolan et al. (“Kolan” US 2010/0109169).
Regarding claim 22, Kwon does not disclose wherein a surface of the first electronic module is exposed through the first mold structure.
Kolan teaches, however, a surface of a first electronic module (160, upper surface) is exposed through the first mold structure (190, see Figure 2(G)).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Kolan into the teachings of Kwon to include the exposed surface of the first electronic module for the purpose of increasing heat dissipation (Kolan, para. [0077]).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Kwon (US 2019/0355667) and Ishii (US 2023/0223317).
Regarding claim 19, Kwon discloses a method for mounting an electronic package (10) to a circuit board (600, Figure 3, considered a circuit board because 600 comprises a plurality of insulating layers and conductive traces therein, see para. [0046], which is the structure of a circuit board), the method comprising:
providing an electronic package (10), the electronic package (10) including a substrate (100) having a first side (upper side) and a second side (lower side), a first electronic module (210) mounted to the first side (upper side) of the substrate (100, see Figure 3), a first mold structure (500) extending over at least part of the first side (upper side) of the substrate (100, see Figure 3), and a group of through-mold connections (400) that are electrically conductive (“conductive structure” 400, para. [0047], “may include at least one selected from metals, for example, copper, aluminum, gold, lead, stainless steel, iron, and alloys thereof”) and provided on the first side (upper side) of the substrate (100, see Figure 3), the group of through-mold connections (400) being flush with an outer surface of the mold structure (500, the outer surface of the first mold structure being the left and right side surfaces of 500 in direct physical contact with the right and left side surfaces of 410 and 420, respectively, where “flush” is interpreted to mean “directly abutting or immediately adjacent” according to a definition of flush by Merriam-Webster, these surfaces are directly abutting each other thus are considered being flush with each other) and exposed through the first mold structure (500, see upper and lower surfaces of the through-mold connections 400 that are not in direct physical contact with the mold structure 500, thus are exposed through the mold structure 500, see Figure 3), the first mold structure (500) at least partly encapsulating the first electronic module (210, see Figure 3);
providing a circuit board (600, see Figure 3, para. [0068]) configured to receive the electronic package (10, see Figure 3, the circuit board 600 is bonded to, or receives, the electronic package 10); and
mounting the electronic package (10) to the circuit board (600) by use of a group of intermediate solder portions (452, connected to upper surfaces of each through-mold connections 400, because the through-mold connections 400 are connected to the circuit board through the group of intermediate solder portions 452, the intermediate solder portions are considered as being used to mount the package 10 to the circuit board 600) such that each intermediate solder portion of the group of intermediate solder portions (452) couples a corresponding through-mold connection (400) of the group of through-mold connections (400, see Figure 3) to the circuit board (600, see Figure 3), the intermediate solder portions (452) protruding from the outer surface of the first mold structure (500, outer surfaces are the side surfaces in contact with the right and left side surfaces of 410 and 420, respectively, and the intermediate solder portion 452 have a thickness in the vertical direction with a lower surface in contact with the edge of the outer surface of the mold structure, thus protrude and extend vertically from the outer surface of the mold structure 500), the through-mold connections (400) formed of an alloy (see para. [0047]), the alloy (para. [0047]) having a solidus temperature greater than a liquidus temperature of the intermediate solder portions (452, see para. [0048] which discloses that the through-mold connections 400 have a higher melting point than that of the intermediate solder portions 452).
Kwon does not disclose that the alloy used for the through-mold connections includes tin and antimony.
Ishii discloses an alloy used for through-mold connections (41/42, see Figure 4 which shows the connections 41/42 extend through the mold material 9 to connect different elements of the device) including tin and antimony (see para. [0056]).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Ishii into the teachings of Kwon to include a tin and antimony alloy material for the through-mold connections for the purpose of utilizing a material with a high melting point in order to avoid remelting of said material during subsequent heating/bonding processes during manufacture (Ishii, para. [0056]). Additionally, the selection of a known material based on its suitability for its intended purpose is prima facie obvious, see MPEP 2144.07 and Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945).
Claims 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Elsherbini et al. (“Elsherbini” US 2022/0406751) and Ishii (US 2023/0223317).
Regarding claim 20, Elsherbini discloses a method for mounting an electronic package to a circuit board (Figures 2 and 6), the method comprising:
providing an electronic package (100 and 602, see Figures 2 and 6, where Figure 2 shows the structure immediately surrounding the dies/electronic module 110 and Figure 6 shows the structure, i.e. the interposer/substrate 602 and circuit board 212, on which the die structure is mounted, see also para. [0064]-[0065] which discloses that the package 100 of Figure 2 may be used in the package of Figure 6), the electronic package including a substrate (602) having a first side (upper side) and a second side (lower side), a first electronic module (110, Figure 2) mounted to the first side of the substrate (602, see Figure 6), a first mold structure (208) extending over at least part of the first side of the substrate (602, see Figures 2 and 6), and a group of through-mold connections (122) that are electrically conductive (para. [0041]) and provided on the first side of the substrate (upper side, see Figure 6), the group of through-mold connections (122) being flush with an outer surface of the first mold structure (208, lower surface in Figure 2, the lower surfaces form a flush surface) and exposed through the first mold structure (see Figure 2), the first mold structure (208) at least partly encapsulating the first electronic module (110, see Figure 2);
providing a circuit board (212, see Figure 6); and
mounting the electronic package to the circuit board (212, see Figure 6) by use of a group of intermediate solder portions (136, see Figure 2, connected to lower surfaces of each through-mold connections 122, because the through-mold connections 122 are connected to the circuit board through the group of intermediate solder portions 136, the intermediate solder portions are considered as being used to mount the package to the circuit board 212, 136 is called a die to package substrate, DTPS, interconnect which may include solder, see para. [0050]), such that each intermediate solder portion (136) of the group of intermediate solder portions (136) couples a corresponding through-mold connection (122) of the group of through-mold connections (122) to the circuit board (212, see Figure and 6), the intermediate solder portions (136) protruding from the outer surface of the first mold structure (208, lower surface, see Figure 2).
Elsherbini does not disclose that the through-mold connections are formed of an alloy including tin and antimony, the alloy having a solidus temperature of at least 240 degrees Celsius.
Ishii discloses an alloy used for through-mold connections (41/42, see Figure 4 which shows the connections 41/42 extend through the mold material 9 to connect different elements of the device) including tin and antimony (see para. [0056]) having a solidus temperate of at least 240 degrees Celsius (see para. [0050]).
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Ishii into the teachings of Elsherbini to include a tin and antimony alloy material having a solidus temperate of at least 240 degrees Celsius for the through-mold connections for the purpose of utilizing a material with a high melting point in order to avoid remelting of said material during subsequent heating/bonding processes during manufacture (Ishii, para. [0056]). Additionally, the selection of a known material based on its suitability for its intended purpose is prima facie obvious, see MPEP 2144.07 and Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945).
Regarding claim 21, Elsherbini discloses wherein a surface of the first electronic module (110, lower surface) is exposed through the first mold structure (208) and is flush with the outer surface of the first mold structure (208, lower surface, see Figure 2).
Response to Arguments
Applicant’s arguments with respect to claims 1, 19, and 20 have been considered but are moot because the new ground of rejection does not rely on the same interpretation of the reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/Genevieve G Bullard-Connor/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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