DETAILED ACTION
This non-final action is responsive to communications: 09/24/2025.
In the response filed, applicant amended claims 1 and 9. No other claims are added, cancelled or amended. Claims 1-18 are pending. Claims 1 and 9 are independent.
Continued Examination under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 09/24/2025 has been partly entered (claim amendment is being entered). New Drawing and Spec amendments dated 09/24/2025 are not being entered.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
IDS not Considered in previous O.A
The information disclosure statement filed 04/14/2024 fails to comply with 37 CFR 1.98(a)(2), and was not considered previously.
Drawing and Spec Objection Under 35 U.S.C. § 132 and MPEP § 608.04 (Introducing new matter into the drawings and specification)
Acknowledgment of Replacement Drawing Sheets dated 09/24/2025. The new drawings were received on 09/24/25. These drawings are new added Figure 8 which is unacceptable. Figure 8, which is a 3D block structure (with nand strings) is not supported by the original disclosure. See para [0040]-para [0041] or others. While vertical nand string structure is supported in Fig. 7, para [0040], the 3D block structure is not supported. The block arrangement of strings in the x/ y direction (shown in new Figure 8) is not described in original spec or supported in other disclosure. Figure 8 introduces new matter and is objected to.
For the same reason above, specification amendment 09/24/2025 introduces new matter and being objected to.
New drawing and spec amendment dated 09/24/2025 is not being entered.
Previous Drawing Objections Maintained
6a. The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Also, per 2163 Guidelines, the specification must still be examined to assess whether an originally-filed claim has adequate support in drawings and disclosure. Claimed apparatus and functional events must be illustrated for the understating of the invention. Therefore, the following claim language (strike out limitation in the following) must be shown in drawings. No new matter should be entered.
Claim 9: drawings fail to illustrate claimed limitations and drawings lack sufficient illustration showing different operation stages e.g., programming, programming verification, reading stages, timing/ sequences; associated voltage magnitudes and timing of application to different word lines. “Equivalent threshold voltage” also must be illustrated in drawings. Fig. 7 also do not show complete picture of string with string select transistors and word line arrangements being tested for coupling effect, disturbance.
Claim 10: drawings fail to illustrate claimed limitations and drawings lack sufficient illustration showing different operation stages e.g., programming, programming verification, reading timing/ sequence; associated voltage magnitudes and timing of application to different word lines. First part, second part of cells must be demonstrated in drawings)
Claim 11: drawings fail to illustrate claimed limitations of controller further configured to: read the first memory cells of the Nth word line by comparing current on bit lines of the first memory cells with a reference current to obtain whether the equivalent threshold voltage of the first memory cells is at a high threshold voltage state or a low threshold voltage state. (Not shown in drawings)
Claim 12: drawings fail to illustrate claimed limitations and drawings do not show e.g., timing diagram with voltage magnitudes, timing of events are missing. High/ low “threshold voltage state” must be illustrated)
Claim 13: drawings fail to illustrate claimed limitations and drawings do not show controller is further configured to: lower the at least one selected programming verification voltage of the programming verification voltages by the offset value in response to the equivalent threshold voltage of the first memory cells being greater than the preset threshold value. (See above)
Claim 14: drawings fail to illustrate claimed limitations and drawings do not show controller is further configured to: maintain the at least one selected programming verification voltage of the programming verification voltages unchanged in response to the equivalent threshold voltage of the first memory cells being not greater than the preset threshold value. (See above)
Claim 15: drawings fail to illustrate claimed limitations and drawings do not show controller is further configured to: perform a programming operation on a second part of the second memory cells of the N+1th word line according to at least one adjusted programming verification voltage. (First part, second part of cells must be demonstrated in drawings)
Claim 16: drawings fail to illustrate claimed limitations and drawings do not show a threshold voltage of the second part of the second memory cells is greater than a threshold voltage of the first part of the second memory cells. (See above)
Previous Claim Objections
6b. Apparatus claims 9-18 are objected to because the claims are not readable on the drawings. See drawing objection above. In addition, claimed limitations are directed to programming, verification, voltage application which require specific/ additional hardware, device hooks, peripheral circuitry beyond the controller of Fig. 6. For example, a voltage generator working in conjunction with controller is missing. Apparatus claims are not readable on drawings and are objected to.
Claim Rejections - 35 USC § 102
7. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
8. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
9. Claim(s) 1, 3-6, 9, 11-14, and 17-18 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Jung et al. (US 2019/0088341 A1).
Regarding independent claim 1, Lu teaches a programming method, adapted for a non-volatile memory, comprising:
performing a reading operation on a plurality of first memory cells of an Nth word line, and
determining whether an equivalent threshold voltage of the first memory cells is greater than a preset threshold value to generate a determination result to generate a determination result, wherein N is a positive integer greater than 0; and
deciding whether to adjust at least one selected programming verification voltage of a plurality of programming verification voltages by an offset value when the equivalent threshold voltage of the first memory cells is greater than the preset threshold value in response to performing a programming operation on a plurality of second memory cells of an N+1th word line.
(Method claim limitations are satisfied by apparatus claim 9 limitations. See claim 9 rejection analysis since claimed limitations are substantially identical where Jung teaches a non-volatile memory (Fig. 1: 1 “nonvolatile memory system”. See Fig. 1-Fig. 15B for illustrated components and functionality), comprising: a memory cell array (Fig. 1: 110) comprising a plurality of memory cell strings (Fig. 4: STR), wherein each of the memory cell strings is coupled to a plurality of word lines (see Fig. 4: WL1-WLn. See para [0046], para [0032]); and a controller (Fig. 1: 121 and 20. See para [0037]) coupled to the memory cell array (Fig. 1: 110) and configured to: perform a reading operation (Fig. 3: S20 “read adjacent word line”) on a plurality of first memory cells of an Nth word line (Fig. 4: WL2 “adjacent word line”. See para [0051]-para [0052], para [0058]), and
determine (Fig. 3: S30) whether an equivalent threshold voltage (para [0052]: reading “program state” of cell in adjacent wordline) of the first memory cells is greater than a preset threshold value (para [0052], para [0053]: “first voltage” corresponding to “predetermined first reference program state”) to generate a determination result (Fig. 3: S30 in context of para [0052], para [0053]: comparison result), wherein N is a positive integer greater than 0 (see Fig. 4); and decide whether to adjust at least one selected programming verification voltage of a plurality of programming verification voltages by an offset value (para [0055]: “…control the verifying voltage level based on the result of reading…”, see also para [0107]: Vver adjusted levels) according to the determination result in response to performing a programming operation on a plurality of second memory cells of an N+1-th word line (Fig. 3: S40 in context of para [0052]-para [0055]. See “…when a threshold voltage of a memory cell connected to the adjacent word line is equal to or lower than the first voltage…change the verifying conditions…when the threshold voltage of the memory cell connected to the adjacent word line is not equal to or lower than the first voltage, the nonvolatile memory device…may not change the verifying conditions…”)).
Regarding claim 3, Lu teaches the programming method according to claim 1, wherein performing the reading operation on the first memory cells of the Nth word line, and determining whether the equivalent threshold voltage of the first memory cells is greater than the preset threshold value to generate the determination result comprises:
reading the first memory cells of the Nth word line by comparing current on bit lines of the first memory cells with a reference current to obtain whether the equivalent threshold voltage of the first memory cells is at a high threshold voltage state or a low threshold voltage state. (See claim 11 rejection analysis since claimed limitations are substantially identical)
Regarding claim 4, Lu teaches the programming method according to claim 3, wherein if the equivalent threshold voltage of the first memory cells is greater than the preset threshold value, the equivalent threshold voltage is at the high threshold voltage state; and if the equivalent threshold voltage of the first memory cells is not greater than the preset threshold value, the equivalent threshold voltage is at the low threshold voltage state. (See claim 12 rejection analysis since claimed limitations are substantially identical).
Regarding claim 5, Lu teaches the programming method according to claim 1, wherein deciding whether to adjust the at least one selected programming verification voltage of the programming verification voltages by the offset value according to the determination result comprises: lowering the at least one selected programming verification voltage of the programming verification voltages by the offset value in response to the equivalent threshold voltage of the first memory cells being greater than the preset threshold value. (See claim 13 rejection analysis since claimed limitations are substantially identical)
Regarding claim 6, Lu teaches the programming method according to claim 5, wherein deciding whether to adjust the at least one selected programming verification voltage of the programming verification voltages by the offset value according to the determination result further comprises: maintaining the at least one selected programming verification voltage of the programming verification voltages unchanged in response to the equivalent threshold voltage of the first memory cells being not greater than the preset threshold value. (See claim 14 rejection analysis since claimed limitations are substantially identical)
Regarding independent claim 9, Jung teaches a non-volatile memory (Fig. 1: 1 “nonvolatile memory system”. See Fig. 1-Fig. 15B for illustrated components and functionality), comprising:
a memory cell array (Fig. 1: 110) comprising a plurality of memory cell strings (Fig. 4: STR), wherein each of the memory cell strings is coupled to a plurality of word lines (see Fig. 4: WL1-WLn. See para [0046], para [0032]); and
a controller (Fig. 1: 121 and 20. See para [0037]) coupled to the memory cell array (Fig. 1: 110) and configured to:
perform a reading operation (Fig. 3: S20 “read adjacent word line”), by executing a software program (see Fig. 3, Fig. 10 algorithmic method), on a plurality of first memory cells of an Nth word line (Fig. 4: WL2 “adjacent word line”. See para [0051]-para [0052], para [0058]), and
determine (Fig. 3: S30) whether an equivalent threshold voltage (para [0052]: reading “program state” of cell in adjacent wordline) of the first memory cells is greater than a preset threshold value (para [0052], para [0053]: “first voltage” corresponding to “predetermined first reference program state”) to generate a determination result (Fig. 3: S30 in context of para [0052], para [0053]: comparison result),
wherein N is a positive integer greater than 0 (see Fig. 4); and
decide, by executing a software program (see Fig. 3, Fig. 10 algorithmic method), to adjust at least one selected programming verification voltage of a plurality of programming verification voltages by an offset value (para [0055]: “…control the verifying voltage level based on the result of reading…”, see also para [0107]: Vver adjusted levels) when the equivalent threshold voltage of the first memory cells is greater than the preset threshold value (para [0052]-para [0055], Fig. 3: S30-S40. See also Fig. 10) in response to performing a programming operation on a plurality of second memory cells of an N+1-th word line (Fig. 3: S30-S40 in context of para [0052]-para [0055]. See “…when a threshold voltage of a memory cell connected to the adjacent word line is equal to or lower than the first voltage…change the verifying conditions…when the threshold voltage of the memory cell connected to the adjacent word line is not equal to or lower than the first voltage, the nonvolatile memory device…may not change the verifying conditions…”).
Regarding claim 11, Jung teaches the non-volatile memory according to claim 9, wherein the controller is further configured to:
read (Jung “sensing operation”) the first memory cells of the Nth word line by comparing current on bit lines of the first memory cells (para [0097]: read current “cell current” used for SO, see Fig. 12) with a reference current (para [0007]: “reference voltage”) to obtain whether the equivalent threshold voltage of the first memory cells is at a high threshold voltage state or a low threshold voltage state (Jung “sensing operation”. See para [0007], para [0095], para [0097], Fig. 12, Fig. 13A. see also para [0094]-para [0098]).
Regarding claim 12, Jung teaches the non-volatile memory according to claim 11, wherein if the equivalent threshold voltage of the first memory cells is greater than the preset threshold value, the equivalent threshold voltage is at the high threshold voltage state (Jung Fig. 3 in context of para [0052]-para [0054]. See also Fig. 10); and
if the equivalent threshold voltage of the first memory cells is not greater than the preset threshold value, the equivalent threshold voltage is at the low threshold voltage state (Jung Fig. 3 in context of para [0052]-para [0054]. See also Fig. 10).
Regarding claim 13, Jung teaches the non-volatile memory according to claim 9, wherein the controller is further configured to: lower the at least one selected programming verification voltage of the programming verification voltages by the offset value (para [0108]: Vver steps to lower Vver1-3 voltages) in response to the equivalent threshold voltage of the first memory cells being greater than the preset threshold value (para [0108]-para [0109] see also para [0052], para [0053], para [0107]).
Regarding claim 14, Jung teaches the non-volatile memory according to claim 13, wherein the controller is further configured to: maintain the at least one selected programming verification voltage of the programming verification voltages unchanged in response to the equivalent threshold voltage of the first memory cells being not greater than the preset threshold value (Jung para [0053]).
Regarding claim 17, Jung teaches the non-volatile memory according to claim 9, wherein each of the memory cell strings is a NAND flash memory cell string (Jung para [0046], Fig. 4, Fig. 2).
Regarding claim 18, Jung teaches the non-volatile memory according to claim 9, wherein each of the memory cell strings forms a columnar channel structure (Jung para [0033], Fig. 6, Fig. 5 strings).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
10. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
11. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
12. Claims 2, 7-8, 10, and 15-16 is/are rejected under 35 U.S.C. 103 as being obvious over Jung et al. (US 2019/0088341 A1), in view of Lu et al. (US 2024/0071530 A1).
Regarding claim 2, Jung and Lu teach the programming method according to claim 1, wherein a programming operation for a first part of the second memory cells of the N+1th word line is completed before performing the reading operation on the first memory cells of the Nth word line.
(See claim 10 rejection analysis since claimed limitations are substantially identical).
Regarding claim 7, Jung and Lu teach the programming method according to claim 2, further comprising: performing a programming operation on a second part of the second memory cells of the N+1th word line according to at least one adjusted programming verification voltage. (See claim 15 rejection analysis since claimed limitations are substantially identical)
Regarding claim 8, Jung and Lu teach the programming method according to claim 7, wherein a threshold voltage of the second part of the second memory cells is greater than a threshold voltage of the first part of the second memory cells. (See claim 16 rejection analysis since claimed limitations are substantially identical).
Regarding claim 10, Jung teaches the non-volatile memory according to claim 9. Jung in Fig. 3 and Fig. 10 teaches that the controller completes a programming operation for a first part of the second memory cells of the N+1th word line before performing the reading operation on the first memory cells of the Nth word line.
Jung is silent with respect to remaining provisions of this claim as it pertains to portions of cells being programmed.
Lu teaches wherein the controller completes a programming operation for a first part of the second memory cells of the N+1th word line before performing the reading operation on the first memory cells of the Nth word line (Fig. 4A in context of para [0033]-para [0035], para [0077]-para [0078]: corrective program verify is performed after determining C2C interference of programmed cells in WLn-1, WLn+1 on the cells in WLn).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine Lu’s method and teachings into the apparatus of Jung such that claimed limitation can be implemented in order to reduce operational disturbance.
Regarding claim 15, Jung teach the non-volatile memory according to claim 10. Jung is silent with respect to remaining provisions of this claim as it pertains to portions of cells being programmed in accordance with verification.
Lu teaches wherein the controller is further configured to:
perform a programming operation on a second part of the second memory cells of the N+1th word line (Lu: WLn+1 cells programmed to e.g., L14 or L1 level. See QLC NAND flash cells) according to at least one adjusted programming verification voltage (Lu Fig. 4A: in context of para [0077], para [0079]: applicable similar method).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine Lu’s method and teachings into the apparatus of Jung such that claimed limitation can be implemented in order to reduce operational disturbance.
Regarding claim 16, Jung teaches the non-volatile memory according to claim 15. Jung is silent with respect to remaining provisions of this claim.
Lu teaches a threshold voltage of the second part of the second memory cells is greater than a threshold voltage of the first part of the second memory cells (Lu Fig 4A teachings and PV offset calculation is applicable for any Level combination of target word line and neighboring wordline. Thus, offset calculation of WLn+1 target level 1, or 14 or, 15 with neighboring cell with Level 15 is taught is Fig. 4A and Fig. 4B).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine Lu’s method and teachings into the apparatus of Jung such that claimed limitation can be implemented in order to reduce operational disturbance.
Response to Arguments
Objections:
Drawing and spec amendments dated 9/24/25 is objected to for containing new matter (see section 5 above).
Previous drawing and spec objections (section 6a, 6b) are being maintained since applicant has not provided sufficient reasons against their arguments (and new drawings are not being entered)
Prior art rejections
Applicant’s arguments with respect to claim(s) 1 and 9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Applicant has not argued substantively against the dependent claim specific rejections (claims 2, 7-8, 10, and 15-16) and previous rejections are being relied upon.
Prior Art Not Relied Upon
The prior art made of record and not relied upon (MPEP § 707.05) is considered pertinent to applicant's disclosure: Dutta (US 2011/0032757 A1): Fig. 1-Fig. 21b disclosure applicable for all claims. Benvenutti (US 2024/0069749 A1): Fig. 4-Fig. 7 applicable for all claims. It is suggested that applicant consider all prior arts made of record.
Conclusion
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/MUSHFIQUE SIDDIQUE/Primary Examiner, Art Unit 2825