Prosecution Insights
Last updated: April 19, 2026
Application No. 18/329,845

SEMICONDUCTOR PACKAGE ASSEMBLY AND A METHOD OF MANUFACTURING SUCH SEMICONDUCTOR PACKAGE ASSEMBLY

Non-Final OA §103
Filed
Jun 06, 2023
Examiner
ZARNEKE, DAVID A
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nexperia B V
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
82%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allow Rate
566 granted / 801 resolved
+2.7% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
34 currently pending
Career history
835
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
59.3%
+19.3% vs TC avg
§102
24.5%
-15.5% vs TC avg
§112
7.2%
-32.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 801 resolved cases

Office Action

§103
DETAILED ACTION Election/Restrictions Applicant's election with traverse of Group I and Species 1a and 2ai1 and 2aii2, in the reply filed on 2/10/26 is acknowledged. The traversal is on the ground(s) that the search of one encompasses the search for the others therefore there is no serious burden. This is not found persuasive because the serious burden is in the various embodiments and their inherent differences. The requirement is still deemed proper and is therefore made FINAL. Allowable Subject Matter Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: the prior art neither teaches nor suggests two recesses that are each applied on opposite sides of the connection. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-3, 5-6, 8, 10, and 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takada et al., US 2015/0206830, in view of Sawai, JP 2011049244A. Regarding claim 1, Takada (figures 6 & 14) teaches a semiconductor package comprising: a lead metallic frame 4LS(4)/3L(3),4LD(4)/3H(3),4HD(4) having a die pad 3L(3),4LD(4); a semiconductor die structure 2L being mounted on the die pad 3L(3),4LD(4) of the lead frame 4LS(4)/3L(3),4LD(4)/3H(3),4HD(4); at least a first bond clip 7LSR(7R,7) connected with the semiconductor die structure 2L; and at least a further bond clip 7HSR(7R,7) connected with the die pad 3L(3),4LD(4) of the lead frame 4LS(4)/3L(3),4LD(4)/3H(3),4HD(4) by means of a solder junction (figure 14 & paragraph 0170 states the bond clip 7R is soldered the bond pad 22). Takada fails to teach the die pad is provided with at least one recess that is near the connection with the at least the further bond clip, the at least one recess being formed as a reservoir to accommodate an increased volume of solder for the solder junction. Sawai (figure 4) teaches the lead frame 41 is provided with at least one recess 43 that is near the connection with the at least the further bond clip 56, the at least one recess 43 being formed as a reservoir to accommodate an increased volume of solder 72 for the solder junction. It would have been obvious to one of ordinary skill in the art at the time of the invention to use the recess of Sawai in the invention of Takada because Sawai teaches it improves alignment (abstract). With respect to claim 2, Sawai (figure 3) teaches the at least one recess 43 has an elongated configuration. As to claim 3, Sawai (figure 3) teaches the at least one elongated recess 43 has a V-shaped depth profile. In re claim 6, Sawai (figure 3) teaches the at least one elongated recess 43 is shaped as a trench or a groove. Concerning claim 8, Sawai (figure 1) teaches the at least one elongated recess 43 extends in a direction transverse to a longitudinal orientation of the die pad 3. Pertaining to claim 10, Sawai (figure 3) teaches the V-shaped depth profile of the at least one elongated recess 43 has a vertex that is of an angle of approximately 90°. In claim 13, Sawai (figure 1) teaches the at least one elongated recess 43 extends in a direction transverse to a longitudinal orientation of the die pad 3. Regarding claim 14, Sawai (figure21) teaches a molding resin case 6 encapsulating the semiconductor package. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited prior art teach various aspects of the invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID A ZARNEKE whose telephone number is (571)272-1937. The examiner can normally be reached M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matt Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DAVID A ZARNEKE/Primary Examiner, Art Unit 2891 3/16/26
Read full office action

Prosecution Timeline

Jun 06, 2023
Application Filed
Dec 01, 2025
Response after Non-Final Action
Mar 16, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604752
SEMICONDUCTOR DIE PACKAGE
2y 5m to grant Granted Apr 14, 2026
Patent 12588532
IC CHIP MOUNTING DEVICE, AND IC CHIP MOUNTING METHOD
2y 5m to grant Granted Mar 24, 2026
Patent 12587188
POWER MODULES FOR CIRCUIT PROTECTION
2y 5m to grant Granted Mar 24, 2026
Patent 12588171
HEAT EXCHANGE DEVICE AND POWER CONVERSION DEVICE
2y 5m to grant Granted Mar 24, 2026
Patent 12588463
Semiconductor Device and Methods of Making and Using an Enhanced Carrier to Reduce Electrostatic Discharge
2y 5m to grant Granted Mar 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
82%
With Interview (+10.8%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 801 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month