DETAILED ACTION/EXAMINER’S COMMENT
This Office action responds to the amendments filed on 04/28/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Amendment Status
Applicant’s response filed on 04/28/2026 in reply to the non-final rejection mailed on 02/02/2026, has been entered. The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-30.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 6, 7, 12, 15, 21, 22, & 28 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding the limitation “wherein solder layers and reinforcement layers alternate in the multi-layer interconnect pillar” in lines 5-6 of Claim 6, the current claim language establishes antecedent basis for new layers “the solder layers” and “the reinforcement layers.” It is unclear whether new layers are intended to be established in Claim 6. If the intent is reference the one or more intermediate reinforcement layers and the one or more additional solder layers of Claim 6, and/or the base reinforcement layer, the cap reinforcement layer, and the solder layer of Claim 1 (on which Claim 6 depends), the claim must be rewritten to clarify which layers are intended to alternate with each other.
Claim 12 recites the limitation "wherein the one or more barrier layers comprise…" in lines 3-4. There is insufficient antecedent basis for this limitation in the claim.
Regarding the limitation “one or more additional solder layers disposed between adjacent reinforcement” in lines 4-5 of Claim 15, the current claim language establishes antecedent basis for new layers “the adjacent reinforcement layers.” It is unclear whether new layers are intended to be established in Claim 15. If the intent is to reference the one or more additional reinforcement layers of Claim 15, and/or the base reinforcement layer and the cap reinforcement layer of Claim 14 (on which Claim 15 depends), the claim must be rewritten to clarify which layers the one or more additional solder layers are to be disposed between.
Regarding the limitations “applying heat… to soften the solder cap and one or more solder layers” & “reinforcement layers… limit deformation… due to heating” in lines 3-4 of Claim 21, the current claim language establishes antecedent basis for new layers “the one or more solder layers” & “the reinforcement layers.” It is unclear whether new layers are intended to be established in Claim 21. The claim must be rewritten to clarify which layers are applied heat and which layers are claimed limit deformation due to heating.
Claim 22 recites the “the other device” in line 3. There is insufficient antecedent basis for this limitation in the claim. Additionally, the limitation “the other device” is unclear whether a new device is intended to be established in Claim 22, or if the intent is to reference the device the method produces in Claims 14 (on which Claim 22 depends) & 22. The other device and the contact pad are connected to the another device by attaching the solder cap and thus the other device includes the solder cap formed in the method.
Regarding the limitation “wherein solder layers and reinforcement layers alternate in the multi-layer interconnect pillar” in lines 5-6 of Claim 28, the current claim language establishes antecedent basis for new layers “the solder layers” and “the reinforcement layers.” It is unclear whether new layers are intended to be established in Claim 28. If the intent is to reference the one or more intermediate reinforcement layers and the one or more additional solder layers of Claim 28, and/or the base reinforcement layer, the cap reinforcement layer, and the solder layer of Claim 23 (on which Claim 28 depends), the claim must be rewritten to clarify which layers are intended to alternate with each other.
Claim Rejections - 35 USC § 102 & 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 3, 5, 6, 7, 8, 9, & 12 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Jadhav (US 20090095502).
Regarding Claim 1, Jadhav (see, e.g., fig. 2, fig. 5, para.0051) states the embodiment of fig. 5 can include any of the multi-layer interconnect pillars from figs. 1-4. Examiner elects the embodiment of fig. 5 including the multi-layer interconnect pillar from the embodiment of fig. 2.
Jadhav (see, e.g., fig. 2, fig. 5) shows an integrated device comprising:
a die 60 (see, e.g., para.0051) having a contact pad 12 (see, e.g., para.0018);
and a solder cap 22 (see, e.g., para.0034) electrically connected to the contact pad by a multi-layer interconnect pillar 10, the multi-layer interconnect pillar comprising:
a base reinforcement layer 20 (above 18a, see, e.g., annotated figure 1, para.0034);
a cap reinforcement layer 20 (below 18b, see, e.g., annotated figure 1, para.0034);
and a solder layer 18b (see, e.g., para.0031) disposed between the base reinforcement layer and the cap reinforcement layer.
and a copper pillar 16a (see, e.g., para.0020) electrically coupled to the solder layer 18b via the base reinforcement layer 20 (above 18a) or the cap reinforcement layer 20 (below 18b),
wherein the copper pillar 16a (5-30 µm, see, e.g., para.0028) is thicker than each of the base reinforcement layer (1-2 µm, see, e.g., para.0030), the cap reinforcement layer (1-2 µm, see, e.g., para.0030), and the solder layer 18b (5-20 µm, see, e.g., para.0032).
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Regarding Claim 2, Jadhav shows the integrated device of claim 1, further comprising
one or more under bump metallization (UBM) layers 14 (see, e.g., para.0019) coupled to and disposed between the contact pad and the multi-layer interconnect pillar.
Regarding Claim 3, Jadhav shows the integrated device of claim 1, further comprising
a barrier layer 16c (see, e.g., para.0034) coupled to and disposed between the solder cap 22 and the multi-layer interconnect pillar 10.
Regarding Claim 5, Jadhav shows the integrated device of claim 3,
wherein the barrier layer 16c comprises copper (see, e.g., para.0034).
Regarding Claim 6, Jadhav shows the integrated device of claim 1,
wherein the multi-layer interconnect pillar further comprises:
one or more intermediate reinforcement layers (20 below 18a, 16b, 20 above 18b, see, e.g., annotated figure 2) disposed between the cap reinforcement layer 20 (below 18b) and the base reinforcement layer 20 (above 18a);
and one or more additional solder layers 18a (see, e.g., para.0029),
wherein solder layers and reinforcement layers alternate in the multi-layer interconnect pillar.
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Regarding Claim 7, Jadhav shows the integrated device of claim 6,
wherein each of the one or more additional solder layers 18a has a thickness between 5 micrometers to 20 micrometers (see, e.g., para.0029).
Regarding Claim 8, Jadhav shows the integrated device of claim 1,
wherein the copper pillar 16a (5-30 µm, see, e.g., para.0028) comprises 20% to 50% of a thickness of the multi-layer interconnect pillar 10 (60-80 µm, see, e.g., para.0026).
Jadhav states the copper pillar 16a can be between 5-30 µm and the multi-layer interconnect pillar 10 can be between 60-80 µm. A copper pillar with a thickness of 25 µm would comprise 31.25% of a multi-layer interconnect pillar with a thickness of 80 µm.
Regarding Claim 9, Jadhav shows the integrated device of claim 1,
wherein the copper pillar 16a (25 µm, see, e.g., para.0028) has a height between 10 micrometers to 40 micrometers.
Regarding Claim 12, Jadhav shows the integrated device of claim 1, further comprising
a barrier layer 16c (see, e.g., para.0034) that contacts the cap reinforcement layer,
wherein the cap reinforcement layer 20 (below 18b) and the base reinforcement layer 20 (above 18a) comprise nickel (see, e.g., para.0030),
wherein the solder layer 18b comprises tin (see, e.g., para.0032),
and wherein the one or more barrier layers comprise copper (see, e.g., para.0034),
and wherein the copper pillar (25 µm, see, e.g., para.0028) is thicker than the barrier layer (20 µm, see, e.g., para.0034).
Claims 4 & 13 are rejected under 35 U.S.C. 103 as being unpatentable over Jadhav (US 20090095502) in view of Arvin (US 20140262458).
Regarding Claim 4, Jadhav shows the integrated device of claim 3,
Jadhav, however, fails to explicitly state
wherein a material of the solder cap forms Intermetallic compounds (IMCs) with a material of the barrier layer at a first rate,
wherein the material of the solder cap forms IMCs with a material of the cap reinforcement layer at a second rate,
and wherein the first rate is greater than the second rate.
Arvin (see, e.g., para.0030), in a similar device to Jadhav, teaches
wherein a material of the solder cap 30 forms Intermetallic compounds (IMCs) with a material of the barrier layer 17 (copper) at a first rate,
wherein the material of the solder cap forms IMCs with a material of the cap reinforcement layer 18 (nickel) at a second rate,
and wherein the first rate is greater than the second rate.
Arvin (see, e.g., para.0030) states the material of the barrier layer 17, copper, has a first rate greater than a second rate of the material of the cap reinforcement layer 18, nickel, when reacting with the solder cap 30.
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to interpret the following limitations of Jadhav, in view of Arvin.
wherein a material of the solder cap 22 forms Intermetallic compounds (IMCs) with a material of the barrier layer 16c (copper) at a first rate,
wherein the material of the solder cap forms IMCs with a material of the cap reinforcement layer 20 (nickel) at a second rate,
and wherein the first rate is greater than the second rate.
Regarding Claim 13, Jadhav shows the integrated device of claim 1,
Jadhav, however, fails to show
wherein the cap reinforcement layer 20 (below 18b) and the base reinforcement layer 20 (above 18a) comprise cobalt.
The cap reinforcement layer and base reinforcement layer of Jadhav (see, e.g., para.0030) are barrier layers formed of nickel. Arvin (see, e.g., para.0031-0032), in a similar device to Jadhav, teaches that a barrier layer 18 can be made of nickel, cobalt, or combination thereof. The cobalt of Arvin is incorporated into the cap reinforcement layer and base reinforcement layer of Jadhav since there is overlap between the materials used for barrier layers.
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the cobalt of Arvin in the cap reinforcement layer and the base reinforcement layer of Jadhav because the combination is a simple substitution of one known material for another to obtain predictable results – simple substitution of one known barrier layer material for another for which the two are provided as alternative materials.
Claims 10 & 11 are rejected under 35 U.S.C. 103 as being unpatentable over Jadhav (US 20090095502) in view of Brun (US 20220375844).
Regarding Claim 10, Jadhav shows the integrated device of claim 1,
Jadhav, however, fails to show,
wherein the contact pad 12 is one of a plurality of contact pads of the die,
and the solder cap 22 is one of a plurality of solder caps,
wherein each of the plurality of solder caps is electrically connected to a respective one of the plurality of contact pads,
and wherein a pitch of the plurality of solder caps is less than 150 micrometers.
Brun (see, e.g., fig. 2, para.0046-0047), in a similar device to Jadhav, teaches a configuration of an integrated device with a plurality of multiple multi-layer interconnect pillars that would teach the plurality of elements as required by Claim 10.
Brun (see, e.g., fig. 2) shows
wherein the contact pad 110 is one of a plurality of contact pads of the die 102,
and the solder cap 118 is one of a plurality of solder caps,
wherein each of the plurality of solder caps is electrically connected (through vias 114) to a respective one of the plurality of contact pads,
and wherein a pitch of the plurality of solder caps 118 is less than 150 micrometers (0.7-100 micrometers, see, e.g., para.0047).
Since the configuration of a plurality of multi-layer interconnect pillars connected to a die is known in the art, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to use multi-layer interconnect pillar of Jadhav as a plurality of multi-layer interconnect pillars in the device of Brun as a simple substitution of one known element for another known equivalent element- resulting in the predictable result of an integrated device with a plurality of multi-layer interconnect pillars.
Regarding Claim 11, Jadhav, in view of Brun (see, e.g., para.0047), shows the integrated device of claim 10,
wherein the pitch is less than 130 micrometers (see, e.g., para.0047).
Claims 14, 15, 16, 17, 18, 21, & 22 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Jadhav (US 20090095502).
Regarding Claim 14, Jadhav (see, e.g., fig. 2, fig. 5, para.0051) states the embodiment of fig. 5 can include any of the multi-layer interconnect pillars from figs. 1-4. Examiner elects the embodiment of fig. 5 including the multi-layer interconnect pillar from the embodiment of fig. 2.
Jadhav (see, e.g., fig. 2, fig. 5) shows a method comprising:
forming a base reinforcement layer 20 (above 18a, see, e.g., annotated figure 1, para.0034) of a multi-layer interconnect pillar 10,
the base reinforcement layer electrically connected to a contact pad 12 (see, e.g., para.0018) of a die 60 (see, e.g., para.0051);
forming a first solder layer 18b (see, e.g., para.0031) of the multi-layer interconnect pillar,
wherein the first solder layer is disposed over the base reinforcement layer;
forming a cap reinforcement layer 20 (below 18b, see, e.g., annotated figure 1, para.0034) of the multi-layer interconnect pillar,
wherein the cap reinforcement layer is electrically connected to the contact pad by at least the base reinforcement layer and the first solder layer;
forming a solder cap 22 (see, e.g., para.0034) of the multi-layer interconnect pillar,
wherein the solder cap is disposed over the cap reinforcement layer;
and forming a copper pillar 16a (see, e.g., para.0020) electrically coupled to the first solder layer via the base reinforcement layer or the cap reinforcement layer,
wherein the copper pillar 16a (5-30 µm, see, e.g., para.0028) is thicker than each of the base reinforcement layer (1-2 µm, see, e.g., para.0030), the cap reinforcement layer (1-2 µm, see, e.g., para.0030), and the first solder layer 18b (5-20 µm, see, e.g., para.0032).
Regarding Claim 15, Jadhav shows the method of claim 14, further comprising:
forming one or more additional reinforcement layers (20 below 18a, 16b, 20 above 18b, see, e.g., fig. 2) between the base reinforcement layer 20 (above 18a) and the cap reinforcement layer 20 (below 18b);
and forming one or more additional solder layers 18a (see, e.g., para.0029) disposed between adjacent reinforcement layers.
Regarding Claim 16, Jadhav shows the method of claim 14,
wherein the copper pillar 16a is directly disposed over the contact pad 16a (see, e.g., fig. 2).
The claim language “directly disposed” does not require “direct contact.”
Regarding Claim 17, Jadhav shows the method of claim 14, further comprising,
before forming the base reinforcement layer, forming one or more under bump metallization (UBM) layers 14 (see, e.g., para.0019),
wherein at least one of the one or more UBM layers contacts the contact pad 12.
Regarding Claim 18, Jadhav shows the method of claim 14, further comprising,
before forming the solder cap, forming one or more barrier layers 16c (see, e.g., para.0034),
wherein at least one of the one or more barrier layers contacts the cap reinforcement layer.
Regarding Claim 21, Jadhav shows the method of claim 14, further comprising,
after forming at least the base reinforcement layer, the first solder layer, the cap reinforcement layer, and the solder cap,
applying heat to the multi-layer interconnect pillar sufficient to soften the solder cap and one or more solder layers of the multi-layer interconnect pillar (see, e.g., para.0051-0052),
wherein reinforcement layers of the multi-layer interconnect pillar limit deformation of the multi-layer interconnect pillar due to heating (see, e.g., para.0030, para.0033, para.0053).
Regarding Claim 22, Jadhav shows the method of claim 14, further comprising,
after forming at least the base reinforcement layer, the first solder layer, the cap reinforcement layer, and the solder cap,
attaching the solder cap to another device 50 & 70 (see, e.g., fig. 5, para.0052) to electrically connect the other device and the contact pad 12.
Claims 19 & 20 are rejected under 35 U.S.C. 103 as being unpatentable over Jadhav (US 20090095502) in view of Jin (US 20030219966).
Regarding Claim 19, Jadhav shows the method of claim 14, further comprising:
Jadhav, however, fails to show
forming a photoresist layer on the die;
and patterning the photoresist layer to form an opening exposing the contact pad,
wherein the base reinforcement layer, the first solder layer, the cap reinforcement layer, and a solder layer of the solder cap are formed in the opening.
Jin (see, e.g., figs. 3-7), in a similar method to Jadhav, teaches
forming a photoresist layer 26 & 34 (see, e.g., para.0043-0045, para.0052) on layer 10;
and patterning the photoresist layer to form an opening (opening of 26 & 34, see, e.g., para.0043, para.0052) exposing the contact pad 12 (see, e.g., para.0042),
wherein the base reinforcement layer 28, the first solder layer 30, the cap reinforcement layer 32, and a solder layer of the solder cap 36 (see, e.g., fig. 5, para.0052) are formed in the opening.
Since the method for forming a multi-layer interconnect pillars is known in the art, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to use the method of Jin in the method of Jadhav as a simple substitution of one known element for another known equivalent element - resulting in the predictable result of a method of forming multi-layer interconnect pillars.
Regarding Claim 20, Jadhav, in view of Jin (see, e.g., figs. 6-7), shows the method of claim 19, further comprising,
after forming at least the base reinforcement layer 28, the first solder layer 30, the cap reinforcement layer 32, and the solder layer of the solder cap 36 in the opening,
stripping the photoresist layer 26 & 34 from the die to expose the multi-layer interconnect pillar (see, e.g., figs. 6-7).
Claims 23, 24, 25, 27, 28, 29, & 30 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Jadhav (US 20090095502).
Regarding Claim 23, Jadhav (see, e.g., fig. 2, fig. 5, para.0051) states the embodiment of fig. 5 can include any of the multi-layer interconnect pillars from figs. 1-4. Examiner elects the embodiment of fig. 5 including the multi-layer interconnect pillar from the embodiment of fig. 2.
Jadhav (see, e.g., fig. 2, fig. 5) shows a device comprising
a substrate 50 (see, e.g., para.0051) including an interface (top surface of 70, see, e.g., para.0052);
a die 60 (see, e.g., para.0051) including a contact pad 12 (see, e.g., para.0018);
a multi-layer interconnect pillar 10 (see, e.g., para.0051) disposed between the substrate and the die and electrically connected to the contact pad, the multi-layer interconnect pillar comprising:
a base reinforcement layer 20 (above 18a, see, e.g., annotated figure 1, para.0034);
a cap reinforcement layer 20 (below 18b, see, e.g., annotated figure 1, para.0034);
a solder layer disposed between the base reinforcement layer and the cap reinforcement layer 18b (see, e.g., para.0031);
and a copper pillar 16a (see, e.g., para.0028) electrically coupled to the solder layer via the base reinforcement layer 20 (above 18a) or the cap reinforcement layer 20 (below 18b),
wherein the copper pillar 16a (5-30 µm, see, e.g., para.0028) is thicker than each of the base reinforcement layer (1-2 µm, see, e.g., para.0030), the cap reinforcement layer (1-2 µm, see, e.g., para.0030), and the solder layer 18b (5-20 µm, see, e.g., para.0032);
and a solder cap 22 (see, e.g., para.0034) electrically connected to the multi-layer interconnect pillar and to the interface.
Regarding Claim 24, Jadhav shows the device of claim 23, further comprising
one or more under bump metallization (UBM) 14 (see, e.g., para.0019) layers coupled to and disposed between the contact pad and to the multi-layer interconnect pillar.
Regarding Claim 25, Jadhav shows the device of claim 23, further comprising
a barrier layer 16c (see, e.g., para.0034) coupled to and disposed between the solder cap 22 and the multi-layer interconnect pillar 10.
Regarding Claim 27, Jadhav shows the device of claim 25,
wherein the barrier layer 16c comprises copper (see, e.g., para.0034).
Regarding Claim 28. Jadhav shows the device of claim 23,
wherein the multi-layer interconnect pillar further comprises:
one or more intermediate reinforcement layers (20 below 18a, 16b, 20 above 18b, see, e.g., annotated figure 2) disposed between the cap reinforcement layer 20 (below 18b) and the base reinforcement layer 20 (above 18a);
and one or more additional solder layers 18a (see, e.g., para.0029),
wherein solder layers and reinforcement layers alternate in the multi-layer interconnect pillar.
Regarding Claim 29, Jadhav (see, e.g., para.0034) discloses element 16c can also be the copper pillar satisfying the limitations of Claim 23 on which Claim 29 depends. Therefore, Jadhav shows the device of claim 23,
wherein the copper pillar 16c is positioned between the cap reinforcement layer 20 (below 18b) and the solder cap 22 (see, e.g., fig. 2).
Regarding Claim 30, Jadhav shows the device of claim 23,
wherein the cap reinforcement layer 20 (below 18b) and the base reinforcement layer 20 (above 18a) comprise nickel, cobalt, or both (see, e.g., para.0030).
Claim 26 is rejected under 35 U.S.C. 103 as being unpatentable over Jadhav (US 20090095502) in view of Arvin (US 20140262458).
Regarding Claim 26, Jadhav shows the device of claim 25,
Jadhav, however, fails to explicitly state
wherein a material of the solder cap forms Intermetallic compounds (IMCs) with a material of the barrier layer at a first rate,
wherein the material of the solder cap forms IMCs with a material of the cap reinforcement layer at a second rate,
and wherein the first rate is greater than the second rate.
Arvin (see, e.g., para.0030), in a similar device to Jadhav, teaches
wherein a material of the solder cap 30 forms Intermetallic compounds (IMCs) with a material of the barrier layer 17 (copper) at a first rate,
wherein the material of the solder cap forms IMCs with a material of the cap reinforcement layer 18 (nickel) at a second rate,
and wherein the first rate is greater than the second rate.
Arvin (see, e.g., para.0030) states the material of the barrier layer 17, copper, has a first rate greater than a second rate of the material of the cap reinforcement layer 18, nickel, when reacting with the solder cap 30.
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to interpret the following limitations of Jadhav, in view of Arvin.
wherein a material of the solder cap 22 forms Intermetallic compounds (IMCs) with a material of the barrier layer 16c (copper) at a first rate,
wherein the material of the solder cap forms IMCs with a material of the cap reinforcement layer 20 (nickel) at a second rate,
and wherein the first rate is greater than the second rate.
Response to Arguments
Applicant’s arguments, filed 04/28/2026, with respect to claim(s) 1-30 have been considered but are moot because the new ground of rejection does not rely on the same combination of references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FERNANDO JOSE RAMOS-DIAZ whose telephone number is (571) 270-5855. The examiner can normally be reached Mon-Fri 8am-5pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Loke can be reached on 571-272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/F.R.D./ Examiner, Art Unit 2818
Examiner, Art Unit 2818
/STEVEN H LOKE/Supervisory Patent Examiner, Art Unit 2818
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