DETAILED ACTION
This office action is in response to the RCE filed 6/5/2026.
Currently, claims 1-2, 4-11 and 13-22 are pending, of which claims 19-22 are withdrawn from consideration.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 4, 6-11, 13 and 15-18 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Hsu et al. (US 2024/0203785).
Pertaining to claims 1 and 10, Hsu shows, with reference to FIG. 1G, a semiconductor device/RFSOI switch, comprising:
a transistor (T) including source/drain regions (22/24) in a semiconductor-on-insulator (SOI) layer (10c) of an SOI substrate (10a/b) and a gate (32) over the SOI layer, the gate having a gate body;
an etch stop layer (26a) on the source/drain regions but not on a top surface of the gate body;
an interconnect layer (28a/36/42/62) over the transistor, the interconnect layer including a dielectric layer (62), wherein the dielectric layer includes a first material and the etch stop includes a second material different from the first material (para. [0018] – [0019]); and
a cavity/air gap (AG1) extending partially through the interconnect layer above the gate,
wherein a portion of the dielectric layer (62) is on the top surface of the gate body and defines a bottom of the cavity/air gap (dielectric layer is on the top surface of the gate body with layer 34 intervening therebetween, meeting the term “on” as it is defined in the specification in para. [0023]).
Pertaining to claims 2 and 11, Hsu shows the dielectric layer is continuous within the interconnect layer including the portion of the dielectric layer over the gate body (FIG. 1G).
Pertaining to claims 3 and 12, Hsu shows the dielectric layer is devoid of seams within the interconnect layer (FIG. 1G).
Pertaining to claims 4 and 13, Hsu shows the gate further includes a sidewall spacer adjacent the gate body (para. [0016], lines 14-18), and the gate body includes a silicide upper surface (para. [0016], lines 7-12), wherein the etch stop layer is laterally adjacent to the sidewall spacer (para. [0049], lines 7-11; para. [0050], lines 2-3; para. [0052], lines FIG. 1G), and wherein the gate includes a coplanar upper surface defined by the silicide upper surface and end surfaces of the sidewall spacer and end surfaces the etch stop layer (para. [0016], lines 7-12; para. [0049], lines 7-11; para. [0050], lines 2-3; FIG. 1G).
Pertaining to claims 6 and 15 Hsu shows a lower surface of the cavity/ air gap defined by the portion of the dielectric layer is parallel to the coplanar upper surface of the gate (FIG. 1G).
Pertaining to claims 7 and 16, Hsu shows the interconnect layer includes a local interconnect layer (28a/34) over the transistor and a first metal layer (36/40) over the local interconnect layer, and the dielectric layer (62) of the interconnect layer around the cavity covers any conductive wire (46) in the first metal layer or any conductive via (38) in the local interconnect layer (covers in plan view).
Pertaining to claims 8 and 17, Hsu shows the first metal layer includes a first metal cap layer (40) at an upper surface thereof, and wherein a width of the cavity/air gap (AG1) in the first metal cap layer (at n1) is less than a width of the cavity/air gap in a dielectric layer (36) of the first metal layer below the first metal cap layer (at P1).
Pertaining to claim 9, Hsu shows the cavity includes one of a gas and a vacuum therein (air – para. [0022]).
Pertaining to claim 18, Hsu shows the air gap is laterally elongated (para. [0027]; FIG. 3).
Allowable Subject Matter
Claims 5 and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The reasons for the indication of allowable subject matter can be found in the office action dated 10/9/2025.
Response to Arguments
Applicant’s arguments with respect to the previous rejections under 35 U.S.C. 112(b) are persuasive. However, the claims are not allowable, as the claims as amended stand rejected under 35 U.S.C. 102(a)(2) as discussed above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL M LUKE whose telephone number is (571)270-1569. The examiner can normally be reached Monday-Friday, 9am-5pm, EST.
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/DANIEL LUKE/Primary Examiner, Art Unit 2896
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