Prosecution Insights
Last updated: July 17, 2026
Application No. 18/332,540

INTEGRATED SYSTEM IN PACKAGE

Final Rejection §103
Filed
Jun 09, 2023
Examiner
JAHAN, BILKIS
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Advanced Micro Devices Inc.
OA Round
2 (Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
807 granted / 912 resolved
+20.5% vs TC avg
Moderate +10% lift
Without
With
+10.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
22 currently pending
Career history
947
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
76.7%
+36.7% vs TC avg
§102
8.9%
-31.1% vs TC avg
§112
7.4%
-32.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 912 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Attorney Docket Number: 211011-013801/US Filling Date: 06/09/23 Inventor: Suryakumar Examiner: Bilkis Jahan DETAILED ACTION In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 6-11 and 15-18 are rejected under 35 U.S.C. 103 as being unpatentable over Refai-Ahmed et al (US 2012/0075807 A1, Ahmed hereinafter) in view of Peng et al (US 2021/0343650 A1). Regarding claim 1, Ahmed discloses a device package (Fig. 1) comprising: a first component 35 (Para. 23) having a first thermal regulation surface 75 (Para. 26, top surface); a second component 15 (Para. 28) having a second thermal regulation surface 80 (Para. 28, bottom surface); wherein the second component 15 is mounted on the first component 35 such that the second thermal regulation surface 80 is opposite the first thermal regulation surface 75. Ahmed does not explicitly disclose at least one vertical connection for delivering power between the first component and the second component. However, Peng discloses at least one vertical connection (Fig. 1Cb, elements V, BSPD1, Para. 54) for delivering power between the first component D1 (Para. 63) and the second component D2 (Paras. 24-25). Peng teaches the above modification is used to distribute power of the device (Para. 59). It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to combine Ahmed structure with Peng structure as suggested above to distribute power of the device (Para. 59). Regarding claim 2, Ahmed discloses the device package of claim 1, further comprising a third component 30 (Para. 23) mounted between the first component 35 and the second component 15. Regarding claim 6, Ahmed discloses the device package of claim 2, wherein the third component 30 corresponds to a memory (Para. 23). Regarding claim 7, Ahmed discloses the device package of claim 1, further comprising a thermal management device 75 (bottom fins) mounted on the first thermal regulation surface 75 (top portion). Regarding claim 8, Ahmed discloses the device package of claim 1, wherein the first component 35 corresponds to a processing unit (Para. 23). Regarding claim 9, Peng further discloses the device package of claim 1, wherein the second component corresponds to a voltage regulator of a power delivery circuit (Paras. 24-25, D1 is an IC and includes voltage regulator) and is directly connected to the at least one vertical connection (elements V, BSPD1). Regarding claim 10, Ahmed discloses a system (Fig. 1) comprising: a printed circuit board (PCB) 85 (Para. 29) having a hole 75; and a device package 10 mounted on the PCB 85 and comprising: a first component 35 (Para. 23) having a first thermal regulation surface 75 (Para. 26, bottom surface, between fins); a second component 15 (Para. 28) having a second thermal regulation surface 80 (Para. 28, bottom surface); wherein the second component 15 is mounted on the first component 35 such that the second thermal regulation surface 80 is opposite the first thermal regulation surface 75, and the first thermal regulation surface 75 (surface between the fins) is exposed through the hole (between the fins). Ahmed does not explicitly disclose at least one vertical connection for delivering power between the first component and the second component. However, Peng discloses at least one vertical connection (Fig. 1Cb, elements V, BSPD1, Para. 54) for delivering power between the first component D1 (Para. 63) and the second component D2 (Paras. 24-25). Peng teaches the above modification is used to distribute power of the device (Para. 59). It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to combine Ahmed structure with Peng structure as suggested above to distribute power of the device (Para. 59). Regarding claim 11, Ahmed discloses the system of claim 10, wherein the device package further comprises a third component 30 (Para. 23) mounted between the first component 35 and the second component 15. Regarding claim 15, Ahmed discloses the system of claim 11, wherein the third component 30 corresponds to a memory (Para. 23). Regarding claim 16, Ahmed discloses the system of claim 10, further comprising a thermal management device 75 (bottom fins) mounted on the first thermal regulation surface 75 (bottom surface of the fins hole) through the hole (Fig. 1). Regarding claim 17, Ahmed discloses the system of claim 10, wherein the first component 35 corresponds to a processing unit (Para. 23). Regarding claim 18, Peng further discloses the system of claim 10, wherein the second component corresponds to a voltage regulator of a power delivery circuit (Paras. 24-25, D1 is an IC and includes voltage regulator) and is directly connected to the at least one vertical connection (elements V, BSPD1). Claim(s) 1 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Refai-Ahmed et al (US 2012/0075807 A1, Ahmed hereinafter) in view of Yu et al (US 2022/0384374 A1). Regarding claim 1, Ahmed discloses a device package (Fig. 1) comprising: a first component 35 (Para. 23) having a first thermal regulation surface 75 (Para. 26, top surface); a second component 15 (Para. 28) having a second thermal regulation surface 80 (Para. 28, bottom surface); wherein the second component 15 is mounted on the first component 35 such that the second thermal regulation surface 80 is opposite the first thermal regulation surface 75. Ahmed does not explicitly disclose at least one vertical connection for delivering power between the first component and the second component. However, Yu discloses at least one vertical connection (Fig. 15, element 30, Para. 15) for delivering power between the first component 22 (Para. 17) and the second component 68 (Para. 42). Peng teaches the above modification is used to regulate voltage of the device (Para. 17). It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to combine Ahmed structure with Yu structure as suggested above to regulate voltage of the device (Para. 17). Regarding claim 10, Ahmed discloses a system (Fig. 1) comprising: a printed circuit board (PCB) 85 (Para. 29) having a hole 75; and a device package 10 mounted on the PCB 85 and comprising: a first component 35 (Para. 23) having a first thermal regulation surface 75 (Para. 26, bottom surface, between fins); a second component 15 (Para. 28) having a second thermal regulation surface 80 (Para. 28, bottom surface); wherein the second component 15 is mounted on the first component 35 such that the second thermal regulation surface 80 is opposite the first thermal regulation surface 75, and the first thermal regulation surface 75 (surface between the fins) is exposed through the hole (between the fins). Ahmed does not explicitly disclose at least one vertical connection for delivering power between the first component and the second component. However, Yu discloses at least one vertical connection (Fig. 15, element 30, Para. 15) for delivering power between the first component 22 (Para. 17) and the second component 68 (Para. 42). Peng teaches the above modification is used to regulate voltage of the device (Para. 17). It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to combine Ahmed structure with Yu structure as suggested above to regulate voltage of the device (Para. 17). Claim(s) 3-5 and 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Refai-Ahmed et al (US 2012/0075807 A1, Ahmed hereinafter) in view of Peng et al (US 2021/0343650 A1) and further in view of Chen et al (US 2022/0367306 A1). Regarding claim 3, Ahmed in view of Peng does not explicitly disclose the device package of claim 2, wherein the third component comprises a package mold having a through mold via (TMV) coupling the first component to the second component. However, Chen discloses the third component 30 (Fig. 1, Para. 26) comprises a package mold 36 (Para. 34) having a through mold via (TMV) 32 (Para. 37) coupling the first component 70 (Para. 28) to the second component (Ahmed). Chen teaches the above modification is used to make connection of the device (Fig. 1). It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to combine Ahmed in view of Peng structure with Chen through mold via as suggested above to make connection of the device (Fig. 1). Regarding claim 4, Ahmed discloses the device package of claim 3, further comprising a passive component (Para. 23) for the first component 35 or the second component that includes the TMV 65 (Para. 25). Regarding claim 5, Chen discloses the device package of claim 4, wherein the passive component 70 comprises the TMV 32 encapsulated in a magnetic medium or a high dielectric medium 36. Regarding claim 12, Ahmed in view of Peng does not explicitly disclose the system of claim 11, wherein the third component comprises a package mold having a through mold via (TMV) coupling the first component to the second component. However, Chen discloses the third component 30 (Fig. 1, Para. 26) comprises a package mold 36 (Para. 34) having a through mold via (TMV) 32 (Para. 37) coupling the first component 70 (Para. 28) to the second component (Ahmed). Chen teaches the above modification is used to make connection of the device (Fig. 1). It would have been obvious to one of the ordinary skill of the art before the effective filling date of the claimed invention to combine Ahmed in view of Peng structure with Chen through mold via as suggested above to make connection of the device (Fig. 1). Regarding claim 13, Ahmed discloses the system of claim 12, further comprising a passive component (Para. 23) for the first component 35 or the second component that includes the TMV 65 (Para. 25). Regarding claim 14, Chen discloses the system of claim 13, wherein the passive component 70 comprises the TMV 32 encapsulated in a magnetic medium or a high dielectric medium 36. Response to Arguments Applicant’s arguments with respect to claim(s) 1-17 and 18 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BILKIS JAHAN whose telephone number is (571)270-5022. The examiner can normally be reached Monday-Friday, 8:00 am-5 Pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon T Fletcher can be reached at (571)272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. BILKIS . JAHAN Primary Examiner Art Unit 2817 /BILKIS JAHAN/Primary Examiner, Art Unit 2817
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Prosecution Timeline

Jun 09, 2023
Application Filed
Oct 29, 2025
Non-Final Rejection mailed — §103
Jan 22, 2026
Response Filed
Apr 14, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+10.4%)
2y 4m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 912 resolved cases by this examiner. Grant probability derived from career allowance rate.

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