Prosecution Insights
Last updated: September 17, 2026
Application No. 18/333,679

SEMICONDUCTOR DEVICE

Non-Final OA §112
Filed
Jun 13, 2023
Priority
May 12, 2022 — RE 10-2022-0058272 +1 more
Examiner
KIM, JAY C
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Wavepia Co. Ltd.
OA Round
3 (Non-Final)
49%
Grant Probability
Moderate
3-4
OA Rounds
3m
Est. Remaining
71%
With Interview

Examiner Intelligence

Grants 49% of resolved cases
49%
Career Allowance Rate
429 granted / 871 resolved
-18.7% vs TC avg
Strong +22% interview lift
Without
With
+21.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
53 currently pending
Career history
928
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
40.9%
+0.9% vs TC avg
§102
13.9%
-26.1% vs TC avg
§112
43.5%
+3.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 871 resolved cases

Office Action

§112
DETAILED ACTION This Office Action is in response to RCE filed April 24, 2026. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-3, 5, 6 and 8 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor, at the time the application was filed, had possession of the claimed invention. (1) Regarding claim 1, Applicants originally disclosed in paragraph [0013] of current application that “The present invention is also directed to providing a semiconductor device in which a heat dissipation function and a temperature measurement function of the semiconductor device are organically performed, thereby accurately measuring the temperature of a main heat source of a transistor (emphasis added)”, and in paragraph [0022] of current application that “The active layer may include a channel region generated in the active layer when the transistor turns on, and at least one temperature sensor disposed in the active layer and having electrical properties changed according to a temperature of the transistor (emphases added).” However, Applicants did not originally disclose “a thermo-variable resistor having a resistance value changed according to a temperature of a corresponding transistor of the at least one transistor (emphasis added)” recited on lines 9-11, because (a) Applicants did not use the word “corresponding” in the original disclosure, (b) it appears that the limitation cited above suggests that a resistance value of one thermo-variable resistor changes according to a temperature of only one transistor out of a plurality of transistors, which is not disclosed in the original specification, (c) rather, as shown in Figs. 2 and 4 of current application, there are four transistors all sharing the claimed active layer, which should be thermally conductive, (d) furthermore, all of the four transistors shown in Figs. 2 and 4 of current application would be electrically connected and/or thermally connected with each other through the claimed lower metal layer 110/310 if arguendo each of the transistors 140/340 is at a uniform temperature, see also the 35 USC 112(b) rejection below regarding “a temperature of a corresponding transistor”, and (e) therefore, one thermo-variable resistor would not be able to be responsive to a temperature of a corresponding only one transistor to change its resistance, but rather all the transistors would affect the resistance value of the one thermo-variable resistor, rendering the amended claim 1 noncompliant with the written description requirement. (2) Further regarding claim 1, Applicants did not originally disclose “a thermo-variable resistor having a resistance value changed according to a temperature of a corresponding transistor of the at least one transistor (emphasis added)” recited on lines 9-11, because (a) it appears that Applicants refer to the element 140 in Fig. 2 and 340 in Fig. 4 of current application as a transistor, (b) however, all of the four transistors shown in Figs. 2 and 4 of current application share a gate line 144/344, and therefore, there cannot be any “corresponding transistor” for measuring “a temperature of a corresponding transistor” since the at least the four gate electrodes of the four transistors shown in Figs. 2 and 4 of current application should be at the same temperature, (c) also, Figs. 2 and 4 of current application do not show the entirety of the transistor since the alleged transistor shown in Figs. 2 and 4 of current application should be electrically connected to additional electrodes/conductors and should also be encapsulated with at least one insulating material, neither of which are shown in Figs. 2 and 4 of current application, (d) therefore, when additional electrodes/conductors and at least one insulating material are parts of the claimed transistor, depending on how the four transistors are arranged with the additional electrodes/conductors and at least one insulating material, the “temperature of a corresponding transistor” would have different profiles, (e) for example, if some of the gate, source and drain electrodes are connected, there would be no “temperature of a corresponding transistor of the at least one transistor” since the connected electrodes should be at the same temperature, and (f) for another example, if an insulating material is blanket deposited on the four transistors shown in Figs. 2 and 4 of current application, there would be no “temperature of a corresponding transistor of the at least one transistor” since the four transistors should be at substantially the same temperature via the insulating material if the insulating material has a good enough thermal conductivity Claims 2, 3, 5, 6 and 8 depend on claim 1, and therefore, claims 2, 3, 5, 6 and 8 also fail to comply with the written description requirement. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-3, 5, 6 and 8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. (1) Regarding claim 1, it is not clear what the limitation “a thermo-variable resistor having a resistance value changed according to a temperature of a corresponding transistor of the at least one transistor (emphasis added)” recited on lines 9-11 suggests, because (a) as discussed above under the 35 USC 112(a) rejection, Applicants did not use the word “corresponding” in the original disclosure, (b) it is not clear whether the limitation cited above suggests that a resistance value of one thermo-variable resistor changes according to a temperature of only one transistor out of a plurality of transistors, which Applicants did not originally disclose as discussed above under the 35 USC 112(a) rejection, (c) if that is the case, it is not clear how a resistance value of one thermo-variable resistor can change according to a temperature of only one transistor out of a plurality of transistors since, as shown in Figs. 2 and 4 of current application, there are four transistors all sharing the claimed active layer, which should be thermally conductive, and the claimed lower metal layer, and (d) therefore, one thermo-variable resistor would not be able to be responsive to a temperature of a corresponding only one transistor to change its resistance, but rather all the transistors would affect the resistance value of the one thermo-variable resistor. (2) Also regarding claim 1, it is not clear what “a resistance value” recited on line 10 refers to, because (a) unlike a resistivity, which is an intrinsic electrical property of a material, “a resistance value” depends on at least three parameters, i.e. a resistivity of a material, a length of the material and a cross sectional area of the material, (b) therefore, depending on how “a resistance value” is defined, “a resistance value” may or may not be changed, especially when Applicants do not specifically claim any material composition and crystallinity of “a thermo-variable resistor”, (c) in other words, depending on whether “a thermo-variable resistor” is formed of a metal or a semiconductor, and depending on whether “a thermo-variable resistor” is in an amorphous, polycrystalline or single crystalline phase, the claimed “resistance value” would vary and respond to its surrounding structure in different manners and ways, (d) furthermore, depending on whether “a resistance value” is measured between two side surfaces of the thermo-variable resistor 170/370 or between the top and bottom surfaces of the thermo-variable resistor 170/370 in Figs. 2 and 4 of current application, the claimed “resistance value” would be different, (e) however, Applicants did not originally disclose and do not specifically claim how “a resistance value” of “a thermo-variable resistor” is defined and measured, and (f) in this case, it is not clear how one of ordinary skill in the art can unambiguously determine whether the limitation “a thermo-variable resistor having a resistance value changed according to a temperature of a corresponding transistor of the at least one transistor” is met without clearly recognizing what “a resistance value” refers to and how it is defined/measured. (3) Further regarding claim 1, it is not clear what “a temperature of a corresponding transistor of the at least one transistor” recited on lines 10-11 refers to, because (a) Applicants refer to the element 140 in Fig. 2 and 340 in Fig. 4 of current application as a transistor in the original disclosure, PNG media_image1.png 262 534 media_image1.png Greyscale (b) however, the transistor 140 does not include the claimed active layer 130, which is clear in that Applicants claim “an active layer disposed between the semiconductor substrate and the at least one transistor” on line 7, (c) therefore, the transistor 140 that does not include the active layer 130 is basically constituted of the three electrodes, i.e. the gate electrode 143, the source electrode 145, the drain electrode 147 and the oxide layer 141, which should be a gate insulating layer, (d) in this case, the transistor 140 may not be at a uniform temperature since the three electrodes, which are good thermal conductors as well as being good electrical conductors, and the oxide layer, which is a poor thermal conductor as well as being a poor electrical conductor, cannot be at the same temperature, and (e) therefore, it is not clear what “a temperature of a corresponding transistor” refers to when the transistor itself is not at a uniform temperature. (4) Still further regarding claim 1, it is not clear how “a temperature of a corresponding transistor of the at least one transistor” recited on lines 10-11 is defined, and what “a corresponding transistor” is constituted of, because (a) it appears that Applicants refer to the element 140 in Fig. 2 and 340 in Fig. 4 of current application as a transistor as discussed above, (b) however, Figs. 2 and 4 of current application do not show the entirety of the transistor since the alleged transistor shown in Figs. 2 and 4 of current application should be electrically connected to additional electrodes/conductors and should also be encapsulated with at least one insulating material, neither of which are shown in Figs. 2 and 4 of current application, (c) therefore, when additional electrodes/conductors and at least one insulating material are parts of the claimed transistor, depending on how the four transistors are arranged with the additional electrodes/conductors and at least one insulating material, the “temperature of a corresponding transistor” would have different profiles, (d) for example, if some of the gate, source and drain electrodes are connected, there would be no “temperature of a corresponding transistor of the at least one transistor” as discussed above under the 35 USC 112(a) rejection since connected electrodes should be at the same temperature, (e) for another example, if an insulating material is blanket deposited on the four transistors shown in Figs. 2 and 4 of current application, there would be no “temperature of a corresponding transistor of the at least one transistor” as discussed above under the 35 USC 112(a) rejection since the insulating material may equalize temperatures of the four temperatures when it is a good enough thermal conductor, and (f) therefore, it is not clear what “a corresponding transistor” is constituted of, especially when the element 140/340 shown in Figs. 2 and 4 of current application are not exactly transistors that can function properly and independently without additional electrodes. Claims 2, 3, 5, 6 and 8 depend on claim 1, and therefore, claims 2, 3, 5, 6 and 8 are also indefinite. Response to Arguments Applicant’s arguments with respect to claim 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wu et al. (US 12,272,743) Ren et al. (US 2017/0294528) Piedra et al. (US 12,230,699) Lidow et al. (US 2012/0153300) Hikita et al. (US 2006/0060895) Park et al. (US 9,136,347) Yamada et al. (US 2013/0321082) Komaru et al. (US 5,225,707) Andoh (US 5,917,209) Viswanathan et al. (US 11,749,639) Bothe et al. (US 2020/0395475) Kosaka et al. (US 10,943,821) Green et al. (US 9,871,107) Hill et al. (US 8,410,580) Therrien et al. (US 8,350,288) Huang et al. (US 8,304,271) Noori et al. (US 11,863,130) Watts et al. (US 11,837,559) Ren et al. (US 10,312,358) Okamoto et al. (US 12,176,265) Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C KIM whose telephone number is (571) 270-1620. The examiner can normally be reached 8:00 AM - 6:00 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAY C KIM/Primary Examiner, Art Unit 2815 /J.K./Primary Examiner, Art Unit 2815 September 3, 2026
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Prosecution Timeline

Show 3 earlier events
Jan 26, 2026
Final Rejection mailed — §112
Mar 05, 2026
Interview Requested
Mar 10, 2026
Applicant Interview (Telephonic)
Mar 10, 2026
Examiner Interview Summary
Apr 13, 2026
Response after Non-Final Action
Apr 24, 2026
Request for Continued Examination
Apr 28, 2026
Response after Non-Final Action
Sep 09, 2026
Non-Final Rejection mailed — §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
49%
Grant Probability
71%
With Interview (+21.5%)
3y 6m (~3m remaining)
Median Time to Grant
High
PTA Risk
Based on 871 resolved cases by this examiner. Grant probability derived from career allowance rate.

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