DETAILED ACTION
This action is responsive to the application filed on 6/16/2023. Claims 1-20 are pending and have been examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 4-5 and 14-15 are objected to because of the following informalities:
In regard to claim 4 line 2 amend “the event filter” to “the configurable event filter” as to use language consistent with claim 1, line 12.
In regard to claim 5 line 2 amend “the event filter count” to “the configurable event filter to count” as to use language consistent with claim 1, line 12 and improve grammar.
In regard to claim 14 line 2 amend “the event filter” to “the configurable event filter” as to use language consistent with claim 11, line 13.
In regard to claim 15 line 2 amend “the event filter count” to “the configurable event filter to count” as to use language consistent with claim 11, line 13 and improve grammar.
Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 19-20 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 19-20 of copending Application No. 18/336,821 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because each of the claims of the reference application anticipates each of the claims of the instant application.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claims 1 and 11 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 11 of copending Application No. 18/336,821 in view of Knauth, PGPUB No. 2013/0262837. Although the claims at issue are not identical, they are not patentably distinct from each other because each of the above claims of the instant application is an obvious variant of a corresponding claim of reference application 18/336,821. (Note: This is a provisional nonstatutory double patenting rejection.)
However, claim 1 of reference application 18/336,821 does not disclose “…second circuitry including an opcode filter to filter the stream of events according to an opcode filter configuration; third circuitry including a datatype filter to filter the stream of events according to a datatype filter configuration”.
Knauth discloses second circuitry including an opcode filter to filter the stream of events according to an opcode filter configuration ([0018-0019 and 0023-0029]: wherein registers (element 206) include a main event filter (opcode) to filter a stream of events counted according to a configuration of main event filter)
third circuitry including a datatype filter to filter the stream of events according to a datatype filter configuration ([0018-0019 and 0023-0029]: wherein registers (element 209) include a subevent filter (element size or register size) to filter a stream of events counted according to a configuration of subevent filter)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the filter circuits of reference application 18/336,821 to filter instruction events based on opcode and datatype as taught in Knauth. It would have been obvious because using opcode and datatype filters can be used to improve accuracy in counting events for particular instruction types (Knauth [0015 and 0018]). In addition, adding additional filters can improve flexibility and provide a more fined tuned/precise event filtering mechanism.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “configurable event filter to filter”, “opcode filter to filter/pass”, datatype filter to filter/pass”, “event filter to count” and “filters to pass” in claims 1-2, 4-5, 8-9, 11-12, 14-15 and 17-19. The specific structure for the filters has not been disclosed by the specification, thus sufficient structure for the above functions has not been disclosed. Further, Fig. 32 discloses the filters (elements 3206-3210) as black box structures, without any details of what circuitry the filters comprise.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claims 1-2, 4-5, 8-9, 11-12, 14-15 and 17-19 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as claims 1-2, 4-5, 8-9, 11-12, 14-15 and 17-19 invoke 35 U.S.C. 112(f) but the written description fails to disclose each corresponding structure, material, or acts for the claimed functions. See claim construction above (e.g. the written description fails to disclose sufficient structure for various claimed filters to filter/pass events or count).
Claims 2-10, 12-18 and 20 are dependent claims and are further rejected for including deficiencies of one or more claims above.
12. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
13. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
14. Claims 1-2, 4-5, 8-9, 11-12, 14-15 and 17-19 invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for the claimed functions. From the specification it is unclear if a “filter” is limited to only a hardware selector circuit or if it is a combination of software and hardware (including software that sets configuration bits of a register and a hardware selector circuit) or is solely software. As the specification does not provide adequate disclosure, the claim boundaries are not known, thus rendering the claims indefinite. Applicant may: (a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph; or (b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the claimed function, without introducing any new matter (35 U.S.C. 132(a)). If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function applicant should clarify the record by either: (a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or (b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181.
Claims 2-10, 12-18 and 20 are dependent claims and are further rejected for including deficiencies of one or more claims above.
The examiner suggests amending the limitations to state filter circuitry to filter, as to correct the issue. For example, claim 1 should be amended to state “…circuit to filter the stream of events according to an event filter configuration; circuit to filter the stream of events according to an opcode filter configuration; circuit to filter the stream of events…” (note: amend the other claims similarly as suggested above)
Claim Rejections - 35 USC § 103
15. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
16. Claim(s) 1-2 and 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vaidya, PGPUB No. 2023/0297485, Kalafatis, USPAT No. 7,448,025 and further in view of Knauth, PGPUB No. 2013/0262837.
In regard to claim 1, Vaidya discloses A graphics processor (See Fig. 2, element 202 and see [0026-0027]) comprising: a memory interface; and a graphics processing cluster coupled with the memory interface (See Figs. 2-3: wherein a memory interface (element 205) is indirectly coupled to GPCs (elements 208) which are clusters that perform graphics operations and thus are graphics processing clusters (see [0027 and 0038])) the graphics processing cluster including a plurality of processing resources, each of the plurality of processing resources including: functional units to execute instructions associated with a render workload and a compute workload ([0027, 0035, 0038, 0040, 0045]: wherein a GPC includes a plurality of processing resources including execution units to execute instructions associated with render tasks and general processing/compute tasks)
and performance monitoring circuitry configured to generate a stream of events associated with the functional units, the stream of events related to execution of instructions associated with a plurality of workloads ([0037, 0053-0054,0063 and 0068] and See Figs. 2 : wherein performance monitoring unit generates a stream of events related to execution of instructions in GPCs) the performance monitoring circuitry including: first circuitry including a filter to filter the stream of events ([0059]: wherein a CCU (element 412) masks (filters) the stream of events to only acquire a subset of event data) and fourth circuitry to output performance monitoring data including a filtered stream of events. ([0059 and 0063-0068]: wherein elements 416 and 418 output performance monitoring data to memory including masked stream of events (See Fig. 4))
Vaidya does not disclose performance monitoring circuit including: first circuitry including a configurable event filter to filter the stream of events according to an event filter configuration; second circuitry including an opcode filter to filter the stream of events according to an opcode filter configuration; third circuitry including a datatype filter to filter the stream of events according to a datatype filter configuration. Vaidya does generally disclose performance monitoring unit masking (e.g. filtering) event data but does not disclose filtering based on a configurable event, opcode or datatype filters.
Kalafatis discloses first circuitry including a configurable event filter to filter the stream of events according to an event filter configuration (Column 4, lines 19-58: wherein a mux (element 40) is an event filter used to filter (select) a stream of events based on programmable configuration bits (ES) set in register (30) (see Fig. 1)) second circuitry including an filter to filter the stream of events according to an filter configuration (Column 4, lines 19-58: wherein a mux (element 50) filters (masks) stream of events based on programmable configuration bits (EM) set in register (30)) third circuitry including a filter to filter the stream of events according to a filter configuration (Column 4, lines 19-67: wherein logic circuit (element 60) filters event based on programmable configuration bits (EQ) set in register (30) (see Fig. 1))
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the performance monitoring circuitry of Vaidya to include multiple filters used to filter a stream of events as the performance monitoring circuitry of Kalafatis. It would have been obvious to one of ordinary skill in the art because it can be used for the benefit of characterizing multithreaded processors in real systems on a per-thread basis to improve (tune) application and operation system performance (Kalafatis: Column 2, lines 13-35 and Column 3, lines 3-20).
The combination of Vaidya and Kalafatis does not disclose an opcode filter to filter the stream of events according to an opcode filter configuration; third circuitry including a datatype filter to filter the stream of events according to a datatype filter configuration.
Knauth discloses filter the stream of events according to an opcode filter configuration ([0025-0027]: wherein events are only counted (filtered) according to main event configuration that specifies opcodes of floating-point operations)
filter the stream of events according to a datatype filter configuration. ([0026-0027]: wherein events are masked (filtered) according to a register size or element size associated with an instruction (See Figs. 2-3))
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the performance monitoring unit of Vaidya and Kalafatis which filter a stream of events to filter events based on opcodes and datatypes as the performance monitoring unit taught in Knauth. It would have been obvious because it would add flexibility and provide more fine tuning to performance monitoring circuitry. In addition, it can improve accuracy of performance monitoring (Knauth [0015 and 0019]).
Claim 11 is similarly rejected on the same basis as claim 1 above as claim 11 is the system corresponding to the processor of claim 1. (See Vaidya: See Fig. 1, system (element 100))
In regard to claim 2, the combination Vaidya, Kalafatis and Knauth discloses The graphics processor of claim 1 (see rejection of claim 1 above) the configurable event filter to pass a first set of events determined based on the event filter configuration. (Kalafatis: Column 4, lines 19-58: wherein a mux (element 40) is an event filter which passes a set of selected events based on programmable configuration bits (ES) set in register (30) (see Fig. 1))
Claim 12 is similarly rejected on the same basis as claim 2 above as claim 12 is the system corresponding to the processor of claim 2.
17. Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vaidya, PGPUB No. 2023/0297485, Palmer, PGPUB No. 2015/0178879 and further in view of Das, PGPUB No. 2017/0109251.
In regard to claim 19, Vaidya discloses A non-transitory machine-readable medium storing instructions, execution of which, causes one or more processors to perform operations ([0096-0098]) comprising: configuring performance monitoring circuitry of a graphics processor to select a set of events to monitor for a concurrently executed render workload and an compute workload to be executed by the graphics processor ([0027, 0032, 0035, 0037, 0051, 0054-0055]: wherein performance monitoring circuit (element 250) of a graphics processor is configured to select events to monitor for concurrently executed render tasks/workloads and general computer workloads/tasks (See Figs. 2-4)) configuring a first set of event filters to pass events related to a render context that is associated with the render workload; configuring a second set of event filters to pass events related to a compute context that is associated with the compute workload ([0032, 0035, 0052, 0059, 0066-0069]: wherein a set of counter collection units can mask (filter) events related to contexts associated with tasks/workloads as to allow certain events to pass. Wherein the disclosure discusses performance monitoring of both render tasks/workloads and general compute tasks/workloads therefore multiple sets of counter collection units can mask (filter) events for both render tasks/workloads and general compute tasks/workloads (See Fig. 4)) read first data for events related to the render context from a first memory location that is specified to store performance monitoring data for the render context and read second data for events related to the compute context from a first memory location that is specified to store performance monitoring data for the compute context. ([0032, 0035, 0052, 0059, 0066-0069 and 0080]: wherein performance monitoring data corresponding to render context/tasks and compute context/tasks stored in context/virtual memories are read)
Vaidya does not disclose asynchronous compute workload nor and during execution of the render workload and the asynchronous compute workload, read first data for events related to the render context from a first memory location that is specified to store performance monitoring data for the render context and concurrently read second data for events related to the compute context from a first memory location that is specified to store performance monitoring data for the compute context. Vaidya does generally discuss executing commands asynchronously but does not explicitly disclose asynchronous computing workloads.
Palmer discloses asynchronous compute workload ([0065-0066]: wherein asynchronous compute task is performed in parallel to graphics tasks)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the generic computing task performed in parallel to the rendering task in Vaidya to include asynchronous task as taught in Palmer. It would have been obvious to one of ordinary skill in the art because it would have been the simple substitution of one known element (executing asynchronous tasks in parallel as in Palmer) for another (executing generic computing tasks in parallel as in Vaidya) to yield predictable results (executing rendering graphics tasks and asynchronous tasks in parallel) (MPEP 2143, Example B).
The combination of Vaidya and Palmer does not disclose during execution of the render workload and the asynchronous compute workload, read first data for events related to the render context from a first memory location that is specified to store performance monitoring data for the render context and concurrently read second data for events related to the compute context from a first memory location that is specified to store performance monitoring data for the compute context. Vaidya discloses reading performance event data from context memories; however, it does not disclose reading multiple context memories concurrently.
Das discloses during execution, read first data for events related to a thread context from a first memory location that is specified to store performance monitoring data for the thread context and concurrently read second data for events related to a second thread context from a first memory location that is specified to store performance monitoring data for the second thread context. ([0065, 0087-0088 and 0112-0113]: wherein performance data is read from performance data memory tables for each thread context concurrently over lifetime of thread execution (See Fig. 6))
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the system of Vaidya to read performance monitoring data event context memories concurrently as taught in Das. It would have been obvious because it can be used to provide concurrent and accurate/precise performance assessments and increase reliability of a system. (Das [0047 and 0053]).
18. Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vaidya, Palmer, Das and further in view of Neufeld, USPAT No. 6,167,538.
In regard to claim 20, the combination of Vaidya, Palmer, and Das discloses The non-transitory machine-readable medium of claim 19 (see rejection of claim 19 above) first performance monitoring data for the render context; and second performance monitoring data for the compute context, the first performance data differentiated from the second performance data (Vaidya [0032, 0035, 0052, 0059, 0066-0069 and 0080]: wherein performance monitoring data corresponding to render context/tasks and compute context/tasks stored in context/virtual memories are disclosed in two different memories and thus are differentiated)
The combination of Vaidya, Palmer, and Das does not disclose the operations further comprising displaying first performance monitoring data for the render context; and displaying second performance monitoring data for the compute context. Vaidya does disclose displaying data using a display device (See Fig. 1, element 110), however it does not disclose displaying performance monitoring data.
Neufeld discloses displaying performance monitoring data (Column 7, lines 36-45)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the performance monitoring system including a display of Vaidya to display performance monitoring data as taught in Neufeld. It would have been obvious to one of ordinary skill in the art because it would have been the simple substitution of one known element (displaying performance monitoring data on a display to a user as in Neufeld) for another (displaying generic data on a display to a user as in Vaidya) to yield predictable results (displaying performance monitoring data on a display to a user) (MPEP 2143, Example B). It can be used for the benefit of allowing an administrator to use such data in a meaningful way to improve a system (Neufeld: Column 7, lines 36-45)
Allowable Subject Matter
19. Claims 3-10 and 13-18 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112, set forth in this Office action and to include all the limitations of the base claim and any intervening claims.
20. The following is a statement of reasons for the indication of allowable subject
matter:
The prior art of record, alone or in combination, fails to disclose or render obvious
claim 3 filed on 6/16/2023. The prior art of record has not taught either individually or in
combination and together with all other claimed features “The graphics processor of claim 2, the event filter configuration specified to the configurable event filter via a flexible event filter controller, the event filter configuration including: a first event filter configuration to configure how operations are counted for executed instructions; and a second event filter configuration to enable or disable counting of synchronization operations” as claimed in claim 3.
The closest prior art of record, Kalafatis and Junkins (PGPUB No. 2008/0301700) teach control select registers which are programmable and allow certain events to be tracked and filtered in a performance monitor unit based on the configuration of the registers. For example, both references disclose filtering events based on hardware threads and based on a number of instructions executed which include floating-point operations or cache access operations. However, neither reference discloses “… the event filter configuration specified to the configurable event filter via a flexible event filter controller, the event filter configuration including: a first event filter configuration to configure how operations are counted for executed instructions; and a second event filter configuration to enable or disable counting of synchronization operations” as claimed.
Furthermore, while some limitations may be broadly disclosed in the references
above and in the pertinent art section below, the specific combination of limitations
would not be obvious as claimed absent impermissible hindsight.
Claim 13 is similarly rejected on the same basis as claim 3 above.
Claims 4-10 and 14-18 are dependent upon one of claims 3 and 13 above and
therefore, are similarly allowable for the same reasons as claims 3 and 13.
Conclusion
21. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Junkins, PGPUB No. 2008/0301700 for teaching filtering performance monitoring information using a filter register and a control event select register
Damron, USPAT No. 6,725,363 for teaching filtering instructions for precise event counts which are cache misses or include specific instruction opcodes
Allen, USPAT No. 8,253,748 for teaching performance registers tracking events for shader programs
22. Any inquiry concerning this communication or earlier communications from the examiner should be directed to COURTNEY P SPANN whose telephone number is (571)431-0692. The examiner can normally be reached M-F, 9am-6pm, EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached at 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/COURTNEY P SPANN/ Primary Examiner, Art Unit 2183
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