Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 06/03/2026 has been entered.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. (US20220138906) hereafter Lin in view of Saleh et al (US20180040097) hereafter Saleh and in further view of Sun (US20070031065) hereafter Sun.
1. Regarding claim 1, Lin discloses a computer-implemented method (figs 1-2, 4-9, 17-18 and 20-22 and paras 0003-0010, 0073-0077, 0079-0111, 0186-0196, 0198-0199, 0204-0215 shows and discloses a computer-implemented method), comprising:
determining one or more performance values (figs 4-5, 17-18, 20-22 and paras 0091-0094, 0099-0107, 0204, 0210, 0215 discloses determining one or more filter parameters corresponding to each pixel in the first image and pixels with different texture features corresponds to different filter parameters meeting the above claim limitations of determining one or more performance values for the computer system, para 0107 discloses “An (x, y).sup.th filter parameter in an i.sup.th channel of the image filter is a product of a pixel value of an (x, y).sup.th pixel in an i.sup.th local texture image and a weight value of the i.sup.th local texture image. i is a positive integer less than or equal to C, x is a positive integer less than or equal to M, y is a positive integer less than or equal to N, M is a quantity of pixels horizontally included in the first image, N is a quantity of pixels vertically included in the first image, and M and N are both integers greater than 1.”);
receiving an input image at a first resolution that is to be provided for display, by the computing device, at a second resolution that is higher than the first resolution (figs 1-2, 17-18 and 20-22, paras 0005-0010, 0073-0077, 0079, 0082, 0086-0087, 0196-0199 shows and discloses receiving an input image at a first resolution that is to be provided for display, by the computing device, at a second resolution that is higher than the first resolution);
determining, based in part upon the one or more performance values (figs 1-2, 4-7 and 17-18, 20-22 and paras 0077, 0082, 0085-0086, 0091-0111, 0116, 0186-0199, 0228 and 0233 shows and discloses determining, based in part upon the one or more performance values, a number of texture operations to be performed for at least one pixel location of an output image at the second resolution (i.e super resolution image) meeting the claim limitations);
determining, for the at least one pixel location of the output image, one or more output pixel values using the upsampling algorithm and by performing the determined number of texture operations (figs 1-2, 4-9, 17-18, 20-22 and paras 0081, 0085-0111, 0186-0199 shows and discloses determining, for the at least one pixel location of the output image, one or more output pixel values using the upsampling algorithm and by performing the determined number of texture operations); and
generating the output image at the second resolution using the one or more determined output pixel values (figs 1, 8, 17-18 and 20-22, paras 0186-0199 shows and discloses obtaining/generating super resolution output image using the one or more determined output pixels meeting the above claim limitations). As seen above Lin discloses determining the one or more performance values for the computer system. Lin is silent and however fails to disclose determining one or more performance values relating to operation of at least one processing unit of a computing device.
Saleh discloses determining one or more performance values relating to operation of at least one processing unit of a computing device (figs 1-4 and paras 0018, 0042, 0068, 0070, 0081, 0085, 0087-0108 discloses determining one or more performance values relating to operation of at least one processing unit (GPU) of a computing device 2 meeting the above claim limitations). As seen above Lin discloses determining a number of texture operations based on the one or more performance values and Saleh also discloses determining one or more performance values relating to the operation of the at least one processing unit of the computing device. Lin and Saleh are however silent and fails to disclose determining texture operations corresponding to a number of texture sample locations accessed by an upsampling algorithm.
Sun discloses determining texture operations corresponding to a number of texture sample locations accessed by an upsampling algorithm (figs 1-2, paras 0004, 0021, 0023, 0026, 0037, 0049 and 0064 determining texture operations corresponding to a number of texture sample locations accessed by an upsampling algorithm (i.e luma texture upsampling of the image having the texture sample locations (as seen in fig 1 and at paras 0020-0021) meeting the above claim limitations.) Before the effective filing date of the invention was made, Lin, Saleh and Sun are combinable because they are from the same field of endeavor and analogous art of image processing. The suggestion/motivation would be an efficient and quick (faster) process/system taught by Saleh at para 0026 and a reduced computational complexity (i.e faster processing) system as taught by Sun at paras 0049 and 0064. Therefore, it would be obvious and within one of ordinary skill in the art to have recognized the advantages of Saleh and Sun in the method of Lin to obtain the invention as specified by the claim 1.
2. Regarding claim 2, Lin, Saleh and Sun disclose the computer-implemented method of claim 1. Lin discloses further comprising: setting one or more sample weight values of the upsampling algorithm to a zero value to reduce the number of texture operations performed for the at least one pixel location to the determined number (fig 8 and paras 0101,0113 shows and discloses setting weight value of the local texture to be 0 (i.e reduce the number of texture operations) which later is used with the filter for upsampling and outputting super resolution image as seen in figs 17-18 meeting the above claim limitations). Lin Saleh and Sun in combination would therefore meet the limitations of claim 2.
3. Regarding claim 3, Lin, Saleh and Sun disclose the computer-implemented method of claim 2. Lin discloses further wherein increasing a number of sample weights set to a zero value decreases the number of texture operations performed for the at least one pixel to allow the upsampling algorithm to be executed on the computing device while satisfying one or more performance criteria (fig 8 and paras 0101,0113 shows and discloses setting weight value of the local texture to be 0 (i.e decrease the number of texture operations) which later is used with the filter (satisfying one or more performance criteria) for upsampling and outputting super resolution image as seen in figs 17-18 meeting the above claim limitations). Lin Saleh and Sun in combination would therefore meet the limitations of claim 3.
4. Regarding claim 4, Lin, Saleh and Sun disclose the computer-implemented method of claim 1. Saleh disclose further wherein the at least one processing unit includes at least a graphics processor (Figs 1-4 and paras 0018, 0042, 0068, 0070, 0081, 0085, 0087-0108 discloses wherein the at least one processing unit includes at least a graphics processor (GPU) of a computing device 2 meeting the above claim limitations). Lin Saleh and Sun in combination would therefore meet the limitations of claim 4.
5. Regarding claim 5, Lin, Saleh and Sun disclose the computer-implemented method of claim 1. Sun discloses the upsampling algorithm (Catmull-Rom) as seen in fig 2 and paras 0049 and 0064. Lin also discloses further wherein the upsampling algorithm accesses a center sample location and eight surrounding sample locations per pixel location, and wherein the number of texture samples to be performed is 3, 6, or 9 (figs 4, 5, 18 and paras 0091-0094, 0101-0109 wherein the upsampling algorithm accesses a center sample location and eight surrounding sample locations per pixel location, and wherein the number of texture samples to be performed is the value to be 3 meeting the claim limitations). Lin, Saleh and Sun in combination therefore disclose the limitations as recited in claim 5.
6. Regarding claim 6, Lin, Saleh and Sun disclose the computer-implemented method of claim 1. Lin discloses further, wherein sample locations for which the texture operations are performed correspond to at least one row or column including a center location of the sample locations (figs 4, 5 18 and paras 0091-0094, 0101-0109 disclose wherein the sample locations for which the texture operations are performed correspond to at least one row or column including the center location of the sample). Lin Saleh and Sun in combination would therefore meet the limitations of claim 6.
7. Regarding claim 7, Lin, Saleh and Sun disclose the computer-implemented method of claim 1. Lin discloses the upsampling algorithm as seen in fig 18 and at paras 0081, 0196-0198. Saleh also discloses the GPU may upsample a reduced resolution input image and rendering it. Sun discloses further wherein the upsampling algorithm is a Catmull-Rom algorithm (figs 2, 4, 5. Paras 0023, 0025, 0056 and table 7 shows and discloses wherein the upsampling algorithm is a Catmull-Rom algorithm). Lin, Saleh and Sun in combination would therefore disclose the limitations as claimed in claim 7.
8. Regarding claim 8, Lin, Saleh and Sun disclose the computer-implemented method of claim 7. Lin discloses wherein the sample locations for which the texture operations are performed are selected (figs 4, 5 18 and paras 0091-0094, 0101-0109 disclose wherein the sample locations for which the texture operations are performed are selected) and Sun discloses to satisfy one or more conditions of an optimized implementation of the Catmull-Rom algorithm (figs 2, 4, 5. Paras 0023, 0025, 0056 and table 7 shows and discloses to satisfy one or more conditions of an optimized implementation of the Catmull-Rom algorithm). Lin, Saleh and Sun in combination would therefore meet the limitations of claim 8.
9. Claim 9 is a corresponding processor, comprising: one or more circuits claim of claim 1. See the corresponding explanation of claim 1. Lin shows a computer system (ie a processor) in figs 20- 22 and paras 0225-0229 meeting the claim limitations).
10. Regarding claim 10, Lin, Saleh and Sun disclose the processor of claim 9. Lin discloses further wherein the one or more circuits are further to apply the number of texture operations by setting one or more sample weights of the upsampling algorithm to a zero value to cause a corresponding sample location to not be accessed for a respective pixel location (fig 8 and paras 0101,0113 shows and discloses setting weight value of the local texture to be 0 (i.e to cause a corresponding sample location to not be accessed for a respective pixel location) which later is used with the filter for upsampling and outputting super resolution image as seen in figs 17-18 meeting the above claim limitations). Lin Saleh and Sun in combination would therefore meet the limitations of claim 10.
11. Claim 11 is a corresponding processor claim of claim 4. See the corresponding explanation of claim 4.
12. Regarding claim 12, Lin, Saleh and Sun disclose the processor of claim 9. Sun discloses the upsampling algorithm (Catmull-Rom) as seen in fig 2 and paras 0049 and 0064. Lin also discloses further wherein the upsampling algorithm accesses a center sample location and eight surrounding sample locations per pixel location, and wherein the number of texture samples to be performed is 3, 6, or 9 (figs 4, 5, 18 and paras 0091-0094, 0101-0109 wherein the upsampling algorithm accesses a center sample location and eight surrounding sample locations per pixel location, and wherein the number of texture samples to be performed is the value to be 3 meeting the claim limitations). Lin, Saleh and Sun in combination therefore disclose the limitations as recited in claim 12.
13. Claim 13 is a corresponding processor claim of claim 7. See the corresponding explanation of claim 7.
14. Regarding claim 14, Lin, Saleh and Sun disclose the processor of claim 9. Lin discloses further wherein the processor is comprised in at least one of: presenting augmented reality (AR) content (para 0200 discloses a system for generating or presenting virtual reality (VR) content; a system for generating or presenting augmented reality (AR) content);
15. Regarding claim 15, Lin discloses a system (figs 17-18 and 20-22 shows a computer system 20), comprising:
one or more processors to generate an output image, from a lower resolution input image (figs 1-2, 17-18 and 20-22, paras 0005-0010, 0073-0077, 0079, 0082, 0086-0087, 0196-0199 shows and discloses receiving an input image at a first lower resolution that is to be output for display, by the computing device, at a second resolution that is higher than the first resolution (i.e generate an output image) using one or more processors 22), using an upsampling algorithm and a number of texture samples for at least one pixel of the output image determined (figs 1-2, 4-9, 17-18, 20-22 and paras 0081, 0085-0111, 0186-0199 shows and discloses determining, for the at least one pixel location of the output image, one or more output pixel values using an upsampling algorithm and by performing the determined number of texture operations, figs 4, 5, 18 and paras 0091-0094, 0101-0109 wherein the upsampling algorithm accesses a center sample location and eight surrounding sample locations per pixel location, and wherein the number of texture samples to be performed is the value to be 3 meeting the claim limitations) based in part upon one or more performance values (figs 1-2, 4-7 and 17-18, 20-22 and paras 0077, 0082, 0085-0086, 0091-0111, 0116, 0186-0199, 0228 and 0233 shows and discloses determining, based in part upon the one or more performance values (figs 4-5, 17-18, 20-22 and paras 0091-0094, 0099-0107, 0204, 0210, 0215 discloses determining one or more filter parameters corresponding to each pixel in the first image and pixels with different texture features corresponds to different filter parameters meeting the above claim limitations of determining one or more performance values) a number of texture operations to be performed for at least one pixel location of an output image at the second resolution (i.e super resolution image) meeting the claim limitations) (fig 22 shows the computer system). As seen above Lin discloses determining the one or more performance values for the computer system. Lin is silent and however fails to disclose determining one or more performance values and corresponding to a number of texture sample locations accessed by the upsampling algorithm relating to operation of at least one processor of the system.
Saleh discloses determining one or more performance values relating to operation of at least one processor of the system (figs 1-4 and paras 0018, 0042, 0068, 0070, 0081, 0085, 0087-0108 discloses determining one or more performance values relating to operation of at least one processing unit (GPU) of a computing device 2 (the system) meeting the above claim limitations). As seen above Lin discloses determining a number of texture operations based on the one or more performance values and Saleh also discloses determining one or more performance values relating to the operation of the at least one processing unit of the computing device (i.e the system). Lin and Saleh are however silent and fails to disclose corresponding to a number of texture sample locations accessed by an upsampling algorithm.
Sun discloses determining texture operations corresponding to a number of texture sample locations accessed by an upsampling algorithm (figs 1-2, paras 0004, 0021, 0023, 0026, 0037, 0049 and 0064 determining texture operations corresponding to a number of texture sample locations accessed by an upsampling algorithm (i.e luma texture upsampling of the image having the texture sample locations (as seen in fig 1 and at paras 0020-0021) meeting the above claim limitations.) Before the effective filing date of the invention was made, Lin, Saleh and Sun are combinable because they are from the same field of endeavor and analogous art of image processing. The suggestion/motivation would be an efficient and quick (faster) process/system taught by Saleh at para 0026 and a reduced computational complexity (i.e faster processing) system as taught by Sun at paras 0049 and 0064. Therefore, it would be obvious and within one of ordinary skill in the art to have recognized the advantages of Saleh and Sun in the system of Lin to obtain the invention as specified by the claim 15.
16. Claim 16 is a corresponding system claim of claim 10. See the corresponding explanation of claim 10.
17. Claim 17 is a corresponding system claim of claim 4. See the corresponding explanation of claim 4.
18. Claim 18 is a corresponding system claim of claim 5. See the corresponding explanation of claim 5.
19. Claim 19 is a corresponding system claim of claim 7. See the corresponding explanation of claim 7.
20. Claim 20 is a corresponding system claim of claim 14. See the corresponding explanation of claim 14.
Examiner's Note: Examiner has cited figures, and paragraphs in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested for the applicant, in preparing the responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. Examiner has also cited references in PTO892 but not relied on, which are relevant and pertinent to the applicant’s disclosure, and may also be reading (anticipatory/obvious) on the claims and claimed limitations. Applicant is advised to consider the references in preparing the response/amendments in-order to expedite the prosecution.
Conclusion
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/JAYESH A PATEL/Primary Examiner, Art Unit 2677
/JAYESH PATEL/
Primary Examiner
Art Unit 2677
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