DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Applicant’s arguments and amendments filed 5/14/26 have been entered and considered. Claims 2, 4-7, 9-11, 16, 17, 24, 26, 29, 30, 33-63 are cancelled. Newly admitted claims 66 and 67 have been entered.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3, 8, 12, 15, 64 and 66 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhang et al (9,929,284 B1).
Regarding claim 1, Zhang et al discloses a Schottky diode (Figure 3B), comprising: a first contact (Figure 3B, reference 180); a second contact (Figure 3B, reference 110); and a semiconductor layer structure (Figure 3B, references 112, 120, 130, 140, 150, 160 and 170) between the first contact (Figure 3B, reference 180) and the second contact (Figure 3B, reference 110), the semiconductor layer structure (Figure 3B, references 112, 120, 230, 140, 150, 160 and 170) comprising: a current spreading layer having a first conductivity type (Figure 3B, reference 160); a drift region (Figure 3B, reference 230) between the second contact (Figure 3B, reference 110) and the current spreading layer (Figure 3B, reference 160), the drift region having the first conductivity type (Figure 3B, reference 230; N-type); and a first blocking junction having a second conductivity type (Figure 3B, reference 140, left; P-type) that is opposite the first conductivity type, the first blocking junction (Figure 3B, reference 140, left) extending downwardly from an upper surface of the semiconductor layer structure (Figure 3B, reference 170), wherein the current spreading layer has a first conductivity type dopant concentration that is at least 1.5 times greater than a first conductivity type dopant concentration of the drift region (column 8, lines 60-67 thru column 9, lines 1-13), and wherein the current spreading layer (Figure 3B, reference 160) vertically overlaps at least a portion of a lower half of the first blocking junction (Figure 3B, reference 140, left), wherein the first blocking junction is a channel implanted blocking junction (Figure 3B, reference 140, left; column 8, lines 20-36).
Regarding claim 3, Zhang et al discloses further comprising a second blocking junction that is doped with dopants having the second conductivity type (Figure 3B, reference 140, right), the second blocking junction (Figure 3B, reference 140, right) extending downwardly from the upper surface of the semiconductor layer structure (Figure 3B, reference 170), where the first and second blocking junctions extend to a depth of between 1.0 and 2.0 microns into the semiconductor layer structure (Figure 3B, reference 140 left and right).
Regarding claim 8, Zhang et al discloses wherein the current spreading layer (Figure 3B, reference 160) extends farther downwardly into the semiconductor layer structure (Figure 3B, references 112, 120, 230, 140, 150, 160 and 170) than does the first blocking junction (Figure 3B, reference 140, left).
Regarding claim 12, Zhang et al discloses wherein a bottom of the current spreading layer (Figure 3B, reference 160) extends at least as deep into the semiconductor layer structure (Figure 3B, references 112, 120, 130, 140, 150, 160 and 170) as a bottom of the first blocking junction (Figure 3B, reference 140, left), and a doping concentration of the current spreading layer at a depth into the semiconductor layer structure that is the same depth as the bottom of the first blocking junction is at least 1x1017/cm3 (column 8, lines 52-67 thru column 9, lines 1-13).
Regarding claim 15, Zhang et al discloses wherein the current spreading layer is a buried current spreading layer (Figure 3B, reference 160) and the drift region is a lower drift region (Figure 3B, reference 130, lower), the semiconductor layer structure (Figure 3B, references 112, 120, 130, 140, 150, 160 and 170) further comprising an upper drift region (Figure 3B, reference 130, upper) that is between the current spreading layer (Figure 3B, reference 160) and the first contact (Figure 3B, reference 180).
Regarding claim 64, Zhang et al discloses wherein a maximum width of an upper half of the first blocking junction exceeds a maximum width of a lower half of the first blocking junction (Figure 3B, reference 140, left).
Regarding claim 66, Zhang et al discloses wherein the current spreading layer (Figure 3B, reference 160), extends laterally (from left to right)) from the first blocking junction (Figure 3B, reference 140 left) to the second blocking junction (Figure 3B, reference 140 right).
Allowable Subject Matter
Claims 13 and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art does not disclose nor fairly suggest a Schottky diode, comprising: wherein at least a first portion of the current spreading layer has a graded doping concentration of first conductivity type dopants, where in the first portion the doping concentration of first conductivity type dopants increases with increasing depth into the semiconductor layer structure (claim 13), further incorporated into independent claim 1 and in the context of its recited apparatus, along with its depending claims.
Claims 18-23, 25, 27, 28, 31, 32, 65 and 67 are allowed over the prior art.
The following is an examiner’s statement of reasons for allowance: The prior art does not disclose nor fairly suggest Schottky diodes, comprising: a first blocking junction adjacent the first contact, the first blocking junction having a second conductivity type that is opposite the first conductivity type, wherein a first portion of the current spreading layer has a graded dopant concentration that increases with increasing distance from the first contact (claim 18) and a buried current spreading layer having the first conductivity type between the lower drift region and the upper drift region, where a first conductivity type dopant concentration of the current spreading layer is higher than a first conductivity type dopant concentration of the lower drift region and is higher than a first conductivity type dopant concentration of the upper drift region; a first blocking junction having a second conductivity type that is opposite the first conductivity type; and a second blocking junction having the second conductivity type, wherein the first and second blocking junctions define a conductive region therebetween, and wherein a lower surface of the current spreading layer directly contacts an upper surface of the lower drift region and an upper surface of the current spreading layer directly contacts a lower surface of the upper drift region (claim 28) as described in independent claims and in the context of their recited apparatuses, along with their depending claims.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot in view of the new grounds of rejection. Zhang et al discloses the amended claim subject regarding the channel implanted blocking junction (Figure 3B, reference 140, left; column 8, lines 20-36) disclosed in independent claim 1 as stated above. Thus, the rejection to the above claimed limitations have been met.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MONICA D HARRISON whose telephone number is (571)272-1959. The examiner can normally be reached M-F 7-4:30pm.
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/MONICA D HARRISON/Primary Examiner, Art Unit 2815
mdh
June 23, 2026
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