DETAILED ACTION
This Office action is in response to the Request for Continued Examination (RCE) and the Amendment filed on 21 August 2026. Claims 1-14 and 18-23 are pending in the application. Claims 15-17 have been cancelled.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 21 August 2026 has been entered.
Claim Rejections - 35 USC § 112
In light of Applicant’s Amendment, the rejection of claims 1-14 and 18-20 under 35 U.S.C. 112(a) has been withdrawn.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 6-8, 10-11, 13-14, 18-21, and 23 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yoon et al., US 2021/0035635, of record.
With respect to claim 1, Yoon et al. disclose a memory device, shown in Fig. 8A, comprising:
a gate electrode 531a;
a resistance change layer 523;
a channel 522a between the gate electrode 531a and the resistance change layer 523;
an island structure (conductive filament in region 523a, see Fig. 8A and paragraph [0113]) between the resistance change layer 523a and the channel 522a and in physical contact with the resistance change layer and the channel; and
a gate insulating layer 521 between the gate electrode 531a and the channel 522a,
wherein one surface of the island structure (conductive filament in region 523a, see Fig. 8A and paragraph [0113]) is directly in contact with the channel 522a, and
wherein the island structure is embedded in the resistance change layer 523, see Fig. 8A and paragraphs [0110]-[0113].
With respect to claim 2, in the memory device of Yoon et al., the island structure includes nitride and/or oxide, since the resistance change layer 523 is an oxide or nitride, see paragraph [0021], [0030], [0092].
With respect to claim 3, in the memory device of Yoon et al., the island structure includes SiN and/or GaN, since the resistance change layer 523 is silicon nitride, see paragraph [0092].
With respect to claim 6, in the memory device of Yoon et al., the gate electrode 531a, the channel 522a, and the resistance change layer 523 are included in a memory cell 710, and the memory device further comprises:
a substrate 501 m as shown in Fig. 6A, (not shown in Fig. 8A, see paragraph [0110]) and a plurality of the memory cells 710 and 720 (see Figs. 6A and 8A) stacked in a direction perpendicular to a surface of the substrate 501, as shown in Fig. 8A.
With respect to claim 7, in the memory device of Yoon et al., the channel 522 and the resistance change layer 523 of each of the plurality of the memory cells are connected to each other in a vertical direction, as shown in Fig. 8A.
With respect to claim 8, in the memory device of Yoon et al., the gate electrodes 531a/531b of each of the plurality of the memory cells are electrically isolated from each other, as shown in Fig. 8A.
With respect to claim 10, in the memory device of Yoon et al., a cross-sectional area of the island structure (conductive filament in region 523a, see Fig. 8A and paragraph [0113]) is less than a cross-sectional area of the gate electrode 531a, as shown in Fig. 8A.
With respect to claim 11, in the memory device of Yoon et al., the island structure (conductive filament in region 523a, see Fig. 8A and paragraph [0113]) is surrounded by the channel 522a and the resistance change layer 523.
With respect to claim 13, in the memory device of Yoon et al., the resistance change layer 523, the island structure (conductive filament in region 523a, see Fig. 8A and paragraph [0113]), the channel 522a, the gate insulating layer 521, and the gate electrode 531a correspond to a first gate stack, as shown in Figs 6A and. 8A, the memory device includes a plurality of the first gate stacks (shown in Fig. 6A), the plurality of first gate stacks share the resistance change layer 523, the channel 522, and the gate insulating layer 521, and an insulating layer 532 is between the gate electrodes 531a/531b in the plurality of the first gate stacks, see Figs.6A and 8A.
With respect to claim 14, the memory device of Yoon et al. further comprises:
a substrate 501 (shown in Fig. 6A (not shown in Fig. 8A, see paragraph [0110]), wherein the plurality of first gate stacks are on the substrate 501 (shown in Fig. 6A), and the plurality of first gate stacks are sequentially stacked in a direction perpendicular to the substrate 501 to form a first cell string, see Fig. 6A.
With respect to claim 18, Yoon et al. disclose a method of operating a memory device: applying a first operating voltage to the memory device of claim 1, see Fig. 8A and paragraphs [0112]-[0113].
With respect to claim 19, Yoon et al. the first operating voltage is any one of a write voltage, a read voltage, and an erase voltage, see Fig. 1 and the Abstract..
With respect to claim 20, Yoon et al. disclose an electronic apparatus, shown in Figs. 6A, 7A, and 8A, comprising: the memory device of claim 1, as shown in Fig. 8A.
With respect to claim 21, Yoon et al. disclose a memory device, shown in Fig. 8A, comprising:
a gate electrode 531a;
a resistance change layer 523;
a channel 522a between the gate electrode 531a and the resistance change layer 523;
an at least one island structure (conductive filament in region 523a, see Fig. 8A and paragraph [0113]) between the resistance change layer 523a and the channel 522a and in physical contact with the resistance change layer and the channel 522a; and
a gate insulating layer 521 between the gate electrode 531a and the channel 522a,
wherein one surface of the island structure (conductive filament in region 523a, see Fig. 8A and paragraph [0113]) is directly in contact with the channel 522a, and
wherein the at least one island structure are embedded in the resistance change layer 523, see Fig. 8A and paragraphs [0110]-[0113].
With respect to claim 23, Yoon et al. disclose a memory device, shown in Fig. 8B, comprising:
a gate electrode 531a;
a resistance change layer 523;
a channel 522a between the gate electrode 531a and the resistance change layer 523;
an plurality of island structures (oxygen vacancies in conductive filament in region 523a, see Fig. 8B and paragraph [0114]) between the resistance change layer 523a and the channel 522a and in physical contact with the resistance change layer 523 and the channel 522a; the plurality of island structures (oxygen vacancies) not in direct contact with each other, as shown in Fig. 8B; and
a gate insulating layer 521 between the gate electrode 531a and the channel 522a,
wherein one surface of the island structure (oxygen vacancies in conductive filament in region 523a, see Fig. 8B and paragraph [0114]) is directly in contact with the channel 522a, and
wherein the plurality of island structures are embedded in the resistance change layer 523, see Fig. 8B and paragraphs [0114]-[0116].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4-5, 9, 12, and 22 are rejected under 35 U.S.C. 103 as being unpatentable Yoon et al., US 2021/0035635, of record.
With respect to claims 4 and 5, Yoon et al. discloses that the resistance change layer 523 can comprise a metal oxide, wherein the metal oxide includes one or more of Rb, Ti, Ba, Zr, Ca, Hf, Sr, Sc, Mg, Al, Si, Be, Nb, Ni, Ta, W, V, La, Gd, Cu, Mo, Cr, or Mn as a metallic element, as disclosed in paragraph [0092]. It would have been obvious to the skilled artisan that the island structure includes an oxide having a greater absolute value of oxide formation energy than a formation energy of the resistance change layer 523, due to the presence of oxygen vacancies in the conductive filament in metal oxide resistance change layer 523.
With respect to claim 9, in the memory device of Yoon et al. shown in Fig. 8B, at least one of the plurality of memory cells 710 and 720 includes a plurality of island structures not connected to each other, that is, oxygen vacancies in conductive filament in region 523a, as shown in Fig. 8B and paragraph [0114]) As disclosed by Yoon et al., the density of oxygen vacancies can be low in conductive filament, therefor, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that a plurality of island structures would not be connected to each other as shown in Fig. 8B.
With respect to claim 12, if the turn-on voltage is applied to a plurality of memory cells in the known device of Yoon et al., it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the island structure would include an archipelago, that is, a group, of islands.
With respect to claim 22, in the memory device of Yoon et al., Yoon et al. disclose that the at least one island structure includes a nitride and/or oxide, since the resistance change layer 523 is an oxide or nitride, see paragraph [0021], [0030], [0092]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the island structure including a nitride and/or oxide would have a greater absolute value of oxide formation energy than a formation energy of the resistance change layer 523, due to the presence of oxygen vacancies in the conductive filament in metal oxide resistance change layer 523.
Response to Arguments
Applicant’s arguments with respect to claims 1-14 and 18-23 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The newly-cited reference to Wu discloses a memory device, shown in Figs. 17A and 17B, having the data storage layer 108 laterally sandwiched between the conductive layer 101 and the conductive layer 109, and the channel layer 110 laterally spaced from the data storage layer 108 by the conductive layer 109 therebetween.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARY A WILCZEWSKI whose telephone number is (571)272-1849. The examiner can normally be reached M-TH 7:30 AM-5:00 PM.
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MARY A. WILCZEWSKI
Primary Examiner
Art Unit 2898
/MARY A WILCZEWSKI/Primary Examiner, Art Unit 2898
