DETAILED ACTION
This Office action is in response to the Amendment filed on 30 March 2026. Claims 1-14 and 18-23 are pending in the application. Claims 15-17 have been cancelled. Claims 21-23 are newly submitted.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-14 and 18-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 has been amended to require “an island structure between the resistance change layer and the channel and in contact with only the resistance change layer and the channel”. First, Applicant’s originally-filed specification fails to disclose what type of contact the island structure has with only the resistance change layer and the channel. Is this contact electrical, physical, or thermal? Second, the cross-sectional views of Applicant’s device in the instant application fail to support the claim limitation “an island structure between the resistance change layer and the channel and in contact with only the resistance change layer and the channel” if the contact is physical, since not all surfaces of the island 128 are shown in a cross-sectional view. Furthermore, it is noted that FIG. 5 is a plan view taken along line 5-5′ of FIG. 4 in the instant application. Whereas Fig. 5 of the instant application does show an island structure 128 in contact with only the resistance change layer 124 and the channel 132, it does not preclude contact in other views of the device, similar to the device of Takahashi, as shown in Figs. 4 and 5 of Takahashi. Therefore, there is no support in applicant’s specification of what type of contact is only between the island structure and the resistance change layer and the channel.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 2, 6-14, 18-21, and 23 are again rejected under 35 U.S.C. 102(a)(2) as being clearly anticipated by Takahashi, US 2023/0301119, of record.
With respect to claim 1, Takahashi discloses a memory device, shown in Figs. 4 and 5, comprising:
a gate electrode 22 of memory cell MC0, see paragraphs [0033]-[0035] and Fig. 2);
a resistance change layer 42;
a channel 44 between the gate electrode 22 and the resistance change layer 42;
an island structure 43 between the resistance change layer and the channel and in contact with only the resistance change layer 42 and the channel 44 along line V-V of FIG. 4, as shown in Fig. 5 (The island structure 43 is only in contact with the resistance change layer 42 and the channel 44 along line V-V of FIG. 4, as shown in Fig. 5. It is noted that this interpretation of Applicant’s claim is commensurate in scope with Fig. 5 of the instant application.); and
a gate insulating layer 45 between the gate electrode 22 and the channel 44, see paragraphs [ 0056]-[0073].
With respect to claim 2, Takahashi discloses that the island structure 43 includes nitride and/or oxide, see paragraph [0062].
With respect to claim 6, in the memory device of Takahashi, the gate electrode 22, the channel 44, and the resistance change layer 42 are included in a memory cell MC0-MC7 (see Figs 2 and 4 and paragraph [0031]), and the memory device, shown in Fig. 4, further comprises: a substrate 20 (see paragraph [0051]) and a plurality of the memory cells MC0-MC7 stacked in a direction perpendicular to a surface of the substrate 20, as shown in Fig. 4.
With respect to claim 7, in the memory device of Takahashi, the channel 44 (see paragraph [0064]) and the resistance change layer 42 of each of the plurality of the memory cells MC0-MC7, as shown in Fig. 4, are connected to each other in a vertical direction (the z direction, shown in Fig. 4).
With respect to claim 8, in the memory device of Takahashi, the gate electrodes of each of the plurality of the memory cells 22 are electrically isolated from each other by insulating layer 32, see paragraph [0053] and Fig. 4.
With respect to claim 9, in the memory device of Takahashi, at least one of the plurality of memory cells MC0-MC7 includes a plurality of island structures 43 not connected to each other, as shown in Fig. 4 below.
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With respect to claim 10, as shown in Dig. 4 of Takahashi, a cross-sectional area of the island structure 43 is less than a cross-sectional area of the gate electrode 22.
With respect to claim 11, in the memory device of Takahashi, the island structure 43 is surrounded by the channel 44 and the resistance change layer 42, as shown in Fig. 4.
With respect to claim 12, in the memory device of Takahashi, the island structure 43 includes an archipelago of islands, that is, a group of islands, as shown in Fig. 4.
With respect to claim 13, in the memory device of Takahashi, the resistance change layer 42, the island structure 43, the channel 44, the gate insulating layer 45, and the gate electrode 22 correspond to a first gate stack in MC0, the memory device includes a plurality of the first gate stacks in memory cells MC0-MC7, the plurality of first gate stacks share the resistance change layer 42, the channel 44, and the gate insulating layer 45, and an insulating layer 32 is between the gate electrodes 22 in the plurality of the first gate stacks, see Figs. 15-21.
With respect to claim 14, the memory device of Takahashi further comprises: a substrate 20 (see paragraph [0051]), wherein the plurality of first gate stacks in memory cells MC0-MC7 are on the substrate 20, and the plurality of first gate stacks are sequentially stacked in a direction perpendicular to the substrate 20 to form a first cell string, as shown in Figs. 2 and 4.
With respect to claim 18, a method of operating a memory device: applying a first operating voltage to the memory device of claim 1, see paragraphs [0027]-[0029].
With respect to claim 19, in the method of operating the memory device of Takahashi, the first operating voltage is any one of a write voltage, a read voltage, and an erase voltage, see paragraphs [0027]-[0029].
With respect to claim 20, an electronic apparatus, that is the memory cell array of Takahashi shown in Fig. 4, comprises: the memory device of claim 1.
With respect to claim 21, Takahashi discloses a memory device, shown in Figs. 4 and 5, comprising:
a gate electrode 22 of memory cell MC0, see paragraphs [0033]-[0035] and Fig. 2);
a resistance change layer 42;
a channel 44 between the gate electrode 22 and the resistance change layer 42;
an at least one island structure 43 between the resistance change layer and the channel and in contact with the resistance change layer 42 and the channel 44, the at least one island structure 43 including a nitride and/or oxide (see paragraph [0062]: The insulator film 43 includes silicon oxide.); and
a gate insulating layer 45 between the gate electrode 22 and the channel 44, see paragraphs [0056]-[0073].
With respect to claim 23, Takahashi discloses a memory device, shown in Figs. 4 and 5, comprising:
a gate electrode 22 of memory cell MC0, see paragraphs [0033]-[0035] and Fig. 2);
a resistance change layer 42;
a channel 44 between the gate electrode 22 and the resistance change layer 42;
a plurality of island structures 43 between the resistance change layer 42 and the channel 44 (as shown in Fig. 4 and in contact with the resistance change layer 42 and the channel 44 (as shown in Figs. 4 and 5), the plurality of island structures 43 not in direct contact with each other, as shown in annotated Fig. 4 below; and
a gate insulating layer 45 between the gate electrode 22 and the channel 44, see paragraphs [0056]-[0073].
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-5 and 22 are rejected under 35 U.S.C. 103 as being unpatentable Takahashi, US 2023/0301119, of record.
Takahashi discloses that the island structure 43 comprises silicon oxide, as disclosed in paragraph [0062]. With respect to claims 4 and 5, admittedly, although Takahashi discloses the island structure 43 comprises silicon oxide, Takahashi does not disclose that the island structure 43 has a greater absolute value of oxide formation energy than a formation energy of the resistance change layer. However, the formation energy of silicon oxide is approximately -98 to -100 kJ/mol, and the formation energy of the GeTe resistance change layer 42 of Takahashi (see paragraph [0061]) is approximately -20 kJ/mol. Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the island structure 43 of Takahashi has a greater absolute value of oxide formation energy than a formation energy of the resistance change layer.
With respect to claim 5, in the memory device of Takahashi, the oxide includes a metal oxide, and the metal oxide includes one or more of Rb, Ti, Ba, Zr, Ca, Hf, Sr, Sc, Mg, Al, Si, Be, Nb, Ni, Ta, W, V, La, Gd, Cu, Mo, Cr, or Mn as a metallic element, since Takahashi discloses SiO in paragraph [0062].
With respect to claim 3, Takahashi fails to teach that the island structure can include SiN. Takahashi teaches that the island structure 43 comprises an insulator film, see paragraph [0057]. Admittedly, Takahashi discloses that the island structure 43 comprises silicon oxide, as disclosed in paragraph [0062]. However, it would have been within the purview of the skilled artisan to select other insulating materials, such as silicon nitride, for the island structure 43, since silicon oxide and silicon nitride are both insulators. Furthermore, Takahashi disclose that insulator film 45 can include, for example, silicon oxide, silicon nitride, or metal oxide. Takahashi clearly teaches the functional equivalence of these insulating materials. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute SiN for the silicon oxide in island structure 43. The choice of insulating material is not deemed to patentably distinguish Applicant’s claimed memory device from the known memory device of Takahashi.
With respect to claim 22, Takahashi discloses the at least one island structure includes a nitride and/or oxide in paragraph [0062]. However, Takahashi does not disclose that the island structure 43 has a greater absolute value of oxide formation energy than a formation energy of the resistance change layer. The formation energy of silicon oxide is approximately -98 to -100 kJ/mol, and the formation energy of the GeTe resistance change layer 42 of Takahashi (see paragraph [0061]) is approximately -20 kJ/mol. Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the island structure 43 of Takahashi has a greater absolute value of oxide formation energy than a formation energy of the resistance change layer.
Response to Arguments
Applicant's arguments filed 30 March 2026 have been fully considered but they are not persuasive. Applicant has argued that Takahashi fails to disclose or render obvious to a person having ordinary skill in the art the island structure "in contact with only the resistance change layer and the channel" as recited by claim 1 as amended. However, with respect to independent claim 1, Takahashi clearly teaches an island structure 43 between the resistance change layer and the channel and in contact with only the resistance change layer 42 and the channel 44 along line V-V of FIG. 4, as shown in Fig. 5. The island structure 43 is only in contact with the resistance change layer 42 and the channel 44 along line V-V of FIG. 4, as shown in Fig. 5. This interpretation of Applicant’s claim is commensurate in scope with Fig. 5 of the instant application.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARY A WILCZEWSKI whose telephone number is (571)272-1849. The examiner can normally be reached M-TH 7:30 AM-5:00 PM.
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MARY A. WILCZEWSKI
Primary Examiner
Art Unit 2898
/MARY A WILCZEWSKI/Primary Examiner, Art Unit 2898
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