DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant's arguments with respect to claims 1 – 2, 5, and 12 - 13 have been considered but are moot in view of the new ground(s) of rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1 – 2, 5, and 12 – 13 are rejected under 35 U.S.C. 103 as being unpatentable over Sakamoto et al. (U.S. Patent Publication No. 2002/0150743).
Regarding claim 1, in Figure 1, Sakamoto discloses an interposer to which a semiconductor element is mounted, comprising: a core substrate comprising, a ceramic substrate (4; paragraph [0052]) having a first surface, a second surface opposite the first surface in a thickness direction, and a through hole (3b) between the first surface and the second surface, a conductor portion (internal electrodes of inductor L, paragraph [0048]) extending through the through hole, the conductor portion being a sintered metal (paragraphs [0040], [0047] – [0050] disclose disposing a non-sintered molded body block to serve as a capacitor C and a non-sintered body block to serve as an inductor L into a laminated body 4, and sintering the result), and a magnetic material portion (the inner electrodes of inductor L are laminated via a magnetic ceramic green sheet, and thus the magnetic ceramic green sheet material surrounds the internal electrodes, paragraph [0048]) surrounding the conductor portion within the through hole, and made of ceramics, the conductor portion and the magnetic material portion being inorganically bonded together without an organic material interposed therebetween (the inner electrodes of inductor L are laminated via a magnetic ceramic green sheet, and thus the magnetic ceramic green sheet material and the inner electrodes of inductor L are bonded together inorganically [ceramic material is inorganic] without any material interposed therebetween, paragraph [0048]); an electrode pad (top terminal electrode of inductor L, not labeled, paragraph [0047]; Figure 2) connected to the conductor portion of the core substrate, the electrode pad being a sintered metal layer (paragraphs [0040], [0047] – [0050] disclose disposing a non-sintered molded body block to serve as a capacitor C and a non-sintered body block to serve as an inductor L, including terminal electrodes thereof, into a laminated body 4, and sintering the result); a wiring portion (5a, 5b; Figure 2) including a connecting via (the via conductor disposed in via hole 2e, not labeled) having a bottom surface connected to the electrode pad (Figures 2 and 4), the bottom surface of the connecting via being separated from the magnetic material portion and the ceramic substrate (the bottom surface of via 2e directly contacts the top terminal electrode of inductor L, and thus, the bottom surface of via 2e is separated from the substrate 4 and the magnetic material of inductor L; Figure 2), the wiring portion being a plating layer (this is an apparatus claim, and thus the method of forming the wiring portion holds no patentable weight); and an insulator layer (1b, Figure 2) having a via hole (2e) in which the connecting via is disposed, the insulator layer separating the wiring portion and each of the magnetic material portion and the ceramic substrate of the core substrate (Figure 2), the insulator layer containing organic matter. Sakamoto does not specifically disclose layer 1b as containing organic matter. However, providing an insulating layer or layers made of organic matter, for example resin, in an interposer or circuit board is common place and well known in the art, and is merely a design option for a skilled artisan without the exercise of inventive skill.
Regarding claim 2, Sakamoto discloses wherein the conductor portion is a non-hollow body (Figures 1 and 3).
Regarding claim 5, Sakamoto discloses wherein the conductor portion and the magnetic material portion are sintered together (paragraphs [0040], [0047] – [0050]).
Regarding claim 12, Sakamoto discloses wherein the electrode pad has a portion covering the magnetic material portion (Figures 1 and 3).
Regarding claim 13, Sakamoto discloses the interposer according to claim 1. Sakamoto does not disclose wherein the electrode pad contains silver, copper, or a silver-copper alloy as a main component. However, providing an electrode pad formed of various metals, such as silver, copper, or a silver-copper alloy, is common place and well known in the art, and is merely a design option for a skilled artisan without the exercise of inventive skill.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TREMESHA W BURNS whose telephone number is (571)270-3391. The examiner can normally be reached Monday-Friday 8am - 4:30 pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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TREMESHA W. BURNS
Primary Examiner
Art Unit 2847
/TREMESHA W BURNS/Primary Examiner, Art Unit 2847
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