DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 15-19 are rejected under 35 U.S.C. 103 as being unpatentable over YOO et al. (US Pub. 2020/0373216) in view of Bowles et al. (US Pub. 2008/0246126) and MIN et al. (US Pub. 2016/0276308).
Regarding claim 15, YOO teaches a semiconductor package comprising:
a first redistribution layer 101 (Fig. 2);
at least one lower die 105 on the first redistribution layer 101 (Fig. 2);
a first through-via 107 on the first redistribution layer 101 (Fig. 2);
a first molding material 109 that molds the first redistribution layer 101, the at least one lower die 105, and the first through-via 107 (Fig. 2);
a second redistribution layer 501 on the at least one lower die 105, the first through-via 107, and the first molding material 109 (Fig. 2);
at least one upper die 503a on the second redistribution layer 501 (Fig. 2);
a second through-via 507 on the second redistribution layer 501;
a second molding material 509 that molds the second redistribution layer 501, the at least one upper die 503a, and the second through-via 507; and
a heat dissipation member 510 on the at least one upper die 503a and the second through-via 507, wherein the heat dissipation member 510 contacts the second through-via 507; and
wherein a thickness of the heat dissipation member 510 is between 15 and 25 %, including endpoints, of the thickness of the at least one upper die 503a (see Fig. 2).
YOO is silent on (i) the at least one upper die 503a having a thickness between 1.2 and 1.7 times, including endpoints, greater than a thickness of the at least one lower die 105; and (ii) wherein a distance between the heat dissipation member 510 and the at least one upper die 503 is less than 10% of the thickness of the at least one upper die.
Bowles teaches (i) an upper die 634 having a thickness between 1.2 and 1.7 times, including endpoints, greater than a thickness of the at least one lower die 618 (Fig. 6). This has the advantage of providing high density memory, faster and more powerful chip. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of YOO with the thicker upper die, as taught by Bowles, so as to obtain a semiconductor device with high density memory and increased performance.
MIN teaches in Fig. 1A (ii) a semiconductor device wherein a distance between a heat dissipation member (170 & 160) and at least one upper die (140 or 141) is less than 10% of the thickness of the at least one upper die. This has the advantages of providing an alternative design choice to accommodate the heat dissipation member. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of YOO & Bowles with the heat dissipation member, as taught by MIN, so as to obtain a semiconductor device with an alternative design to accommodate the heat dissipation member.
Notwithstanding, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Furthermore, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Also, it would have been an obvious matter of design choice to change the size of a chip, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Regarding claim 16, the combination of YOO, Bowles and MIN teaches the semiconductor package of claim 15, wherein the heat dissipation member includes at least one of copper (Cu), gold (Au), aluminum (Al), tungsten (W), nickel (Ni), tin (Sn), titanium (Ti), and alloys thereof (YOO’s Fig. 2 and Para [0035-0036]).
Regarding claim 17, the combination of YOO, Bowles and MIN teaches the semiconductor package of claim 15, wherein the heat dissipation member includes at least one of benzocyclobutene (BCB) and polyimide (YOO’s Fig. 2 and Para [0035-0036]).
Regarding claim 18, the combination of YOO, Bowles and MIN teaches the semiconductor package of claim 15, wherein the heat dissipation member 510 contacts a surface of the at least one upper die 503a (YOO’s Fig. 2).
Regarding claim 19, the combination of YOO, Bowles and MIN teaches the semiconductor package of claim 15, wherein a surface of the at least one lower die 105 contacts a wiring layer 501 (YOO’s Fig. 2).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over YOO, Bowles and MIN as applied to claim 15 above, and further in view of Railkar et al. (US Pub. 2015/0104906).
Regarding claim 14, the combination of YOO, Bowles and MIN is silent on the semiconductor package of claim 13, wherein the thickness of the heat dissipation member is between 150 and 300 pm, including endpoints. However, Railkar teaches a semiconductor device, wherein a thickness of the heat dissipation member is between 150 and 300 um, including endpoints (Para [0017]). These claim dimensions would have been obvious to one of the ordinary skill in the art in view of Railkar. One of the ordinary skill in the art is motivated to form device features as small as possible with large enough thickness to allow proper device operation, in order to save on material and processing costs. As such, it would have been obvious to use a thickness of 150 and 300 um for the heat dissipation member.
The claim is prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir.1996)(claimed ranges of a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art) and In re Aller, 105 USPQ 233 (CCPA 1955)(selection of optimum ranges within prior art general conditions is obvious).
Allowable Subject Matter
Claims 1-8 & 9-14 are allowed.
The following is an examiner’s statement of reasons for allowance:
With respect to claims 1 & 9, the prior art of record fails to teach or suggest in combination with other claim features, a semiconductor package comprising: wherein the first through-via is electrically isolated from each die of the semiconductor package and shaped to provide a thermal path from the at least one lower die to the second redistribution layer.
Claims 2-8 and 10-14 are allowed as being directly or indirectly dependent of the allowed independent base claims 1 & 9.
Response to Arguments
With respect to independent claims 1 and 9, applicant’s argument overcomes the prior art rejection; however, the prior art continues to read on the unamended claim 15.
With respect to claim 15, applicant argues that YOO does not teach the limitation “wherein a thickness of the heat dissipation member is between 15 and 25 %, including endpoints, of the thickness of the at least one upper die”. The examiner respectfully disagrees and maintains that YOO provides a showing that meets the claim limitation, wherein a thickness of the heat dissipation member 510 is between 15 and 25%, including endpoints, of the thickness of the at least one upper die 503a (see YOO’s Fig. 2). It is clearly shown in YOO’s Fig. 2 that the thickness of the heat dissipation member 510 is between 15 & 25% of the thickness of the upper die 503a/b. This showing is very similar to the applicant’s Fig. 1B, where the heat dissipation member 150 has a similar thickness dimension to the thickness of the upper die 130. As such, the argument is not found to be persuasive.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIMOR KARIMY whose telephone number is (571)272-9006. The examiner can normally be reached Monday - Friday: 8:30 AM -5:00 PM.
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/TIMOR KARIMY/Primary Examiner, Art Unit 2818
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