Attorney Docket Number: 2305888
Filing Date: 06/28/2023
Claimed Priority Date: none
Inventors: Chiu et al.
Examiner: Shamita S. Hanumasagar
DETAILED ACTION
This Office action responds to the amendment filed on 02/26/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Amendment Status
The amendment filed on 02/26/2026 in reply to the previous Office action mailed on 12/29/2025 has been entered. The present Office action is made with all the suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-30, with claims 11, 19, 22 and 28 remaining withdrawn from consideration.
Initial Remarks
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For all citations of “Annotated Fig. 5”, please refer to the following image, which is an enlarged and marked portion of figure 5 of Kidwell (US 2019/0164681). No other changes have been made to the figure.
For all citations of “Annotated Fig. 1B”, please refer to the following image, which is an enlarged and marked portion of figure 1B of Kuo (US 2016/0307991). No other changes have been made to the figure.
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Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 8-9 and 27 are rejected under 35 U.S.C. 112(b) for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claim 8 recites the limitation “wherein the first insulation layer is on the magnetic layer”. No “the magnetic layer” has been sufficiently previously recited in the claim. Furthermore, parental claim 1 only recites the presence of “one or more magnetic layers” and fails to distinguish a specific magnetic layer clearly intended for the limitation “the magnetic layer” in dependent claim 8. Accordingly, this limitation in the claim is indefinite.
Claim 9 recites the limitation “wherein the second insulation layer is on the magnetic layer”. No “the magnetic layer” has been sufficiently previously recited in the claim. Furthermore, parental claim 1 only recites the presence of “one or more magnetic layers” and fails to distinguish a specific magnetic layer clearly intended for the limitation “the magnetic layer” in dependent claim 9. Accordingly, this limitation in the claim is indefinite.
Claim 27 recites the limitation “wherein the first insulation layer is on the magnetic layer”. No “the magnetic layer” has been sufficiently previously recited in the claim. Furthermore, parental claim 23 only recites the presence of “one or more magnetic layers” and fails to distinguish a specific magnetic layer clearly intended for the limitation “the magnetic layer” in dependent claim 27. Accordingly, this limitation in the claim is indefinite.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 10, 15-17, and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yun (US 2017/0062120).
Regarding claim 1, Yun (see, e.g., figs. 2 and 5-6) shows all aspects of the instant invention, including an inductive device 208 comprising:
a first set of conductive lines 502, 504, 506, 508 (taught to include 236 and 276 – see, e.g., par.0061/ll.14-15);
a second set of conductive lines 501, 503, 505, 507, 509 (taught to include 230 – see, e.g., par.0061/ll.10-11);
conductive pillars 273, 275 (taught to be included in 511, 513, 515, 517, 519, 521, 523, 525, 527, 529 – see, e.g., pars.0047/ll.6-7, 0062/ll.10-16) connecting the first set of conductive lines to the second set of conductive lines to form an integrated inductor 208;
one or more magnetic layers 262, 264 extending along a length of the integrated inductor and within an aperture of the integrated inductor (see, e.g., par.0041/ll.1-4);
a first insulation layer 222 and a second insulation layer 223 between the first set of conductive lines and the second set of conductive lines; and
an encapsulant 220/260 between the first insulation layer and the second insulation layer, wherein the encapsulant is on a magnetic layer 262 of the one or more magnetic layers
Regarding claim 15, Yun (see, e.g., figs. 2 and 5-6) shows all aspects of the instant invention, including a device 200 comprising an integrated device 208 comprising:
a first set of conductive lines 502, 504, 506, 508 (taught to include 236 and 276 – see, e.g., par.0061/ll.14-15);
a second set of conductive lines 501, 503, 505, 507, 509 (taught to include 230 – see, e.g., par.0061/ll.10-11);
conductive pillars 273, 275 (taught to be included in 511, 513, 515, 517, 519, 521, 523, 525, 527, 529 – see, e.g., pars.0047/ll.6-7, 0062/ll.10-16) connecting the first set of conductive lines to the second set of conductive lines to form an integrated inductor 208;
one or more magnetic layers 262, 264 extending along a length of the integrate inductor and within an aperture of the integrated inductor (see, e.g., par.0041/ll.1-4);
a first insulation layer 222 and a second insulation layer 223 between the first set of conductive lines and the second set of conductive lines; and
an encapsulant 220/260 between the first insulation layer and the second insulation layer, wherein the encapsulant is on a magnetic layer 262 of the one or more magnetic layers
Regarding claim 2, Yun (see, e.g., fig. 2) shows that the integrated inductor 208 is within or on a package substrate 202.
Regarding claims 3 and 17, Yun (see, e.g., par.0077/ll.3-4) shows that the one or more magnetic layers 262, 264 include one or more of CoZrTa, CoZrTaB, or FeCoB.
Regarding claim 8, Yun (see, e.g., fig. 2) shows that the first insulation layer 222 is on a magnetic layer 262, wherein the first insulation layer is between the magnetic layer and the first set of conductive lines 502, 504, 506, 508 (taught to include 236 and 276 – see, e.g., par.0061/ll.14-15), and wherein the magnetic layer is below the encapsulant 220/260.
With regards to other language recited in claim 8, see the comments stated above in paragraph 7.
Regarding claim 9, Yun (see, e.g., fig. 2) shows that the second insulation layer 223 is on a magnetic layer 262, wherein the second insulation layer is between the magnetic layer and the second set of conductive lines 501, 503, 505, 507, 509 (taught to include 230 – see, e.g., par.0061/ll.10-11), and wherein the magnetic layer is above the encapsulant 220/260.
With regards to other language recited in claim 9, see the comments stated above in paragraph 8.
Regarding claim 10, Yun (see, e.g., fig. 2) shows that the one or more magnetic layers 262, 264 includes two magnetic layers 262, 264 within the aperture.
Regarding claim 16, Yun (see, e.g., fig. 2) shows that the device 200 further comprises a package substrate 202, and wherein the integrated inductor 208 is within or on the package substrate.
Regarding claim 20, Yun (see, e.g., fig. 2) shows that the one or more magnetic layers 262, 264 includes multiple magnetic layers 262, 264 within the aperture.
Claims 1-3, 10, 14-17, and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kidwell (US 2019/0164681).
Regarding claim 1, Kidwell (see, e.g., figs. 3A-3D, Annotated Fig. 5, fig. 5, and 8) shows all aspects of the instant invention, including an inductive device 300 comprising:
a first set of conductive lines 302;
a second set of conductive lines 306;
conductive pillars 308, 310 connecting the first set of conductive lines to the second set of conductive lines to form an integrated inductor 300;
one or more magnetic layers 320, 322 extending along a length of the integrated inductor and within an aperture of the integrated inductor;
a first insulation layer First Insulation Layer and a second insulation layer Second Insulation Layer between the first set of conductive lines and the second set of conductive lines (see Annotated Fig. 5 above); and
an encapsulant (360 not included in, outside of, and between First Insulation Layer and Second Insulation Layer) between the first insulation layer and the second insulation layer, wherein the encapsulant is on a magnetic layer 320 of the one or more magnetic layers (see Annotated Fig. 5 above)
Regarding claim 15, Kidwell (see, e.g., figs. 3A-3D, Annotated Fig. 5, fig. 5, and 8 and pars.0080/ll.8-13) shows all aspects of the instant invention, including a device 800 comprising an integrated device 814 (e.g., 300 with 500) comprising:
a first set of conductive lines 302;
a second set of conductive lines 306;
conductive pillars 308, 310 connecting the first set of conductive lines to the second set of conductive lines to form an integrated inductor 300;
one or more magnetic layers 320, 322 extending along a length of the integrated inductor and within an aperture of the integrated inductor;
a first insulation layer First Insulation Layer and a second insulation layer Second Insulation Layer between the first set of conductive lines and the second set of conductive lines (see Annotated Fig. 5 above); and
an encapsulant (360 not included in, outside of, and between First Insulation Layer and Second Insulation Layer) between the first insulation layer and the second insulation layer, wherein the encapsulant is on a magnetic layer 320 of the one or more magnetic layers
Regarding claim 2, Kidwell (see, e.g., fig. 5) shows that the integrated inductor 300 is within or on a package substrate 500.
Regarding claims 3 and 17, Kidwell (see, e.g., par.0038/ll.1-6) shows that the one or more magnetic layers 320, 322 include one or more of CoZrTa, CoZrTaB, or FeCoB.
Regarding claim 8, Kidwell (see, e.g., Annotated Fig. 5) shows that the first insulation layer First Insulation Layer is on a magnetic layer 320, wherein the first insulation layer is between the magnetic layer and the first set of conductive lines 302, and wherein the magnetic layer is below the encapsulant (360 not included in, outside of, and between First Insulation Layer and Second Insulation Layer).
With regards to other language recited in claim 8, see the comments stated above in paragraph 7.
Regarding claim 9, Kidwell (see, e.g., Annotated Fig. 5) shows that the second insulation layer Second Insulation Layer is on a magnetic layer 320, wherein the second insulation layer is between the magnetic layer and the second set of conductive lines 306, and wherein the magnetic layer is above the encapsulant (360 not included in, outside of, and between First Insulation Layer and Second Insulation Layer).
With regards to other language recited in claim 9, see the comments stated above in paragraph 8.
Regarding claim 10, Kidwell (see, e.g., figs. 3A-3D) shows that the one or more magnetic layers 320, 322 includes two magnetic layers 320, 322 within the aperture.
Regarding claim 14, Kidwell (see, e.g., fig. 8 and pars.0059/ll.4-7, 0080/ll.6-13, and 0081) shows that at least one of an input of the integrated inductor 814 (e.g., 300) and an output of the integrated inductor is coupled to a solder ball (see, e.g., par.0059/ll.4-7 and the arrows in fig. 8 coupling 814 (e.g., 300) to various ball-shaped structures attached to 804 (e.g., 500)).
Regarding claim 16, Kidwell (see, e.g., figs. 5 and 8 and pars.0080/ll.8-13) shows that the device 800 further comprises a package substrate 804 (e.g., 500), and wherein the integrated inductor 814 (e.g., 300 with 500) is within or on the package substrate.
Regarding claim 20, Kidwell (see, e.g., figs. 3A-3D) shows that the one or more magnetic layers 320, 322 includes multiple magnetic layers 320, 322 within the aperture.
Claims 23-26 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kuo (US 2016/0307991).
Regarding claim 23, Kuo (see, e.g., figs. 1A-9 and Annotated Fig. 1B) shows all aspects of the instant invention, including a method of fabricating an inductive device 168, the method comprising:
forming a first set of conductive lines 132;
forming a first insulation layer First Insulation Layer above the first set of conductive lines (see Annotated Fig. 1B);
forming one or more magnetic layers 142 above the first set of conductive lines;
forming an encapsulant (140 not including, above, and outside of First Insulation Layer – see Annotated Fig. 1B) above the first set of conductive lines;
forming a second insulation layer 150 above the first set of conductive lines;
forming conductive pillars 152 connected to the first set of conductive lines; and
forming a second set of conductive lines 162 above the one or more magnetic layers and connected to the conductive pillars to form an integrated inductor 168;
wherein:
the one or more magnetic layers 142 extend along a length of the integrated inductor 168 and within an aperture of the integrated inductor;
the first insulation layer First Insulation Layer and second insulation layer 150 are between the first set of conductive lines 132 and the second set of conductive lines 162;
the encapsulant (140 not including, above, and outside of First Insulation Layer – see Annotated Fig. 1B) is between the first insulation layer and the second insulation layer; and
the encapsulant is on a magnetic layer 142 of the one or more magnetic layers 142
Regarding claim 24, Kuo (see, e.g., par.0033/ll.1-4) shows that the one or more magnetic layers 142 include one or more of CoZrTa, CoZrTaB, or FeCoB.
Regarding claim 25, Kuo (see, e.g., see, e.g., figs. 1A-9 and Annotated Fig. 1B and pars.0014-0015) shows that the first set of conductive lines 132 is above a wafer surface 101.
Regarding claim 26, Kuo (see, e.g., figs. 1A-9 and Annotated Fig. 1B) shows that the encapsulant (140 not including, above, and outside of First Insulation Layer – see Annotated Fig. 1B) at least partially encapsulates the conductive pillars 152.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Yun in view of Singh (WO 2020/106214 A1).
Regarding claims 4 and 18, Yun teaches most aspects of the instant invention (see paragraphs 12 and 13 above). Yun further shows that the magnetic layer 262 of the one or more magnetic layers 262, 264 is above the first set of conductive lines 502, 504, 506, 508 (taught to include 236 and 276 – see, e.g., par.0061/ll.14-15) and below the second set of conductive lines 501, 503, 505, 507, 509 (taught to include 230 – see, e.g., par.0061/ll.10-11). Furthermore, Yun (see, e.g., fig. 2) shows that the first set of conductive lines 502, 504, 506, 508 (taught to include 236 and 276 – see, e.g., par.0061/ll.14-15) is above an integrated device 204 surface.
However, although Yun teaches integrated devices and wafers to be equivalent for integration with Yun’s device (see, e.g., par.0152/ll.17-19), Yun fails to explicitly specify that Yun’s integrated device may be a wafer. Singh, in the same field of endeavor and in a similar device to Yun, teaches integrated devices and wafers to be equivalent and interchangeable substrates capable of providing surfaces above which to include an inductive device comprising a first set of conductive lines (see, e.g., Singh: fig. 7G and pars.0056 and 0061/ll.3-5).
Singh is evidence showing that one of ordinary skill in the art would appreciate that having a first set of conductive lines above a wafer surface would be equivalent to having a first set of conductive lines above an integrated device surface, and that such differences would result in no unexpected changes in the performance of the device of Yun. That is, the substrates of both Yun and Singh would yield the predictable result of providing a suitable supportive structure and surface for supporting the formation of various overlying conductive features.
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have Yun’s substrate comprise a wafer such that the first set of conductive lines is above a wafer surface, as taught by Singh and supported by Yun, or an integrated device, as taught by Yun, because these were recognized as equivalents in the semiconductor art and would yield the predictable result of providing a suitable supportive structure and surface for supporting the formation of various overlying conductive features. KSR International Co. v. Teleflex Inc., 550 U.S.-- ,82 USPQ2d 1385 (2007).
Claims 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Yun in view of Bharath (US 2020/0066830).
Regarding claim 5, Yun teaches most aspects of the instant invention (see paragraph 12 above). Furthermore, although Yun (see, e.g., fig. 2) teaches that Yun’s device includes a dielectric encapsulant 260/220 between Yun’s first and second sets of conductive lines (see, e.g., par.0103), Yun fails to explicitly specify that Yun’s encapsulant comprises a mold compound that includes an epoxy material. Bharath, in the same field of endeavor and in a similar device to Yun, teaches mold compounds and dielectric structures to be equivalent for encapsulation, direct contact, and integration with an integrated inductor comprising first and second sets of conductive lines (see, e.g., fig. 2A and pars.0033/ll.13-14, 0041/ll.5-15, 0047/ll.6-8, and 0050/ll.7-9). Bharath further teaches epoxy material to be one of a variety of suitable materials one of ordinary skill in the art could select for a dielectric or mold compound, and further teaches dielectrics and epoxy-material mold compounds to be equivalent for their use as encapsulants integrated with an integrated inductor (see, e.g., fig. 2A and pars.0033/ll.13-14, 0041/ll.5-15, and 0047/ll.6-8).
Bharath is evidence showing that one of ordinary skill in the art would appreciate that an encapsulant comprising a mold compound including epoxy material would be equivalent to an encapsulant comprising a general dielectric, and that such differences would result in no unexpected changes in the performance of the device of Yun. That is, the encapsulant structures of both Yun and Bharath would yield the predictable result of providing an insulating material capable of surrounding and separating conductive features in an integrated inductor and semiconductor device.
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have Yun’s encapsulant comprise a mold compound that includes an epoxy material, as taught by Bharath, or a general dielectric, as taught by Yun, because these were recognized as equivalents in the semiconductor art, and selecting among known equivalents for their known intended use would be within the level of ordinary skill in the art. Furthermore, both encapsulant structures would yield the predictable result of providing an insulating material capable of surrounding and separating conductive features in an integrated inductor and semiconductor device. KSR International Co. v. Teleflex Inc., 550 U.S.-- ,82 USPQ2d 1385 (2007).
Regarding claim 6, Yun shows most aspects of the instant invention (see paragraph 12 above). Yun, however, fails to explicitly specify the materials of Yun’s first insulation layer, second insulation layer, and encapsulant, including if the first insulation layer, the second insulation layer, or both, include a different material than the encapsulant. Bharath, in the same field of endeavor and in a similar device to Yun, teaches that when certain materials are selected for a first and/or second insulation layer such that the materials for the first and/or second insulation layer differ from the materials selected for an encapsulant that the encapsulant may provide mechanical support to the insulation layer(s), thereby mitigating warpage and improving the mechanical strength of the overall device (see, e.g., Bharath: pars.0034 and 0046-0047/ll.1-6).
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have the first insulation layer, the second insulation layer, or both, include a different material than the encapsulant, as taught by Bharath, so as to provide mechanical support to the insulation layer(s), mitigate warpage, and improve the mechanical strength of Yun’s device.
Regarding claim 7, Yun shows most aspects of the instant invention (see paragraph 12 above). Furthermore, Yun (see, e.g., par.0040/ll.7-9) teaches that the first insulation layer and second insulation layer comprise dielectric materials. However, Yun fails to explicitly specify the exact materials of the first and second insulation layers, including if the first insulation layer, the second insulation layer, or both, include(s) a polyimide material. Bharath, in the same field of endeavor and in a similar device to Yun, teaches polyimide material to be one material of a variety of suitable materials for insulation layers integrated with an integrated inductor (see, e.g., Bharath: fig. 2A and pars.0037/ll.1-5, 0034, and 0041/ll.5-13).
Bharath is evidence showing that one of ordinary skill in the art would appreciate that a first insulation layer and/or a second insulation layer including a polyimide material would be equivalent to a first insulation layer and/or a second insulation layer including any other dielectric, and that such differences would result in no unexpected changes in the performance of the device of Yun. That is, the insulation layers of both Yun and Bharath would yield the predictable result of providing an insulating material capable of separating conductive features in an integrated inductor.
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have Yun’s a first insulation layer and/or a second insulation layer include a polyimide material, as taught by Bharath, or another dielectric, as taught by Yun, because these were recognized as equivalents in the semiconductor art, and selecting among known equivalents for their known intended use would be within the level of ordinary skill in the art. Furthermore, both insulation layer structures would yield the predictable result of providing an insulating material capable of separating conductive features in an integrated inductor. KSR International Co. v. Teleflex Inc., 550 U.S.-- ,82 USPQ2d 1385 (2007).
Claims 12 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Kidwell in view of Singh.
Regarding claims 12 and 21, Kidwell teaches most aspects of the instant invention (see paragraphs 24-25 above). Furthermore, Kidwell (see, e.g., fig. 5) appears to show that the first set of conductive lines 302 are in a redistribution layer M1, and wherein the second set of conductive lines 306 are in a second redistribution layer M2. Additionally, Singh, in the same field of endeavor and in a similar device to Kidwell, teaches that including first and second sets of conductive lines in redistribution layers can allow for the inclusion of supportive layers for the sets of conductive lines, while simultaneously providing fan-out connections to external contacts (see, e.g., Singh: fig. 7G and par.0058/ll.3-11).
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have Kidwell’s first set of conductive lines in a first redistribution layer and second set of conductive lines in a second redistribution layer, as apparently illustrated by Kidwell and explicitly taught by Singh, so as to have Kidwell’s sets of conductive lines be included in supportive structures allowing for the inclusion of supportive layers while simultaneously permitting fan-out connections to external contacts, expanding the external applications of Kidwell’s device.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Kidwell in view of Zou (US 2021/0151549).
Regarding claims 13, Kidwell teaches most aspects of the instant invention (see paragraph 24 above). Furthermore, Kidwell (see, e.g., fig. 8 and par.0080/ll.6-13) shows that the integrated inductor 814 (e.g., 300) is formed near a surface of a power management integrated circuit (PMIC) 818, and wherein an input of the integrated inductor is coupled to circuitry of the PMIC (see, e.g., arrows in fig. 8 and par.0081). However, although Kidwell specifies that Kidwell’s integrated inductor 814 (e.g., 300) is integrated into an overall device 800 including a system-on-chip 802 and a PMIC 818 coupled through a board 806 (see, e.g., fig. 8 and pars.0080/ll.6-13 and 0081), Kidwell fails to explicitly specify that Kidwell’s integrated inductor is formed on a surface of the PMIC. Zou, in the same field of endeavor, teaches that rather than coupling a PMIC and system-on-chip through a board, which introduces parasitic effects and electrical noise, a system vertically integrating a system-on-chip and PMIC, wherein integrated inductors are formed on the surface of the PMIC, avoids performance degradation while ensuring the robustness and reliability of the overall device (see, e.g., Zou: fig. 3A and pars.0034/ll.7-22, 0044/ll.12-15, 0100/ll.7-13).
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have Kidwell’s overall device comprise a vertically-integrated system-on-chip and PMIC, wherein Kidwell’s integrated inductor is formed on a surface of the PMIC, as taught by Zou, so as to avoid parasitic effects, electrical noise, and performance degradation in Kidwell’s device while ensuring the robustness and reliability of Kidwell’s device.
Claims 23-24, 26-27, and 29 are rejected under 35 U.S.C. 103 as being unpatentable over Yun in view of Kuo.
Regarding claim 23, Yun (see, e.g., figs. 2 and 19A-19B and par.0132) shows most aspects of the instant invention, including a method 2100 of fabricating an inductive device 1925 (e.g., 208), the method comprising:
forming a first set of conductive lines 501, 503, 505, 507, 509 (taught to include 230 and 1925 – see, e.g., pars.0061/ll.10-11 and 0097/ll.8-12);
forming a first insulation layer 223 located above the first set of conductive lines;
forming one or more magnetic layers (262, 264 corresponding to 1902, 1905) (see, e.g., par.0043/ll.16-20) located above a first set of conductive lines;
forming an encapsulant 220/260 located above the first set of conductive lines;
forming a second insulation layer 222 located above the first set of conductive lines;
forming conductive pillars 273, 233 (unlabeled in figs. 19A-19B– see, e.g., par. 0097/ll.8-12) connected to the first set of conductive lines (see, e.g., step 10 of fig. 19B); and
forming a second set of conductive lines 502, 504, 506, 508 (taught to include 236, 276 and 1921, 1920 – see, e.g., pars.0061/ll.14-15 and 0097/ll.8-12) above the one or more magnetic layers and connected to the conductive pillars to form an integrated inductor 1925 (e.g., 208)
wherein:
the one or more magnetic layers (262, 264 corresponding to 1902, 1905) (see, e.g., par.0043/ll.16-20) extend along a length of the integrated inductor 1925 (e.g., 208) and within an aperture of the integrated inductor;
the first insulation layer 223 and the second insulation layer 222 are between the first set of conductive lines 501, 503, 505, 507, 509 (taught to include 230 and 1925 – see, e.g., pars.0061/ll.10-11 and 0097/ll.8-12) and the second set of conductive lines 502, 504, 506, 508 (taught to include 236, 276 and 1921, 1920 – see, e.g., pars.0061/ll.14-15 and 0097/ll.8-12);
the encapsulant 220/260 is between the first insulation layer and the second insulation layer; and
the encapsulant is on a magnetic layer (262, corresponding to 1902) of the one or more magnetic layers
Although Yun teaches most aspects of the instant invention, Yun fails to explicitly specify that Yun’s method includes forming the first insulation layer, the one or more magnetic layers, the encapsulant, and the second insulation layer features above the first set of conductive lines. Kuo, in the same field of endeavor, teaches a similar method to Yun, wherein Kuo’s method for fabricating an inductive device 168 comprises (see, e.g., Kuo: figs. 1A-9 and Annotated Fig. 1B):
forming a first set of conductive lines 132;
forming a first insulation layer First Insulation Layer above the first set of conductive lines (see Annotated Fig. 1B);
forming one or more magnetic layers 142 above the first set of conductive lines;
forming an encapsulant (140 not including, above, and outside of First Insulation Layer – see Annotated Fig. 1B) above the first set of conductive lines;
forming a second insulation layer 150 above the first set of conductive lines;
forming conductive pillars 152 connected to the first set of conductive lines; and
forming a second set of conductive lines 162 above the one or more magnetic layers and connected to the conductive pillars to form an integrated inductor 168;
wherein:
the one or more magnetic layers 142 extend along a length of the integrated inductor 168 and within an aperture of the integrated inductor;
the first insulation layer First Insulation Layer and second insulation layer 150 are between the first set of conductive lines 132 and the second set of conductive lines 162;
the encapsulant (140 not including, above, and outside of First Insulation Layer – see Annotated Fig. 1B) is between the first insulation layer and the second insulation layer; and
the encapsulant is on a magnetic layer 142 of the one or more magnetic layers 142
Kuo further teaches that integrated inductors fabricated through Kuo’s method provide performance improvements in areas such as size, cost, and power consumption, and can further be integrated with additional electronic components to reduce the form factor of overall devices (see, e.g., Kuo: par.0039/ll.14-22).
Kuo is evidence showing that one of ordinary skill in the art would appreciate that a method of fabricating an inductive device comprising forming a first insulation layer, one or more magnetic layers, an encapsulant, and a second insulation layer features above a first set of conductive lines would be equivalent to a method of fabricating an inductive device comprising forming a first insulation layer, one or more magnetic layers, an encapsulant, and a second insulation layer located above a first set of conductive lines, and that such differences would result in no unexpected changes in the performance of the device of Yun. That is, the manufacturing processes of both Yun and Kuo would yield the predictable result of fabricating a suitable integrated inductor for integration with various other conductive or electronic components.
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have Yun’s method comprise forming the first insulation layer, the one or more magnetic layers, the encapsulant, and the second insulation layer features above the first set of conductive lines, as taught by Kuo, or forming the first insolation layer, the one or more magnetic layers, the encapsulant, and the second insulation layer located above a first set of conductive lines, as taught by Yun, because these were recognized as equivalents in the semiconductor art and would yield the predictable result of fabricating a suitable integrated inductor for integration with various other conductive or electronic components. KSR International Co. v. Teleflex Inc., 550 U.S.-- ,82 USPQ2d 1385 (2007).
Furthermore, Kuo is evidence that at the time of filing the invention one of ordinary skill in the art would find particular incentive to adopt Kuo’s method to fabricate the device of Yun, including the steps of forming a first insulation layer, one or more magnetic layers, an encapsulant, and a second insulation layer above a first set of conductive lines, as taught by Kuo, so as to fabricate an integrated inductor providing performance improvements in areas such as size, cost, and power consumption that can further be integrated with additional electronic components to reduce the form factor of overall devices.
Regarding claim 24, Yun (see, e.g., par.0077/ll.3-4) shows that the one or more magnetic layers 262, 264 includes one or more of CoZrTa, CoZrTaB, or FeCoB.
Regarding claim 26, Yun (see, e.g., fig. 2) shows that the encapsulant 220/260 at least partially encapsulates the conductive pillars 273, 275.
Regarding claim 27, Yun (see, e.g., fig. 2) shows that the first insulation layer 223 is on a magnetic layer 262, and wherein the magnetic layer is above the first insulation layer and below the encapsulant 220/260.
With regards to other language recited in claim 27, see the comments stated above in paragraph 9.
Regarding claim 29, Yun (see, e.g., fig. 2) shows that the first insulation layer 223 is below the encapsulant 220/260, and wherein a second magnetic layer 264 of the one or more magnetic layers 262, 264 is above the encapsulant.
Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Kidwell in view of Kuo.
Regarding claim 23, Kidwell (see, e.g., figs. 3A-3D, Annotated Fig. 5, fig. 5, 7, and 8 and par.0062/ll.10-15) shows most aspects of the instant invention, including a method 705-725 of fabricating an inductive device 300, the method comprising:
forming a first set of conductive lines 302;
forming a first insulation layer First Insulation Layer located above the first set of conductive lines (see Annotated Fig. 5);
forming one or more magnetic layers 320, 322 located above the first set of conductive lines;
forming an encapsulant (360 not included in, outside of, and between First Insulation Layer and Second Insulation Layer) located above the first set of conductive lines;
forming a second insulation layer Second Insulation Layer located above the first set of conductive lines;
forming conductive pillars 308, 310 connected to the first set of conductive lines; and
forming a second set of conductive lines 306 above the one or more magnetic layers and connected to the conductive pillars to form an integrated inductor 300
wherein:
the one or more magnetic layers 320, 322 extend along a length of the integrated inductor 300 and within an aperture of the integrated inductor;
the first insulation layer First Insulation Layer and the second insulation layer Second Insulation Layer are between the first set of conductive lines 302 and the second set of conductive lines 306;
the encapsulant (360 not included in, outside of, and between First Insulation Layer and Second Insulation Layer) is between the first insulation layer and the second insulation layer; and
the encapsulant is on a magnetic layer 320 of the one or more magnetic layers
Although Kidwell teaches most aspects of the instant invention, Kidwell fails to explicitly specify that Kidwell’s method includes forming the first insulation layer, the one or more magnetic layers, the encapsulant, and the second insulation layer features above the first set of conductive lines. Kuo, in the same field of endeavor, teaches a similar method to Kidwell, wherein Kuo’s method for fabricating an inductive device 168 comprises (see, e.g., Kuo: figs. 1A-9 and Annotated Fig. 1B):
forming a first set of conductive lines 132;
forming a first insulation layer First Insulation Layer above the first set of conductive lines (see Annotated Fig. 1B);
forming one or more magnetic layers 142 above the first set of conductive lines;
forming an encapsulant (140 not including, above, and outside of First Insulation Layer – see Annotated Fig. 1B) above the first set of conductive lines;
forming a second insulation layer 150 above the first set of conductive lines;
forming conductive pillars 152 connected to the first set of conductive lines; and
forming a second set of conductive lines 162 above the one or more magnetic layers and connected to the conductive pillars to form an integrated inductor 168
wherein:
the one or more magnetic layers 142 extend along a length of the integrated inductor 168 and within an aperture of the integrated inductor;
the first insulation layer First Insulation Layer and second insulation layer 150 are between the first set of conductive lines 132 and the second set of conductive lines 162;
the encapsulant (140 not including, above, and outside of First Insulation Layer – see Annotated Fig. 1B) is between the first insulation layer and the second insulation layer; and
the encapsulant is on a magnetic layer 142 of the one or more magnetic layers 142
Kuo further teaches that integrated inductors fabricated through Kuo’s method provide performance improvements in areas such as size, cost, and power consumption, and can further be integrated with additional electronic components to reduce the form factor of overall devices (see, e.g., Kuo: par.0039/ll.14-22).
Kuo is evidence showing that one of ordinary skill in the art would appreciate that a method of fabricating an inductive device comprising forming a first insulation layer, one or more magnetic layers, an encapsulant, and a second insulation layer above a first set of conductive lines would be equivalent to a method of fabricating an inductive device comprising forming a first insulation layer, one or more magnetic layers, an encapsulant, and a second insulation layer located above a first set of conductive lines, and that such differences would result in no unexpected changes in the performance of the device of Kidwell. That is, the manufacturing methods of both Kidwell and Kuo would yield the predictable result of fabricating a suitable integrated inductor for integration with various other conductive or electronic components.
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have Kidwell’s method comprise forming the first insulation layer, the one or more magnetic layers, the encapsulant, and the second insulation layer features above the first set of conductive lines, as taught by Kuo, or forming the first insolation layer, the one or more magnetic layers, the encapsulant, and the second insulation layer located above the first set of conductive lines, as taught by Kidwell, because these were recognized as equivalents in the semiconductor art and would yield the predictable result of fabricating a suitable integrated inductor for integration with various other conductive or electronic components. KSR International Co. v. Teleflex Inc., 550 U.S.-- ,82 USPQ2d 1385 (2007).
Furthermore, Kuo is evidence that at the time of filing the invention one of ordinary skill in the art would find particular incentive to adopt Kuo’s method to fabricate the device of Kidwell, including the steps of forming a first insulation layer, one or more magnetic layers, an encapsulant, and a second insulation layer above a first set of conductive lines, as taught by Kuo, so as to fabricate an integrated inductor providing performance improvements in areas such as size, cost, and power consumption that can further be integrated with additional electronic components to reduce the form factor of overall devices.
Claim 30 is rejected under 35 U.S.C. 103 as being unpatentable over Kidwell/Kuo in view of Zou.
Regarding claim 30, Kidwell/Kuo teaches most aspects of the instant invention (see paragraphs 75-80 above). Furthermore, Kidwell (see, e.g., fig. 8 and par.0080/ll.6-13) shows that Kidwell’s integrated inductor 814 (e.g., 300) is formed near a surface of a power management integrated circuit (PMIC) 818, and wherein an input of the integrated inductor is coupled to circuitry of the PMIC (see, e.g., arrows in fig. 8 and par.0081). However, although Kidwell specifies that Kidwell’s integrated inductor 814 (e.g., 300) is integrated into an overall device 800 including a system-on-chip 802 and a PMIC 818 coupled through a board 806 (see, e.g., fig. 8 and pars.0080/ll.6-13 and 0081), Kidwell fails to explicitly specify that Kidwell’s integrated inductor is formed on a surface of the PMIC. Zou, in the same field of endeavor, teaches that rather than coupling a PMIC and system-on-chip through a board, which introduces parasitic effects and electrical noise, a system vertically integrating a system-on-chip and PMIC, wherein integrated inductors are formed on the surface of the PMIC, avoids performance degradation while ensuring the robustness and reliability of the overall device (see, e.g., Zou: fig. 3A and pars.0034/ll.7-22, 0044/ll.12-15, 0100/ll.7-13).
Therefore, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have Kidwell’s overall device comprise a vertically-integrated system-on-chip and PMIC, wherein Kidwell’s integrated inductor is formed on a surface of the PMIC, as taught by Zou, so as to avoid parasitic effects, electrical noise, and performance degradation in Kidwell’s device while ensuring the robustness and reliability of Kidwell’s device.
Response to Arguments
Applicant’s amendments to the drawings have overcome the objections to the drawings put forth in the previous Office action mailed on 02/26/2026. Accordingly, the objections to the drawings put forth in the previous Office action are hereby withdrawn.
With regards to the claims, Applicant argues:
The cited portions of Yun do not disclose each and every element of claims 1 and 15. Therefore, claims 1 and 15 and all claims dependent on claims 1 and 15 are, by virtue of their dependency, allowable. The cited portions of Kidwell do not disclose each and every element of claims 1 and 15. Therefore, claims 1 and 15 and all claims dependent on claims 1 and 15 are, by virtue of their dependency, allowable. The cited portions of Kuo do not disclose each and every element of claim 23. Therefore, claim 23 is allowable. Yun in view of Kuo and Kidwell in view of Kuo similarly do not disclose each and every limitation of claim 23. Therefore, claim 23 and all claims dependent on claim 23 are, by virtue of their dependency, allowable.
The Examiner responds:
Yun, Kidwell, Kuo, Yun in view of Kuo, and Kidwell in view of Kuo all teach the recited limitations of the mentioned claims. See, e.g., paragraphs 12-22, 24-35, 37-40, 63-73, and 75-80 of the Office action above, which demonstrate that Yun, Kidwell, Kuo, Yun in view of Kuo, and Kidwell in view of Kuo teach the elements as claimed.
With regards to the claims, Applicant additionally argues:
The cited portions of Singh do not disclose recited limitations of claims 1, 15, and 23. Singh, by virtue of this deficiency, fails to teach claims 1, 15, and 23. Therefore, claims 1, 15, and 23 and all claims dependent on claims 1, 15, and 23 are, by virtue of their dependency, allowable. Furthermore, cited portions of Bharath also do not disclose recited limitations of claims 1, 15, and 23. Bharath, by virtue of this deficiency, fails to teach claims 1, 15, and 23. Therefore, claims 1, 15, and 23 and all claims dependent on claims 1, 15, and 23 are, by virtue of their dependency, allowable. Moreover, cited portions of Zou do not disclose recited limitations of claims 1 and 23. Zou, by virtue of this deficiency, fails to teach claims 1 and 23. Therefore, claims 1 and 23 and all claims dependent on claims 1 and 23 are, by virtue of their dependency, allowable.
In response to applicant’s arguments against Singh, Bharath, and Zou, one cannot show non-obviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
The applicant’s argument addresses only Singh, Bharath, and Zou individually and does not rebut the combination of Yun in view of Singh and Bharath, Kidwell in view of Singh, Kidwell in view of Zou, Kuo in view of Bharath, Yun in view of Kuo and Singh, Yun in view of Kuo and Bharath, and Kidwell in view of Kuo and Zou. Such arguments similarly extend to rejections in view of Kuo. Yun, Kidwell, and Kuo already collectively teach the limitations of claims 1, 15, and 23 (see, e.g., paragraphs 12-22, 24-35, 37-40, 63-73, and 75-80 of the Office action above). The amendments to claims 1, 15, and 23 are, therefore, met by Yun, Kidwell, and Kuo.
Singh was relied on to supply the other recited features in dependent claims, for example, to teach that including first and second sets of conductive lines in redistribution layers can allow for the inclusion of supportive layers for the sets of conductive lines while simultaneously providing fan-out connections to external contacts (see, e.g., Singh: fig. 7G and par.0058/ll.3-11). Bharath was also relied on to supply the other recited features in dependent claims, for example, to teach that when certain materials are selected for a first and/or second insulation layer such that the materials for the first and/or second insulation layer differ from the materials selected for an encapsulant that the encapsulant may provide mechanical support to the insulation layer(s), thereby mitigating warpage and improving the mechanical strength of the overall device (see, e.g., Bharath: pars.0034 and 0046-0047/ll.1-6). Similarly, Zou was also relied on to supply other recited features in dependent claims, in particular, that forming integrated inductors on the surface of a PMIC helps avoid performance degradation while ensuring the robustness and reliability of an overall device (see, e.g., Zou: fig. 3A and pars.0034/ll.7-22, 0044/ll.12-15, 0100/ll.7-13). When the references are considered in combination, all limitations of the claims are shown.
The applicant’s individual focus solely on Singh, Bharath, and Zou alone constitutes an improper piecemeal analysis because it fails to address the combinations of Yun in view of Singh and Bharath, Kidwell in view of Singh, Kidwell in view of Zou, Kuo in view of Bharath, Yun in view of Kuo and Singh, Yun in view of Kuo and Bharath, and Kidwell in view of Kuo and Zou relied upon in the rejection. Such improper piecemeal analysis similarly extends to rejections in view of Kuo. Accordingly, Applicant’s arguments regarding this matter are found unpersuasive.
Applicant’s other arguments with respect to the claims have been considered but are moot in view of the new grounds of rejection.
Conclusion
Applicant’s amendment necessitated the new grounds of rejection presented in this Office action. Accordingly, this action is made final. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire three months from the mailing date of this action. In the event a first reply is filed within two months of the mailing date of this final action and the advisory action is not mailed until after the end of the three-month shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than six months from the mailing date of this final action.
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Any inquiry concerning this communication or earlier communications from the examiner should be directed to Shamita Hanumasagar at (703) 756-1521 and between the hours of 7:00 AM to 5:00 PM (Eastern Standard Time) Monday through Thursday or by e-mail via Shamita.Hanumasagar@uspto.gov. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705.
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/Shamita S. Hanumasagar/Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
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