Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Currently, claims 1-20 are pending and examined below.
Information Disclosure Statement (IDS)
The information disclosure statement submitted on 06/29/2023 ("06-29-23 IDS") is in compliance with the provisions of 37 CFR 1.97. Accordingly, the 06-29-23 IDS is being considered by the examiner.
Claim Rejections - 35 USC § 1021
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3, 4, 7-9, 13-17 and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Pub. No. US 2022/0262766 A1 to Chen et al. (“Chen”).
Fig. 7 of Chen has been annotated to support the rejection below:
[AltContent: textbox (V1)][AltContent: arrow][AltContent: textbox (V2)][AltContent: arrow][AltContent: textbox (Die3)][AltContent: textbox (D1)][AltContent: textbox (D2)][AltContent: textbox (CC2)][AltContent: arrow][AltContent: textbox (P2)][AltContent: arrow][AltContent: textbox (Die1)][AltContent: textbox (Die2)][AltContent: textbox (P1)][AltContent: arrow][AltContent: textbox (CC1)][AltContent: arrow][AltContent: textbox (CC3)][AltContent: arrow][AltContent: textbox (CC4)][AltContent: arrow]
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Regarding independent claim 1, Chen teaches a microelectronic assembly (see Fig. 7 as annotated above), comprising:
a first layer 432 including:
a first die Die1 having a first conductive contact CC1;
a second die Die2 having a second conductive contact CC2; and
a pad layer 422 (para [0032] - “bond pads 422”) on the first die Die1 and the second die Die2, the pad layer 422 including a first pad P1 and a second pad P2, wherein the first pad P1 is coupled to the first conductive contact CC1 and is offset from the first conductive contact CC1 in a first direction D1, and wherein the second pad P2 is coupled to the second conductive contact CC2 and is offset from the second conductive contact CC2 in a second direction D2 different than the first direction D1; and
a second layer 332 including a third die Die3 having a third conductive contact CC3 and a fourth conductive contact CC4, wherein:
the first layer 432 is coupled to the second layer 332 by an interconnect layer 330 (para [0030] - “Backside interconnect structure 330”) having metal-to-metal bonds and fusion bonds (para [0032] Device dies 410 are bonded to reconstructed wafer 332 through hybrid bonding, which includes direct metal-to-metal bonding and fusion bonding. For example, a bottom dielectric layer in device die 410 is bonded to a top dielectric layer 324 through fusion bonding, and bond pads 422 in device die 410 is bonded to bond pads 328 through direct metal-to-metal bonding.),
the first conductive contact CC1 is (electrically) coupled to the third conductive contact CC3 by the first pad P1 and one or more of the metal-to-metal bonds, and
the second conductive contact CC2 is (electrically) coupled to the fourth conductive contact CC4 by the second pad P2 and one or more of the metal-to-metal bonds (see Fig. 7).
Regarding claim 3, Chen teaches a first via V1 between and coupled to the first conductive contact CC1 and the first pad P1; and
a second via V2 between and coupled to the second conductive contact CC2 and the second pad P2.
Regarding claim 4, Chen teaches a first trace V1 between and coupled to the first conductive contact CC1 and the first pad P1; and
a second trace V2 between and coupled to the second conductive contact CC2 and the second pad P2.
Regarding claim 7, Chen teaches the first layer 432 that further includes an insulating material 420 (para [0034] - “gap-filling regions 420”) partially surrounding the first die Die1 and the second die Die2, and the pad layer 416, 422 is on the insulating material 420.
Or, Chen teaches the first layer 432 that further includes an insulating material 416 partially surrounding the first die Die1 and the second die Die2, and the pad layer 422 is on the insulating material 416.
Regarding claim 8, Chen teaches the first layer 432 that further includes a via V2 through the insulating material 416, the pad layer 422 that further includes a third pad coupled to the via V2.
Regarding independent claim 9, Chen teaches a microelectronic assembly (see Fig. 7 as annotated above), comprising:
a first layer 432 including:
a first die Die1 having a first conductive contact CC1;
a second die Die2 having a second conductive contact CC2; and
a pad layer 422 (para [0032] - “bond pads 422”) on the first die Die1 and the second die Die2, the pad layer including a first pad P1 and a second pad P2, wherein the first pad P1 is coupled to the first conductive contact CC1 and is offset from the first conductive contact CC1 in a first direction D1 by a first dimension, and wherein the second pad P2 is coupled to the second conductive contact CC2 and is offset from the second conductive contact CC2 in a second direction D2 by a second dimension different than the first dimension; and
a second layer 332 including a third die Die3 having a third conductive contact CC3 and a fourth conductive contact CC4, wherein:
the first layer 432 is coupled to the second layer 332 by an interconnect layer 330 (para [0030] - “Backside interconnect structure 330”) having metal-to-metal bonds and fusion bonds (para [0032] Device dies 410 are bonded to reconstructed wafer 332 through hybrid bonding, which includes direct metal-to-metal bonding and fusion bonding. For example, a bottom dielectric layer in device die 410 is bonded to a top dielectric layer 324 through fusion bonding, and bond pads 422 in device die 410 is bonded to bond pads 328 through direct metal-to-metal bonding.),
the first conductive contact CC1 is (electrically) coupled to the third conductive contact CC3 by the first pad P1 and one or more of the metal-to-metal bonds, and
the second conductive contact CC2 is (electrically) coupled to the fourth conductive contact CC4 by the second pad P2 and one or more of the metal-to-metal bonds (see Fig. 7).
Regarding claim 13, Chen teaches the first direction D1 is a first rotational direction.
Regarding claim 14, Chen teaches the first pad P1 that is further offset from the first conductive contact CC1 in a second direction D2 different than the first direction D1.
Regarding claim 15, Chen teaches the first pad P1 that is offset from the first conductive contact CC1 in the second direction D2 by a third dimension different than the first dimension and the second dimension.
Regarding claim 16, Chen teaches an insulating material 320, 420 (para [0033] - “gap-filling regions 420”; para [0052] - “Gap-filling regions 320 encircles device dies 310 when viewed in the top view. Bonding layer 324, which is a dielectric layer, is then formed.”) surrounding the first die Die1, the second die Die2, and the third die Die3.
Regarding independent claim 17, Chen teaches a microelectronic assembly (see Fig. 7 as annotated above), comprising:
a first layer 432 including:
a first die Die1 having a first conductive contact CC1;
a second die Die2 having a second conductive contact CC2; and
a pad layer 422 (para [0032] - “bond pads 422”) on the first die Die1 and the second die Die2, the pad layer 422 including a first pad P1 and a second pad P2, wherein the first pad P1 is coupled to the first conductive contact CC1 and is offset from the first conductive contact CC1 in a first direction D1 by a first dimesion, and wherein the second pad P2 is coupled to the second conductive contact CC2 and is offset from the second conductive contact CC2 in a second direction D2 by a second dimension that is different than the first dimension; and
a second layer 332 including a third die Die3 having a third conductive contact CC3 and a fourth conductive contact CC4, wherein:
the first layer 432 is coupled to the second layer 332 by an interconnect layer 330 (para [0030] - “Backside interconnect structure 330”) having metal-to-metal bonds and fusion bonds (para [0032] Device dies 410 are bonded to reconstructed wafer 332 through hybrid bonding, which includes direct metal-to-metal bonding and fusion bonding. For example, a bottom dielectric layer in device die 410 is bonded to a top dielectric layer 324 through fusion bonding, and bond pads 422 in device die 410 is bonded to bond pads 328 through direct metal-to-metal bonding.);
the first conductive contact CC1 is (electrically) coupled to the third conductive contact CC3 by the first pad P1 and one or more of the metal-to-metal bonds, and
the second conductive contact CC2 is (electrically) coupled to the fourth conductive contact CC4 by the second pad P2 and one or more of the metal-to-metal bonds (see Fig. 7).
Regarding claim 19, Chen teaches a first via V1 between and coupled to the first conductive contact CC1 and the first pad P1; and
a second via V2 between and coupled to the second conductive contact CC2 and the second pad P2.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
(1). Determining the scope and contents of the prior art.
(2). Ascertaining the differences between the prior art and the claims at issue.
(3). Resolving the level of ordinary skill in the pertinent art.
(4). Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 2, 10 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Yu.
Regarding each of the claims 2, 10 and 18, Yu teaches a general condition of metal-to-metal bonds having a pitch, but does not teach a specific condition of the pitch having a wide range between 50 nanometers and 10 microns, which represents more than two orders of magnitude of range.
According to Section 2144.05 of the MPEP, "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F. 2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Here, Yu teaches that “Metal-metal bonds, such as Cu—Cu bonds, may be used between the dies and the wafer scale interposer to form fine pitch contact pads for high density signals and/or larger size contact pads with low resistance to achieve better yield with lower power for high speed signals.” (para [0083]), so Yu recognizes the need for the pitch to be fine.
Unless the Applicant can show that the claimed specific condition of the pitch having a range that spans more than two orders of magnitude in 50 nanometers to 10 microns produces unexpected results that are different in kind and not different in degree over said general condition taught by Yu, each of the claims 2, 10 or 18 would be obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, because it would not be inventive to discover the optimum or workable ranges by routine experimentation. The burden shifts to the Applicant to show that the claimed range provides unexpected result that is difference in kind and not difference in degree. See In re Aller, 220 F. 2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Allowable Subject Matter
The following is a statement of reasons for the indication of allowable subject matter:
Claim 5 is objected to for depending on a rejected base claim 1, but would be allowable if it is rewritten in independent form to include all of the limitations of the base claim 1 or the base claim 1 is amended to include all of the limitations of claim 5.
Claim 6 is objected to for depending on a rejected base claim 1, but would be allowable if it is rewritten in independent form to include all of the limitations of the base claim 1 or the base claim 1 is amended to include all of the limitations of claim 6.
Claim 11 is objected to for depending on a rejected base claim 9, but would be allowable if it is rewritten in independent form to include all of the limitations of the base claim 9 or the base claim 9 is amended to include all of the limitations of claim 11.
Claim 12 is objected to for depending on a rejected base claim 9, but would be allowable if it is rewritten in independent form to include all of the limitations of the base claim 9 or the base claim 9 is amended to include all of the limitations of claim 12.
Claim 20 is objected to for depending on a rejected base claim 17, but would be allowable if it is rewritten in independent form to include all of the limitations of the base claim 17 or the base claim 17 is amended to include all of the limitations of claim 20.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Pub. No. US 2022/0352082 A1 to Yu et al.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL JUNG whose telephone number is (408) 918-7554. The examiner can normally be reached on 8:30 A.M. to 7 P.M.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached on (571) 272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHAEL JUNG/Primary Examiner, Art Unit 2817 27 July 2026
1 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status
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