DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 1-12 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 12/21/2025.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 19-21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
With respect to claims 19-21, the recitation of “selectivity ratio greater than 2:1” renders the claim as indefinite. It is unclear as to between what materials the selectivity ratio is between. Currently, the selectivity ratio can be between any arbitrary materials.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 13, 15-21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mathur et al. (U.S. Publication No. 2020/0411633 A1; hereinafter Mathur) in view of Noguchi et al. (U.S. Patent No. 9,224,637 B1; hereinafter Noguchi)
With respect to claim 13, Mathur discloses a method of fabricating a semiconductor device, the method comprising: in a first etch stage for forming a contact hole in a contact region of the semiconductor device, etching an oxide layer [140] of a pre-metal dielectric (PMD) stack to create a partially formed contact hole extending through the oxide layer and landing on a first etch stop layer [134] forming part of the PMD stack; in a second etch stage, etching the first etch stop layer to extend the partially formed contact hole to land in a second etch stop layer [136] overlying a silicide area of the contact region, the silicide area [128] abutting an oxide layer [126] extension extending from a source/drain region toward a gate dielectric layer [123]; and in a third etch stage, etching the second etch stop layer to form a completed contact hole landing on the silicide area of the contact region and at least a portion of the oxide layer extension remaining unconsumed after the third etch stage (see Figure 3(i)). Mathur fails to explicitly disclose wherein the etching process landing in a first etch stop layer. In the same field of endeavor Noguchi discloses a three-step etching process wherein the first etching process landing in a first etch stop layer [613] (see Figure 8-10), [821] and [822] land in [613] during the first stage of the etching as seen in Figure 8). Implementation of a Noguchi’s etching process enforces Mathur’s etching process and chemistry changes of etchants to allow for controlled etching conditions (see Noguchi Column 9, lines 5-25 and Mathur ¶[0029]). Both processes comprise interchanging etchants and the teachings of Noguchi disclose explicitly examples of controlling the contact hole etching to stop wherever desired without damaging surrounding etch stop layers). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention
With respect to claim 15, the combination of Mathur and Noguchi discloses wherein the second etch stop layer has a thickness of about 5 nm to 10 nm and the PMD stack has a thickness of about 150 nm to 200 nm (see Mathur ¶[0025-0029]).
With respect to claim 16, the combination of Mathur and Noguchi fails to explicitly wherein the second etch stop layer is formed as a stressor film having a film stress greater than 1 Gigapascal (GPa), however does disclose imparting tensile stress (See Mathur ¶[0026]). Based on the disclosure, it appears that the stress range is noncritical. It has been held that "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Therefore it would have been obvious to one of ordinary skill in the art at the time of invention to optimize the amount of stress imparted into the transistor based on routine experimentation to improve carrier mobility and facilitate low power, low voltage operation (See Mathur ¶[0017] and ¶[0026]).
With respect to claim 17, the combination of Mathur and Noguchi discloses wherein the at least a portion of the oxide layer extension remaining unconsumed after the third etch stage comprises a perforated portion (See Mathur Figure 3(i)).
With respect to claim 18, the combination of Mathur and Noguchi discloses wherein the at least a portion of the oxide layer extension remaining unconsumed after the third etch stage comprises an intact portion (See Mathur Figure 3(i)).
With respect to claim 19, the combination of Mathur and Noguchi fails to explicitly disclose wherein the first etch stage is performed using an etch recipe having a selectivity ratio greater than 2:1, however based on a lack of materials to compare, it appears that this ratio is noncritical. Mathur and Noguchi discloses adjusting the etching recipe and conditions for all stages of etching (see Mathur ¶[0029] and Noguchi Column 9, lines 5-Column 10-11). It has been held that [W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the selectivity ratio of each etch stage’s etch recipe can be adjusted based on routine experimentation to be optimized for the material being etched.
With respect to claim 20, the combination of Mathur and Noguchi fails to explicitly disclose wherein the second etch stage is performed using an etch recipe having a selectivity ratio greater than 2:1, however based on a lack of materials to compare, it appears that this ratio is noncritical. Mathur and Noguchi discloses adjusting the etching recipe and conditions for all stages of etching (see Mathur ¶[0029] and Noguchi Column 9, lines 5-Column 10-11). It has been held that [W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the selectivity ratio of each etch stage’s etch recipe can be adjusted based on routine experimentation to be optimized for the material being etched.
With respect to claim 21, the combination of Mathur and Noguchi fails to explicitly disclose wherein the third etch stage is performed using an etch recipe having a selectivity ratio greater than 2:1, however based on a lack of materials to compare, it appears that this ratio is noncritical. Mathur and Noguchi discloses adjusting the etching recipe and conditions for all stages of etching (see Mathur ¶[0029] and Noguchi Column 9, lines 5-Column 10-11). It has been held that [W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the selectivity ratio of each etch stage’s etch recipe can be adjusted based on routine experimentation to be optimized for the material being etched.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mathur in view of Noguchi as applied to claim 13 above, and further in view of Tsai et al. (U.S. Publication No. 2017/0278743 A1; hereinafter Tsai).
With respect to claim 14, the combination of Mathur and Noguchi fails to disclose wherein the second etch stop layer comprises a conformal layer formed of a material selected from at least one of silicon carbide nitride (SiCN), silicon oxynitride (SiON) and silicon carbide (SIC). Tsai teaches wherein the second etch stop layer [219] comprises a conformal layer formed of a material selected from at least one of silicon carbide nitride (SiCN), silicon oxynitride (SiON) and silicon carbide (SIC). (See ¶[0024]).
Mathur discloses [136] comprises chemical compositions substantially similar to the first chemical composition [132] (See ¶[0015]) and Tsai’s implementation of SiON is consistent with alternatives that align with Mathur’s chemical compositions (see Tsai ¶[0024]). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHAN HAN whose telephone number is (571)270-7546. The examiner can normally be reached 9.00-5.00PM PST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, STEVEN LOKE can be reached at 571-272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JONATHAN HAN/Primary Examiner, Art Unit 2818