DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
1. Claims 14-29 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to nonelected groups, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 12/17/25.
2. Applicant's election with traverse of Group I in the reply filed on 12/17/25 is acknowledged. The traversal is on the ground(s) that groups have common features. The examiner has considered the arguments of rejoining Group II with Group I and has withdrawn the restriction between these two groups. The restriction of Groups I combined with Group II versus Group III, the arguments are not found persuasive because Group III, independent claim 22, can materially make a different device, such as an LED that has the pads on major surfaces of the n-type layer and the p-type layer and not on the edge. Also, the method could make a device where each LED chip of the plurality of LED chips comprising an active layer that extends in a parallel direction between a first face of the encapsulation layer and a second face of the encapsulation layer. These alternatives would make a materially different device; hence the restriction is made final. Claims 1-21 will be examined and claims 22-29 are withdrawn.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 2 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Publication No. 2022/0052229 Min et al.
3. Referring to claim 1, Min et al. teaches a light-emitting diode (LED) array, comprising: an encapsulation layer, (Figures 1 & 2 #400); and a plurality of LED chips, (Figures 1 & 2 #210), in the encapsulation layer, (Figures 1 & 2 #400), and between a first face of the encapsulation layer, (Figures 1 & 2 surface of #400 where #500 is attached and where face is read to mean the larger surface area of all the surfaces), and a second face of the encapsulation layer, (Figures 1 & 2 surface of #400 where #300 is attached and where face is read to mean the larger surface area of all the surfaces), but is silent to each LED chip of the plurality of LED chips comprising an active layer that extends in a perpendicular direction between a first face of the encapsulation layer and a second face of the encapsulation layer.
Min et al. teaches in Paragraph 0047 that the LED faces the X direction to output light as shown in Figures 1 & 2. The claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to know that each LED chip of the plurality of LED chips, (Figures 1 & 2 #210), comprising an active layer that extends in a perpendicular direction between a first face of the encapsulation layer, (Figures 1 & 2 surface of #400 where #500 is attached and where face is read to mean the larger surface area of all the surfaces), and a second face of the encapsulation layer, (Figures 1 & 2 surface of #400 where #300 is attached and where face is read to mean the larger surface area of all the surfaces), because it is well known in the art that the direction of light output for a light emitting device would be emitted from a direction that is perpendicular from the largest surface, being the maximum output and efficient surface of the LED, hence making the edge of the active layer perpendicular from the first face, (Figures 1 & 2 surface of #400 where #500 is attached and where face is read to mean the larger surface area of all the surfaces), and second face, (Figures 1 & 2 surface of #400 where #300 is attached and where face is read to mean the larger surface area of all the surfaces) of the encapsulation layer as shown in Figures 1 & 2.
4. Referring to claim 2, Min et al. teaches a LED array of claim 1, but is silent to wherein a first edge of each LED chip of the plurality of LED chips is proximate the first face of the encapsulation layer relative to the second face of the encapsulation layer.
The claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to have a first edge of each LED chip of the plurality of LED chips is proximate the first face of the encapsulation layer relative to the second face of the encapsulation layer, because it would have been obvious to one having ordinary skill in the art at the time the invention was made to for various reasons, such as (1) because both species were known functional equivalents from a very limited number of (two) possible options such as the LED is centered between the two faces or being positioned closer to a single face of the two faces; and/or since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 14-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chinese Patent No. CN 104143598 Yuan.
5. Referring to claim 14, Yuan teaches a light-emitting diode (LED) device, comprising: a first active LED structure comprising a first n-type layer, (Figure 1 #2), a first active layer, (Figure 1 #3), and a first p-type layer, (Figure 1 #4), the first active LED structure forming a first edge that includes portions of the first n-type layer, (Figure 1 #2), and the first p-type layer, (Figure 1 #4); a first n-contact pad, (Figure 1 #5), electrically coupled to the first n-type layer, (Figure 1 #2), at the first edge; and a first p-contact pad, (Figure 1 #6), electrically coupled to the first p-type layer, (Figure 1 #4), at the first edge.
6. Referring to claim 15, Yuan teaches a LED device of claim 14, wherein the first active LED structure forms a second edge, (Figure 1 edge where #5 & 6 is located the opposite side of), that is opposite the first edge, (Figure 1 edge where #5 & 6 is located), and the first active layer, (Figure 1 #2), extends between the first edge, (Figure 1 edge where #5 & 6 is located), and the second edge, (Figure 1 edge where #5 & 6 is located the opposite side of).
7. Referring to claim 16, Yuan teaches a LED device of claim 14, further comprising: a first n-contact layer, (Figure 1 #21), on the first n-type layer, (Figure 1 #2); and a first p-contact layer, (Figure 1 #41), on the first p-type layer, (Figure 1 #4), the first n-contact layer, (Figure 1 #21), and the first p- contact layer, (Figure 1 #41), both extending to the first edge, (Figure 1 edge where #5 & 6 is located), on opposing sides of the first active LED structure.
Allowable Subject Matter
The following is a statement of reasons for the indication of allowable subject matter:
8. Claims 3-13 and 17-21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
9. The prior art teaches the claimed matter in the rejections above, but is silent with respect to the above teachings in combination with the LED array of claim 2, wherein: electrical connections for the plurality of LED chips are electrically coupled to the first edge of each LED chip of the plurality of LED chips; and a second edge of each LED chip of the plurality of LED chips is positioned proximate the second face of the encapsulation layer relative to the first face of the encapsulation layer; the LED array of claim 1, wherein a pitch between adjacent LED chips of the plurality of LED chips is in a range from 10 nanometers (nm) to 1000 nm; the LED array of claim 1, wherein the plurality of LED chips comprises subgroupings of LED chips bonded together to form LED devices that are spaced apart within the encapsulation layer; the LED device of claim 16, further comprising a second active LED structure with a second n-type layer, a second active layer, and a second p-type layer, the second active LED structure being arranged relative to the first active LED structure such that the first edge includes portions of the second n-type layer and the second p-type layer; and/or the LED device of claim 16, further comprising a wavelength conversion element between the first n-contact layer and the first p-contact layer.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTOR A MANDALA whose telephone number is (571)272-1918. The examiner can normally be reached on M-Th 8-6:30 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached on 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/VICTOR A MANDALA/Primary Examiner, Art Unit 2899 1/14/26