DETAILED ACTION/EXAMINER’S COMMENT
This Office action responds to the amendments filed on 01/27/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Amendment Status
Applicant’s response filed on 01/27/2026 in reply to the non-final rejection mailed on 10/27/2025, has been entered. The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-15.
Claim Objections
Claim 8 is objected to because of the following informalities: “wherein the first bonding metal layer in formed in a space…” in line 2 is grammatically incorrect.
Appropriate correction is required.
Claim Rejections - 35 USC § 102 & 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6-15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chuang (US 20230245987).
Regarding Claim 6, Chuang (see, e.g., fig. 27a, fig. 28) shows a semiconductor device, comprising:
a lower substrate 102 (see, e.g., para.0087);
and an upper substrate 212 (see, e.g., para.0052) bonded onto a top of the lower substrate (see, e.g., fig. 28),
wherein the lower substrate comprises:
a first metal layer 114b (see, e.g., para.0091);
a conductive layer 114c (see, e.g., para.0091) formed on the first metal layer;
and a capping layer 105d (see, e.g., para.0106) formed on the conductive layer 114c
a first bonding metal layer 116b (see, e.g., para.0040) contacting the conductive layer 114c through a through hole penetrating the capping layer 105d (see, e.g., fig. 27a).
Regarding Claim 7, Chuang (see, e.g., fig. 27a) shows the semiconductor device of claim 6,
wherein the lower substrate further comprises
a bonding oxide layer 104c-e (of 104, see, e.g., para.0037) formed in a space where the first metal layer, the conductive layer, and the capping layer are etched.
Regarding the limitation “a bonding oxide layer formed in a space where the first metal layer, the conductive layer, and the capping layer are etched” of Chuang, note that a “product-by-process” claim is directed to the product per se, no matter how actually made. See In re Thorpe et al., 227 USPQ 964 (CAFC, 1985) and the related case law cited therein which make it clear that it is the final product per se which must determine in a “product-by-process” claim, and not the patentability of the process, and that, as here, an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product-by-process” claim or not. As stated in Thorpe, even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. In re Brown, 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA 1972); In re Pilkington, 411 F.2d 1345, 162 USPQ 145 (CCPA 1969); Buono v. Yankee Maid Dress Corp., 77 F.2d 274, 279, 26, USPQ 57, 61 (2d. Cir 1935).
NOTE that the applicant has burden of proof in such cases as the above case law makes clear.
In reference to the claimed process step: “where the first metal layer, the conductive layer, and the capping layer are etched” this is considered an intermediate method step that does not affect the structure of the final device.
The limitation that does affect the structure of the final device is “ a bonding oxide layer formed in a space where the first metal layer, the conductive layer, and the capping layer are.” Chuang (see, e.g., fig. 27a) shows the bonding oxide layer 104c-e is adjacent to the space and therefore anticipates device Claim 7.
Regarding Claim 8, Chuang (see, e.g., fig. 27a) shows the semiconductor device of claim 7,
wherein the first bonding metal layer 116b in formed in a space where the bonding oxide layer 104c-e and the capping layer 105d are etched.
Regarding the limitation “wherein the first bonding metal layer in formed in a space where bonding oxide layer and the capping layer are etched” of Yu, note that a “product-by-process” claim is directed to the product per se, no matter how actually made. See In re Thorpe et al., 227 USPQ 964 (CAFC, 1985) and the related case law cited therein which make it clear that it is the final product per se which must determine in a “product-by-process” claim, and not the patentability of the process, and that, as here, an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product-by-process” claim or not. As stated in Thorpe, even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. In re Brown, 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA 1972); In re Pilkington, 411 F.2d 1345, 162 USPQ 145 (CCPA 1969); Buono v. Yankee Maid Dress Corp., 77 F.2d 274, 279, 26, USPQ 57, 61 (2d. Cir 1935).
NOTE that the applicant has burden of proof in such cases as the above case law makes clear.
In reference to the claimed process step: “a space where bonding oxide layer and the capping layer are etched” this is considered an intermediate method step that does not affect the structure of the final device. The limitation that does affect the structure of the final device is “ wherein the first bonding metal layer in formed in a space where the bonding oxide layer and the capping layer are.” Chuang (see, e.g., fig. 27a) shows the first bonding metal layer 116b is adjacent to the space and therefore anticipates device Claim 8.
Regarding Claim 9, Chuang (see, e.g., fig. 27a, para.0040) shows the semiconductor device of claim 8,
wherein the lower substrate further comprises
a second metal layer 116c (see, e.g., para.0040) formed on the first bonding metal layer.
Regarding Claim 10, Chuang (see, e.g., fig. 6a) shows a semiconductor device, comprising:
a substrate 102 (see, e.g., para.0024), wherein the substrate comprises:
a first metal layer 108c (see, e.g., para.0038);
a conductive layer 114c (see, e.g., para.0040) formed on the first metal layer,
and a capping layer 104e (see, e. g., para.0106) formed on the conductive layer,
wherein the conductive layer 114c is disposed between the first metal layer 108c and the capping layer 104e,
and wherein the first metal layer 108c and the capping layer 104e are spaced apart from each other in an entire area (spaced apart by layers 104c-d & 105b-d).
Regarding Claim 11, Chuang (see, e.g., fig. 6a) shows the semiconductor device of claim 10,
wherein, by a process of etching the first metal layer, the conductive layer, and the capping layer,
the conductive layer 114c is formed on a top surface of the first metal layer 108c and not on a side surface of the first metal layer.
Regarding the limitation “by a process of etching the first metal layer, the conductive layer, and the capping layer, the conductive layer is formed” of Chuang, note that a “product-by-process” claim is directed to the product per se, no matter how actually made. See In re Thorpe et al., 227 USPQ 964 (CAFC, 1985) and the related case law cited therein which make it clear that it is the final product per se which must determine in a “product-by-process” claim, and not the patentability of the process, and that, as here, an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product-by-process” claim or not. As stated in Thorpe, even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. In re Brown, 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA 1972); In re Pilkington, 411 F.2d 1345, 162 USPQ 145 (CCPA 1969); Buono v. Yankee Maid Dress Corp., 77 F.2d 274, 279, 26, USPQ 57, 61 (2d. Cir 1935).
NOTE that the applicant has burden of proof in such cases as the above case law makes clear.
In reference to the claimed process step: “by a process of etching the first metal layer, the conductive layer, and the capping layer, the conductive layer is formed on a top surface of the first metal layer and not on a side surface of the first metal layer” this is considered an intermediate method step that does not affect the structure of the final device.
Regarding Claim 12, Chuang (see, e.g., fig. 6a) shows the semiconductor device of claim 11,
wherein, by the process of etching the first metal layer, the conductive layer, and the capping layer,
the capping layer 104e is formed above the first metal layer 108c and not on a side surface of the first metal layer.
Regarding the limitation “by the process of etching the first metal layer, the conductive layer, and the capping layer, the capping layer is formed above the first metal layer and not on a side surface of the first metal layer” of Chuang, note that a “product-by-process” claim is directed to the product per se, no matter how actually made. See In re Thorpe et al., 227 USPQ 964 (CAFC, 1985) and the related case law cited therein which make it clear that it is the final product per se which must determine in a “product-by-process” claim, and not the patentability of the process, and that, as here, an old or obvious product produced by a new method is not patentable as a product, whether claimed in “product-by-process” claim or not. As stated in Thorpe, even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. In re Brown, 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA 1972); In re Pilkington, 411 F.2d 1345, 162 USPQ 145 (CCPA 1969); Buono v. Yankee Maid Dress Corp., 77 F.2d 274, 279, 26, USPQ 57, 61 (2d. Cir 1935).
NOTE that the applicant has burden of proof in such cases as the above case law makes clear.
In reference to the claimed process step: “by a process of etching the first metal layer, the conductive layer, and the capping layer, the conductive layer is formed” this is considered an intermediate method step that does not affect the structure of the final device.
The following alternate mapping of Chuang for Claim 10 is construed for the rejection of dependent Claims 13-15.
Chuang (see, e.g., fig. 6a) shows a semiconductor device, comprising:
a substrate 102 (see, e.g., para.0024), wherein the substrate comprises:
a first metal layer 108b (see, e.g., para.0038);
a conductive layer 108c (see, e.g., para.0038) formed on the first metal layer,
and a capping layer 104c (see, e. g., para.0089) formed on the conductive layer,
wherein the conductive layer 108c is disposed between the first metal layer 108b and the capping layer 104c,
and wherein the first metal layer and the capping layer are spaced apart from each other in an entire area (spaced apart by layer 105b).
Regarding Claim 13, Chuang (see, e.g., fig.6a) shows the semiconductor device of claim 10,
wherein the substrate further comprises a bonding oxide layer 105b (see, e.g., para.0089) formed to contact a side surface (a top surface is considered a side surface) of the first metal layer 108b.
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Regarding Claim 14, Chuang (see, e.g., fig. 6a) shows the semiconductor device of claim 13,
wherein the substrate further comprises a first bonding metal layer 114b (see, e.g., para.0091) formed to contact the conductive layer 108c, the capping layer 104c, and the bonding oxide layer 105b.
Regarding Claim 15, Chuang (see, e.g., fig. 6a) shows the semiconductor device of claim 14,
wherein the substrate further comprises a second metal layer 114c (see, e.g., para.0040) formed to contact the first bonding metal layer.
Response to Arguments
Applicant's arguments, see pages 5-8 filed 01/27/2026, with respect to Claim 1 and its dependent Claims 2-5 have been fully considered but they are not persuasive. The new ground of rejection of Claim 1 does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. However, in the following section the arguments for Claim 1 amendments are addressed as it is relevant for further examination.
Applicant’s arguments, see pages 9-13, with respect to claims 6 & 10 and their respective dependent claims 7-9 & 11-15 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Allowable Subject Matter
Claims 1-5 are allowed.
The following is an examiner’s statement of reasons for allowance,
Regarding the limitations of Claim 1, “forming a conductive layer on the first metal layer,” “etching the first metal layer, the conductive layer, and the capping layer,” & “etching the bonding oxide layer and the capping layer,” the prior art of record (Chuang) neither anticipates nor renders obvious the combination of all mentioned limitations in the entirety of the subject matter of claim 1 and overcomes the rejection. The closest prior art Wu (US 20230011792) shows a similar method to the claimed invention but layer 214 (see, e.g., para.0025) is a dielectric layer and not a conductive layer, with no motivation to modify Wu to show a conductive layer.
Claims 2-5 are allowed as being dependent on allowable claim 1.
Any comments considered necessary by applicant must be submitted no later than the payment of the issues fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FERNANDO JOSE RAMOS-DIAZ whose telephone number is (571) 270-5855. The examiner can normally be reached Mon-Fri 8am-5pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Loke can be reached on 571-272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/FERNANDO JOSE RAMOS-DIAZ/Examiner, Art Unit 2818 /STEVEN H LOKE/Supervisory Patent Examiner, Art Unit 2818
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