Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Group I in the reply filed on 03/16/2026 is acknowledged. The traversal is on the ground(s) that the office failed to show there would be a serious burden. This is not found persuasive because as identified in the restriction requirement the groups have different classification and have distinct features so that a search for all groups would require specific keyword searches for the identified features unique the different groups.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Tojinbara et. Al. (US 20240113145 A1 hereinafter Tojinbara).
Regarding claim 1, Tojinbara teaches in Figs. 25A-25B with associated text an image sensing device comprising: a pixel array including a plurality of unit pixels (23L and 23R) arranged therein (Fig. 25A, [0141]); and an isolation area 51 formed between the unit pixels, wherein the isolation area comprises a first isolation layer (portion of 521 under 25) formed to have a first depth (see annotated Fig. below); a second isolation layer (portion of 521 under 25) formed to have a second depth (see annotated Fig. below); and a third isolation layer (portion of 521 between 25 and ) disposed between the first isolation layer and the second isolation layer and formed to have a third depth, and wherein the third depth is greater than the first depth and the second depth (see annotated Fig. below, [0159], [0162]).
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Regarding claim 4, Tojinbara teaches the second depth is greater than the first depth (see annotated Fig. below).
Regarding claim 5, Tojinbara teaches the third depth is a depth formed to provide full isolation (3rd depth extend completely through the substrate so that it provides full isolation where it is present).
Regarding claim 6, Tojinbara teaches the control node region is formed in a corner region in a first diagonal direction of a unit pixel of the plurality of unit pixels (Fig. 25A).
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Hsu et. Al. (US 20240030261 A1 hereinafter Hsu).
Regarding claim 1, Hsu teaches in Figs. 1A-1C with associated text an image sensing device comprising: a pixel array including a plurality of unit pixels 103 arranged therein (Fig. 1A, [0018]); and an isolation area 112 formed between the unit pixels (Figs. 1A-1B, [0018]), wherein the isolation area comprises a first isolation layer 116m formed to have a first depth (Figs. 1A-1C, [0018]); a second isolation layer 116p formed to have a second depth (Figs. 1A-1C, [0018]); and a third isolation layer 114 disposed between the first isolation layer and the second isolation layer (114 is between 116p and 116m along the path through which the isolation area extends from 116p to 116m Fig. 1A) and formed to have a third depth, and wherein the third depth is greater than the first depth and the second depth 116 m and 116p do not extend all the way throughout the substrate however 114 does Figs. 1B and 1C also see [0055] and Fig. 16C).
Regarding claim 2, Hsu teaches the isolation area further includes a control node region 108 and a pixel transistor well region 110, and wherein the first isolation layer is formed on the control node region (Fig. 1B, [0019]-[0020]).
Regarding claim 3, Hsu teaches the second isolation layer is formed on the pixel transistor well region (Fig. 1B).
Regarding claim 5, Hsu teaches the third depth is a depth formed to provide full isolation (3rd depth extend completely through the substrate so that it provides full isolation where it is present).
Regarding claim 6, Hsu teaches the control node region is formed in a corner region in a first diagonal direction (dotted diagonal line direction if Fig. 1A) of a unit pixel of the plurality of unit pixels (Fig. 25A).
Regarding claim 7, Hsu teaches the pixel transistor well region (here the well region is that at the upper right) is formed in a corner region of the unit pixel in a second diagonal direction perpendicular to the first diagonal direction (Fig. 1A).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AARON J GRAY whose telephone number is (571)270-7629. The examiner can normally be reached Monday-Friday 9am-4pm.
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/AARON J GRAY/Examiner, Art Unit 2897
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