Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendments
Acknowledgment is made of the amendment filed 01/26/2026, in which: no claims are amended; claims 1-20 are cancelled; new claims 21-40 are added; and the rejection of the claims are traversed. Claims 21-40 are currently pending an Office action on the merits as follows.
Response to Arguments
Applicant’s arguments filed 01/26/2026, with respect to the rejection(s) of claim(s) 1-20 under 35 U.S.C 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Kao et al, US 20230019688, hereafter ‘Kao’.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 21-24, 26, 35-37, 39 and 40 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kalnitsky et al, US 20220285480, hereafter ‘Kalnitsky’ in view of Kao et al, US 20230019688, hereafter ‘Kao’.
Regarding claim 21, Kalnitsky discloses : A capacitor structure, comprising : a substrate; a pillar structure having a first and a second pillar embedded in the substrate(Fig. 5c, multiple pillars of capacitor #118 shown [0051]), the first pillar having a first sidewall and the second pillar having a second sidewall, the first sidewall of the first pillar and the second sidewall of the second pillar facing each other with a trench opening therebetween(#108 separates the MIM capacitor structures); a first set of one or more indented cavities extending into the first sidewall of the first pillar; a second set of one or more indented cavities extending into the second sidewall of the second pillar(#114 shown to be in both capacitors #118); a first conductive contact layer along the first set of one or more indented cavities and along the second set of one or more indented cavities in the trench opening(#118 to include metal insulator metal layers such as #126, #128, and #130 [0022] common in MIM capacitors); a first high-k dielectric material layer conformally on top of the first conductive contact layer in the trench opening(#118 to include metal insulator metal layers such as #126, #128, and #130 [0022] common in MIM capacitors).
Kalnitsky does not disclose : a top conductive contact layer in a remaining portion of the trench opening.
However, in the same field of endeavor, Kao teaches : a top conductive contact layer in a remaining portion of the trench opening(Fig. 16, #902 to fill trenches and indented cavities of the capacitor structure where #602 may be a high-k dielectric layer).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Kao to Kalnitsky to have a top conductive layer fill the remaining trench opening to easily connect to additional structures formed above a capacitor structure (Kao [0106]).
Regarding claim 22, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 21.
Kalnitsky teaches : further comprising: a second conductive contact layer on top of the first high-k dielectric material layer(Fig. 7, #130 on top of #128); and a second high-k dielectric material layer conformally on top of the second conductive contact layer(#702 on top of #130), wherein the top conductive contact layer is on top of the second high-k dielectric material layer(#704 on top of #702 where dielectric layers of the capacitor may be high-k material [0029]).
Regarding claim 23, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 22.
Kalnitsky teaches : wherein the first and second conductive contact layers and the first and second high-k dielectric material layers extend horizontally to be above a top surface of the substrate and vertically below the top conductive contact layer(Fig. 7, #126 and #130 along with #128 and #702 shown to extend above #108 and below #704).
Regarding claim 24, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 22.
Kalnitsky discloses : wherein the first, the second and the top conductive contact layer are respectively made of a material of Co, Rh, Ta, TaN, or AlCu(Capacitor electrodes may be made up of aluminum, copper, tantalum, titanium, tantalum nitride, titanium nitride, tungsten, and/or the like [0029]).
Regarding claim 26, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 21.
Kao teaches : wherein each of the one or more indented cavities of the first set has a top and a bottom surface and a vertically oriented end between the top and the bottom surface(Fig. 26, indented cavities of capacitor show to have a vertically oriented end between top and bottom surfaces).
Regarding claim 35, Kalnitsky discloses : A capacitor structure, comprising: a pillar structure having a pillar embedded in a substrate with a first and a second trench opening at a left side and a right side of the pillar respectively(Fig. 5c #109 openings); a first set of indented cavities extending into the pillar from the first trench opening at the left side; a second set of indented cavities extending into the pillar from the second trench opening at the right side(Capacitor structure shown to have indented cavities on both right and left side); a first conductive contact layer arranged along the first set of indented cavities(#118 to include #126), a top surface of the substrate(Fig. 3b, #126 on top of #116); and the second set of indented cavities; a first high-k dielectric material layer arranged conformally on top of the first conductive contact layer(#128 on top of #126)
Kalnitsky does not disclose : a top conductive contact layer on top of the first high-k dielectric material layer, wherein the first and the second trench opening are completely filled with at least the top conductive contact layer.
However, in the same field of endeavor, Kao teaches : and a top conductive contact layer on top of the first high-k dielectric material layer(#1702 on top of #802), wherein the first and the second trench opening are completely filled with at least the top conductive contact layer(#1702 shown to fill #2600).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Kao to Kalnitsky to have a top conductive layer to completely fill a trench capacitor to easily connect to additional structures formed above a capacitor structure (Kao [0106]).
Regarding claim 36, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 35.
Kalnitsky teaches : further comprising: a second conductive contact layer arranged on top of the first high-k dielectric material layer(Fig. 7, #130 on top of #128); and a second high-k dielectric material layer arranged conformally on top of the second conductive contact layer(#702 on top of #130), wherein the top conductive contact layer is on top of the second high-k dielectric material layer(#704 on top of #702).
Regarding claim 37, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 36.
Kalnitsky discloses : wherein the first, the second and the top conductive contact layer are made of a material that is selected from the group consisting of Co, Rh, Ta, TaN, and AlCu(Electrodes may comprise copper [0029]).
Regarding claim 39, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 35.
Kao teaches : The capacitor structure of claim 35, wherein each of the first set of indented cavities has a vertical end and parallel top and bottom surfaces(Fig. 26, indented cavities of capacitor show to have a vertically oriented end between top and bottom surfaces).
Regarding claim 40, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 35.
Kalnitsky teaches : wherein each of the first set of indented cavities faces an opposing one of the second set of indented cavities(Fig. 5c, indented cavities on the left and right side of #109 shown to face opposing directions).
Claim 25 and 38 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kalnitsky et al, US 20220285480, hereafter ‘Kalnitsky’ in view of Kao et al, US 20230019688, hereafter ‘Kao’ in further view of Lin et al, US 20190074349, hereafter ‘Lin’.
Regarding claim 25, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 22.
Kalnitsky as modified by Kao does not disclose : wherein the first conductive contact layer is a doped silicon material layer and is materially different from the second and the top conductive contact layer.
However, in the same field of endeavor, Lin teaches : wherein the first conductive contact layer is a doped silicon material layer(Fig. 1b, #18 may be doped polysilicon[0023])
Kalnitsky teaches : and is materially different from the second and the top conductive contact layer(#126 and #130 may be comprised of different metals [0029]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Lin to Kalnitsky and Kao to have a conductive layer of a capacitor comprising of dope silicon and for the first and second conductive layers of a capacitor be materially different.
Regarding claim 38, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 36.
Kalnitsky as modified by Kao does not disclose : wherein the first conductive contact layer is a doped silicon material layer and is materially different from the second and the top conductive contact layer.
However, in the same field of endeavor, Lin teaches : wherein the first conductive contact layer is a doped silicon material layer (Fig. 1b, #18 may be doped polysilicon[0023])
Kalnitsky teaches : and is materially different from the second and the top conductive contact layer(#126 and #130 may be comprised of different metals [0029]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Lin to Kalnitsky and Kao to have a conductive layer of a capacitor comprising of dope silicon and for the conductive layers of a capacitor be materially different.
Claim 27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kalnitsky et al, US 20220285480, hereafter ‘Kalnitsky’ in view of Kao et al, US 20230019688, hereafter ‘Kao’ in view of Frougier et al, US 20230178587, hereafter ‘Frougier’.
Regarding claim 27, Kalnitsky as modified by Kao discloses : The capacitor structure of claim 21.
Kalnitsky as modified by Kao does not disclose : wherein the first set of one or more indented cavities transverses through the first pillar at a second sidewall of the first pillar, and the first pillar includes a plurality of core layers arranged along a vertical direction.
However, in the same field of endeavor, Frougier teaches : wherein the first set of one or more indented cavities transverses through the first pillar at a second sidewall of the first pillar(Fig. 21, Capacitor with connected indented cavities), and the first pillar includes a plurality of core layers arranged along a vertical direction(Layers of capacitor #111 and #99 shown to be arranged horizontally and vertically).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Frougier to Kalnitsky and Kao to have indented cavities on both side of a pillar in a capacitor structure.
Claim 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kalnitsky et al, US 20220285480, hereafter ‘Kalnitsky’ in view of Kao et al, US 20230019688, hereafter ‘Kao’ in view of Frougier et al, US 20230178587, hereafter ‘Frougier’, in further view of Lu et al, US 20220254714, hereafter ‘Lu’.
Regarding claim 28, Kalnitsky as modified by Kao and Frougier discloses : The capacitor structure of claim 27.
Kalnitsky as modified by Kao and Frougier does not discloses : further comprising at least one anchor structure, wherein the first pillar is attached to the at least one anchor structure.
However, in the same field of endeavor, Lu teaches : further comprising at least one anchor structure(Fig. 1, #112), wherein the first pillar is attached to the at least one anchor structure(#112 attached to indented cavities of capacitor).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Lu to Kalnitsky, Kao, and Frougier to include anchors in a capacitor structure to improve capacitance density (Lu [0088]).
Claims 29-34 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kalnitsky et al, US 20220285480, hereafter ‘Kalnitsky’ in view of Kao et al, US 20230019688, hereafter ‘Kao’ in view of Shimizu et al, US 20220189702, hereafter ‘Shimizu’.
Regarding claim 29, Kalnitsky discloses : A capacitor structure comprising: a plurality of insulating cores arranged along a vertical direction(Fig. 5c plurality of capacitor cores with indented cavities; a plurality of conductive contact layers and a plurality of high-k insulator layers alternately surrounding each of the plurality of insulating cores(Fig. 7, #118 to include a plurality of conductive layers #126, #130, and #704 and high-k insulating layers #128 and #702 [0067-0068]).
Kalnitsky does not disclose : a top conductive contact layer in remaining spaces vertically between the plurality of insulating cores; and a first and a second anchor structure at a first end and a second end of the plurality of insulating cores respectively, wherein at least one of the plurality of insulating cores is attached to the first anchor structure.
However, in the same field of endeavor, Kao teaches : a top conductive contact layer in remaining spaces vertically between the plurality of insulating cores(Fig. 26, #1702 to fill in the remaining spaces of core on top of dielectric layer #802).
Shimizu teaches : and a first and a second anchor structure at a first end and a second end of the plurality of insulating cores respectively, wherein at least one of the plurality of insulating cores is attached to the first anchor structure(Fig. 1, top anchor #120 attached to top set of conductive columns with a second set attached to #110).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Kao and Shimizu to Kalnitsky to provide a top conductive contact layer that fills the remaining portions of the capacitor of Kao and the anchors to support the capacitors of Shimizu to improve withstand voltage of a capacitor while decreasing volume capacity density (Shimizu [0010]).
Regarding claim 30, Kalnitsky as modified by Kao and Shimizu discloses : The capacitor structure of claim 29.
Shimizu teaches : wherein the plurality of insulating cores, at the first end thereof, is attached to the first anchor structure and, at the second end thereof, is attached to the second anchor structure(Fig. 1, First set of conductive columns attached to #110 and a second set attached to #120 [0032]).
Regarding claim 31, Kalnitsky as modified by Kao and Shimizu discloses : The capacitor structure of claim 29.
Shimizu teaches : wherein a first set of the plurality of insulating cores, including the at least one of the plurality of insulating cores, is attached to the first anchor structure at the first end and a second set of the plurality of insulating cores is attached to the second anchor structure at the second end(Fig. 1, Each support anchor #110 and #120 to have own set of conductive columns consisting of #113 and #122), wherein the first and the second set of the plurality of insulating cores are arranged in an interdigitated manner(both sets of #113 and #122 of anchors #110 and #120 shown to be arranged in an interdigitated manner).
Regarding claim 32, Kalnitsky as modified by Kao and Shimizu discloses : The capacitor structure of claim 31.
Kalnitsky teaches : further comprising a bottom contact in contact with a first set of conductive contact layers that surrounds the first set of plurality of insulating cores at the first anchor structure(Fig 1, #126 bottom contact with first set of conductive contact layers ), and a top contact in contact with a second set of conductive contact layers that surrounds the second set of plurality of insulating cores at the second anchor structure(#130 top contact with second set of conductive layers).
Regarding claim 33, Kalnitsky as modified by Kao and Shimizu discloses : The capacitor structure of claim 29.
Kalnitsky teaches : wherein the plurality of insulating cores are made of silicon-oxide and are directly surrounded by and in contact with one of the plurality of conductive contact layers(Fig. 2, #208 and #210 be comprised of silicon oxide and is in contact with #126 [0080]).
Regarding claim 34, Kalnitsky as modified by Kao and Shimizu discloses : The capacitor structure of claim 29.
Kalnitsky teaches : wherein the plurality of insulating cores are made of a conductive material surrounded by one of the plurality of high-k insulator layers(Fig. 1, #128 surrounds #126).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/D.T./Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897