DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement(s)
The Information Disclosure Statement(s) filed on May 13, 2025, July 3, 2023 were considered by the Examiner.
Election/Restrictions
Applicant's election of Species A and claims 1 and 12 in the reply filed on January 26, 2026 is acknowledged.
Applicant was required to provide a complete reply identifying all claims readable on the elected species, see MPEP 809.02(a). As Applicant identified claims 1 and 12 as being readable on species A, Applicant’s reply was complete and the remaining claims 2-11 stand withdrawn.
Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (see MPEP § 818.01(a)).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over JP2018031590A (“Kanemoto”) in view of US20220262690A1 (“Matsuo”), further in view of WO2021117548A1 (“Kawazoe”).
RE: Claim 1, Kanemoto discloses A semiconductor device (power module 1C in FIG. 14), comprising:
an insulating substrate (134, [0029]);
a first circuit pattern (138, [0029]) formed on one surface (top surface of 134) of the insulating substrate;
a second circuit pattern (136, [0029]) formed on the one surface of the insulating substrate;
a first terminal electrode (114, [0059]) electrically connected to the first circuit pattern (FIG. 1 shows a top view wherein terminal electrode 114 is electrically connected to electrode layer 138 by bonding wires 128, electrode layer 139, and bonding wires 126, see [0029], [0032]-[0033]);
a first semiconductor element (diode 150, [0044]) mounted on the first circuit pattern;
a second semiconductor element (IGBT 140, [0044]) mounted on the first circuit pattern, the second semiconductor element being different from the first semiconductor element (IGBT is a transistor, [0002]; As 150 is a diode and 140 is a transistor, these elements are different from each other);
a second terminal electrode (112, [0059]) electrically connected to the first semiconductor element and the second semiconductor element through the second circuit pattern (112 is electrically connected to IGBT 140 and diode 150 through electrode layer 136, [0032]);
a first sealant (silicone gel 110A, [0152]) covering the first semiconductor element;
a second sealant (silicone gel 110B, [0152]) covering the second semiconductor element, the second sealant being made of a material different from a material of the first sealant (Each of the silicone gels 110A, 110B, 110C includes a microcapsule packed with a gas generating material for generating different types of gases. That is, the type of gas generated by the local temperature rise can be different for each region of the chip surface, [0152]; The plurality of types of silicone gels 110A, 110B, 110C are disposed, and the gas detection units 200A, 200B, 200C corresponding to each generated gas are disposed. By adopting such a configuration, it is possible to estimate in which region on the chip surface the local temperature rise occurs depending on the type of gas generated, [0153]; microcapsules are mixed in silicone gel 110, [0047]; microcapsules mixed in the silicone gel 110 are a collection of a large number of capsules having a temperature threshold, [0052]; Accordingly, since the type of gas generated by the gas generating material in the microcapsules in silicone gel 110B is different from the type of gas generated by the gas generating material in microcapsules in silicone gel 110A, the gas generating material in 110B is different from the gas generating material in 110A; therefore, 110B is made of a different material than 110A; see also [0049]-[0050], FIG. 3); and
a casing (106, [0025]) enclosing the first semiconductor element and the second semiconductor element (semiconductor chips are in a space surrounded by case member 106, [0025]; semiconductor chips are IGBT 140 and diode 150, [0187]).
Kanemoto does not explicitly disclose:
the casing being separated from the first sealant and the second sealant and being bonded to the insulating substrate.
However, Kanemoto discloses silicone gel is an example of a resin material, [0035], [0044].
In the same field of endeavor, Matsuo discloses:
a casing (11 in FIG. 2, [0012]) being separated from a first sealant (lefthand resin layer 91 in FIG. 2, [0013]) and a second sealant (righthand resin layer 91 in FIG. 2, [0013]).
Matsuo further discloses first resin layer 91 is located inward of the dam part 40 on the substrate 20 and fills the inner side of the dam part 40, [0047].
FIG. 2 shows two resin layers 91 and two dam parts 40, with each resin layer 91 contained in a respective dam part 40.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to introduce a first dam part and a second dam part to contain the first silicone gel 110A and the second silicone gel 110B, respectively, as taught by Matsuo in order to prevent the material in the first silicone gel 110A and the material in the second silicone gel 110B from mixing with each other, ensuring that their respective gas generating materials do not mix.
Further, Kanemoto discloses insulating layer 134 is made of Al2O3, [0029].
In the same field of endeavor, Kawazoe discloses:
a casing (case 13, pg. 4, lines 5-7) being bonded to an insulating substrate (substrate 7 is made of alumina (Al2O3), see pg. 10, lines 21-25; Accordingly, substrate 7 is made of the same material as Kanemoto’s insulating layer 134; Kawazoe further discloses case 13 is fixed to ceramic substrate 5 by adhesive 15, pg. 4, lines 5-7; ceramic substrate 5 includes substrate body 7, pg. 3, lines 36-37; FIG. 2 shows the case 13 is bonded to the substrate 7 by adhesive 15).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to bond the case 106 to the insulating layer 134 with an adhesive as taught by Kawazoe in order to fix the position of the insulating layer 134 with respect to the case 106, thereby preventing their relative movement and potential damage thereto.
RE: Claim 12, Kanemoto in view of Matsuo, Kawazoe discloses The semiconductor device according to claim 1,
wherein the casing includes a lid (Kanemoto discloses cap 108, [0036]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL ANGUIANO whose telephone number is (703)756-1226. The examiner can normally be reached Monday through Friday.
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/MICHAEL ANGUIANO/Examiner, Art Unit 2899
/Brent A. Fairbanks/Supervisory Patent Examiner, Art Unit 2899