DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Regarding the rejections under 35 USC 103, Applicant’s arguments and amendments have been fully considered. However, further search and consideration prompted the new grounds of rejection presented herein.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over JP2018031590A (“Kanemoto”) in view of US20220262690A1 (“Matsuo”), further in view of WO2021117548A1 (“Kawazoe”), further in view of WO2013080749A1 (“Saito”).
RE: Claim 1, Kanemoto discloses A semiconductor device (power module 1C in FIG. 14), comprising:
an insulating substrate (134, [0029]);
a first circuit pattern (138, [0029]) formed on one surface (top surface of 134) of the insulating substrate;
a second circuit pattern (136, [0029]) formed on the one surface of the insulating substrate;
a first terminal electrode (114, [0059]) electrically connected to the first circuit pattern (FIG. 1 shows a top view wherein terminal electrode 114 is electrically connected to electrode layer 138 by bonding wires 128, electrode layer 139, and bonding wires 126, see [0029], [0032]-[0033]);
a first semiconductor element (diode 150, [0044]) mounted on the first circuit pattern;
a second semiconductor element (IGBT 140, [0044]) mounted on the first circuit pattern, the second semiconductor element being different from the first semiconductor element (IGBT is a transistor, [0002]; As 150 is a diode and 140 is a transistor, these elements are different from each other);
a second terminal electrode (112, [0059]) electrically connected to the first semiconductor element and the second semiconductor element through the second circuit pattern (112 is electrically connected to IGBT 140 and diode 150 through electrode layer 136, [0032]);
a first sealant (silicone gel 110A, [0152]) covering the first semiconductor element;
a second sealant (silicone gel 110B, [0152]) covering the second semiconductor element, the second sealant being made of a material different from a material of the first sealant (Each of the silicone gels 110A, 110B, 110C includes a microcapsule packed with a gas generating material for generating different types of gases. That is, the type of gas generated by the local temperature rise can be different for each region of the chip surface, [0152]; The plurality of types of silicone gels 110A, 110B, 110C are disposed, and the gas detection units 200A, 200B, 200C corresponding to each generated gas are disposed. By adopting such a configuration, it is possible to estimate in which region on the chip surface the local temperature rise occurs depending on the type of gas generated, [0153]; microcapsules are mixed in silicone gel 110, [0047]; microcapsules mixed in the silicone gel 110 are a collection of a large number of capsules having a temperature threshold, [0052]; Accordingly, since the type of gas generated by the gas generating material in the microcapsules in silicone gel 110B is different from the type of gas generated by the gas generating material in microcapsules in silicone gel 110A, the gas generating material in 110B is different from the gas generating material in 110A; therefore, 110B is made of a different material than 110A; see also [0049]-[0050], FIG. 3); and
a casing (106, [0025]) enclosing the first semiconductor element and the second semiconductor element (semiconductor chips are in a space surrounded by case member 106, [0025]; semiconductor chips are IGBT 140 and diode 150, [0187]).
Kanemoto does not explicitly disclose:
the casing being separated from the first sealant and the second sealant and being bonded to the insulating substrate;
wherein an empty space is formed between the casing and each of the first sealant and the second sealant, such that at least a portion of the insulating substrate is exposed.
However, Kanemoto discloses silicone gel is an example of a resin material, [0035], [0044].
In the same field of endeavor, Matsuo discloses:
a casing (11 in FIG. 2, [0012]) being separated from a first sealant (lefthand resin layer 91 in FIG. 2, [0013]) and a second sealant (righthand resin layer 91 in FIG. 2, [0013]).
Matsuo further discloses first resin layer 91 is located inward of the dam part 40 on the substrate 20 and fills the inner side of the dam part 40, [0047].
FIG. 2 shows two resin layers 91 and two dam parts 40, with each resin layer 91 contained in a respective dam part 40.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to introduce a first dam part and a second dam part to contain the first silicone gel 110A and the second silicone gel 110B, respectively, as taught by Matsuo in order to prevent the material in the first silicone gel 110A and the material in the second silicone gel 110B from mixing with each other, ensuring that their respective gas generating materials do not mix.
Further, Kanemoto discloses insulating layer 134 is made of Al2O3, [0029].
In the same field of endeavor, Kawazoe discloses:
a casing (case 13, pg. 4, lines 5-7) being bonded to an insulating substrate (substrate 7 is made of alumina (Al2O3), see pg. 10, lines 21-25; Accordingly, substrate 7 is made of the same material as Kanemoto’s insulating layer 134; Kawazoe further discloses case 13 is fixed to ceramic substrate 5 by adhesive 15, pg. 4, lines 5-7; ceramic substrate 5 includes substrate body 7, pg. 3, lines 36-37; FIG. 2 shows the case 13 is bonded to the substrate 7 by adhesive 15).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to bond the case 106 to the insulating layer 134 with an adhesive as taught by Kawazoe in order to fix the position of the insulating layer 134 with respect to the case 106, thereby preventing their relative movement and potential damage thereto.
In the same field of endeavor, Saito discloses:
the metal substrate 3 is composed of a base 31, an insulating layer 32, a conductor wiring 33, and a resist 34, pg. 6, lines 22-25.
FIG. 1 shows the insulating layer 32 forms a substrate for at least electronic component 6. Accordingly, insulating layer 32 is considered an insulating substrate.
Saito further discloses:
the back surface and the side surface of the metal substrate are exposed to the atmosphere. Therefore, it is possible to secure a heat radiation area not only from the rear surface of the substrate but also by adding the substrate and the side surface, so that the heat radiation performance can be improved, pg. 9, lines 11-15.
Accordingly, Saito teaches exposing the side surface of the metal substrate 3, which includes insulating layer 32.
Saito further discloses 15 and 21 are first and second casting resins, pg. 7, lines 23-25.
Saito further discloses 4 is a molded case, pg. 7, lines 23-25.
Accordingly, Annotated FIG. 1 of Saito below discloses:
wherein an empty space (empty space in Annotated FIG. 1 below, formed by exposing the side surface of the substrate 3 which includes insulating layer 32) is formed between a casing (4) and each of the a sealant (15) and a second sealant (21), such that at least a portion of an insulating substrate (32) is exposed (Annotated FIG. 1 shows the empty space between 4 and each of the first sealant 15 and second sealant 21 is formed such that at least a portion of insulating substrate 32 is exposed).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form an empty space between the casing 106 and each of the first sealant 110A and the second sealant 110B, such that at least a portion of the insulating substrate 134 is exposed as taught by Saito in order to improve heat radiation performance as further taught by Saito.
PNG
media_image1.png
482
908
media_image1.png
Greyscale
Annotated FIG. 1 of Saito
RE: Claim 12, Kanemoto in view of Matsuo, Kawazoe, Saito discloses The semiconductor device according to claim 1,
wherein the casing includes a lid (Kanemoto discloses cap 108, [0036]).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL ANGUIANO whose telephone number is (703)756-1226. The examiner can normally be reached Monday through Friday.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHAEL ANGUIANO/Examiner, Art Unit 2899
/Brent A. Fairbanks/Supervisory Patent Examiner, Art Unit 2899
Prosecution Insights