DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 8-10, 15-17, and 20-22 are rejected under 35 U.S.C. 102 as being anticipated by Morimoto ( US 2020/0244909 A1; hereinafter Morimoto )
Regarding claim 1, Morimoto teaches a photoelectric conversion apparatus ( Fig. 1 #100 ) comprising: an avalanche photodiode ( Fig. 9: a photodiode PD ) including an anode ( Fig. 9: anode is tied to VPDL) and a cathode ( Fig. 9: cathode is tied to the bottom node of the switch #142 and connected to the inverted input to #175 ) ; a switch ( Fig. 9 #14 ) connected between a power line to which a drive voltage is to be applied ( Fig. 9: VDD ) and either the anode or the cathode ( Fig. 9: #142 switch is connected to the cathode), and configured to receive a pulse signal for controlling switching of the switch ( Fig. 9: pulse generation circuit 13 ); and a signal processing circuit ( Fig. 9: signal control circuit 15 ) including a counter circuit ( Fig. 9: counter 16 ) connected to the avalanche photodiode ( Fig. 9: PD connected to N1 ) and configured to output an output signal ( Fig. 9: POUT ), wherein a value obtained by dividing the number of the pulse signals in a first exposure period ( Fig. 10 pulse signal from t2 to t3 ) by the first exposure period ( Fig. 10 time t2 to t4 ), and a value obtained by dividing the number of the pulse signals in a second exposure period ( Fig. 10 time t5 to t6 ) having a length different from a length of the first exposure period ( as shown in Fig. 10 ), by the second exposure period ( Fig. 10 time are different ( Fig. 4 shows exposures have varying length from t2 to t3 then from t4 to t5 ).
Regarding claim 2, Morimoto teaches the photoelectric conversion apparatus according to Claim 1 ( as discussed above ), wherein the pulse signal ( Fig. 9: Sig ) is a signal at a repeat cycle ( [0054] the electric potential of the input portion of the counter #16 can be reset to the initial state with a predetermined length of delay ).
Regarding claim 3, Morimoto teaches the photoelectric conversion apparatus according to Claim 1 ( as discussed above ), wherein the number of the pulse signals in the first exposure period ( Fig.6 time t3 to t4 ) and the number of the pulse signals in the second exposure period are same ( Fig. 6 time t5 to t6 ).
Regarding claim 4, Morimoto teaches the photoelectric conversion apparatus according to Claim 1 ( as discussed above ), wherein the first exposure period ( Fig. 10: Sig from t2 to t3 ) is shorter than the second exposure period ( Fig. 10: Sig from t4 to t5 ), and wherein a cycle of the pulse signal in the first exposure period is shorter than a cycle of the pulse signal in the second exposure period ( as shown in Fig. 10 ).
Regarding claim 8, Morimoto teaches the photoelectric conversion apparatus according to Claim 1 ( as discussed above), wherein the switch is a metal-oxide semiconductor (MOS) transistor ( Fig. 9 #142 ), wherein one node of the switch is connected to the cathode of the avalanche photodiode ( Fig. 9: PD ), wherein another node of the switch is connected to the power line ( Fig. 9: VDD ), and wherein the pulse signal is supplied to a gate electrode of the switch ( Fig. 9: Pctrl_2 ).
Regarding claim 9, Morimoto teaches the photoelectric conversion apparatus according to Claim 1 ( as discussed above ), wherein the signal processing circuit ( Fig. 9 #15 ) includes a waveform shaping unit ( Fig. 9 #173 and #175 ), wherein the waveform shaping unit ( Fig. 9 #173 and #175 ) is connected to either the anode or the cathode ( Fig. 9 PD cathode ), and wherein a signal output from the waveform shaping unit ( Fig. 9 #173 and #175 ) is input ( Fig. 9: Sig ) to the counter circuit ( Fig. 9 #16).
Regarding claim 10, Morimoto teaches the photoelectric conversion apparatus according to Claim 9 ( as discussed above), wherein the number of the pulse signals in the first exposure period is equal to an upper limit of the counter circuit ( [0054] the timing when the photodiode control circuit #14 transitions from the standby state to the recharging state coincides with the timing when the electric potential of the input portion of the counter #16 is reset to the initial state ).
Regarding claim 15, Morimoto teaches the photoelectric conversion apparatus according to Claim 22 ( as discussed below ) wherein, outside the first exposure period ( Fig. 10 Pctrl_1 and Pctrl_2 time t2 to t4 ) and the second exposure period ( Fig. 10 Pctrl_1 and Pctrl_2 time t5 to t6 ), the signal generation unit ( Fig. 9 #13 ) does not generate the pulse signal ( Fig. 10 Sig is high ).
Regarding claim 16, Morimoto teaches the photoelectric conversion apparatus according to Claim 1 ( as discussed above ), wherein a plurality of the avalanche photodiodes is arranged in a two-dimensional array in a planar view ( Fig. 1 pixel region #10 ).
Regarding claim 17, Morimoto teaches an optical detection system comprising: the photoelectric conversion apparatus according to Claim 1 ( as discussed above ); and a signal processing unit ( Fig. 12 #208 ) configured to process a signal output by the photoelectric conversion apparatus ( Fig. 12 #201 ).
Regarding claim 20, Morimoto teaches the photoelectric conversion apparatus according to Claim 1 ( as discussed above ), wherein the first exposure period ( Fig. 10 time t2 to t4 ) and the second exposure period ( Fig. 10 time t5 to t6 ) are periods during which the avalanche photodiode ( Fig. 9: PD ) and the signal processing circuit ( Fig. 9 #15 ) are in a signal-readable state ( [0073] In the present exemplary embodiment, a standby state for avalanche multiplication and a recharging state can be controlled by the signals Pctrl_1 and Pctrl_2 serving as the plurality of control signals. As a result of an input of the signals Pctrl_1 and Pctrl_2 serving as the plurality of control signals to the signal control circuit 15, the signal Sig transitions from the high level to the low level in the recharging state )
Regarding claim 21, Morimoto teaches the photoelectric conversion apparatus according to Claim 1 ( as discussed above ), further comprising a pixel ( Fig. 9 pixel 11 ) including the avalanche photodiode ( Fig. 9: PD ), the switch ( Fig. 9 #14 ), and the counter circuit ( Fig. 9 #16 ), wherein the first exposure period ( Fig. 10 time t2 to t4 ) and the second exposure period ( Fig. 10 time t5 to t6 ) are periods from a timing at which a signal of a first level ( Fig. 10: Pctrl_1 goes from high to low ) for starting an exposure period is input to the pixel ( Fig. 9 #11 ) to a timing at which a signal of a second level ( Fig. 10: Pctrl_1 goes from low to high ) for ending the exposure period is input to the pixel ( Fig. 9 #11 ).
Regarding claim 22, Morimoto teaches the photoelectric conversion apparatus according to Claim 1 ( as discussed above ), further comprising a signal generation unit ( Fig. 9 #13 ), wherein the pulse signal ( Fig. 10 Pctrl1 and Pctrl 2 ) is output from the signal generation unit ( Fig. 9 #13 ) and is input to the switch ( Fig. 9 #14 ).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 7 is rejected under U.S.C. 103 as being unpatentable over Morimoto; US 2020/0244909 A1; 01/2020 in view of Tochigi et al.; US 2022/0392944 A1; 11/2020
Claim 7: Morimoto discloses the photoelectric conversion apparatus according to Claim 1 ( as discussed above ).
Morimoto does not appear to disclose the switch functions as a quench element.
However, Tochigi teaches the switch functions as a quench element ( Fig. 3: #23 switch is controlled by quench voltage V_QCH ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Tochigi with Morimoto to implement the switch functions as a quench element because the quench element stops the high-current avalanche event caused by the detection of a single photon.
Response to Amendments / Arguments
Applicant’s arguments, see page, filed 03/20/2026, with respect to Drawings have been fully considered and are persuasive. The objection of 11/21/ has been withdrawn.
Applicant’s arguments, see page 8 of remarks, filed 03/20/2026, with respect to claim 15 have been fully considered and are persuasive. The rejection of 11/21/2025 has been withdrawn.
Applicant's arguments, see pages 9 – 14 of remarks, filed 03/20/2026, with respect to the rejection of claims 1-4, 8-10, and 16-17 under 35 U.S.C. 102 have been fully considered but they are not persuasive. Applicant argues that Morimoto does not disclose “ a switch connected between a power line to which a drive voltage is to be applied and either the anode or the cathode, and configured to receive a pulse signal for controlling switching of the switch; and a signal processing circuit including a counter circuit connected to the avalanche photodiode and configured to output an output signal, wherein a value obtained by dividing the number of the pulse signals in a first exposure period by the first exposure period, and a value obtained by dividing the number of the pulse signals in a second exposure period having a length different from a length of the first exposure period, by the second exposure period are different,” however, each feature listed above is addressed by Morimoto in the rejection of claim 1. Applicant further argues that Morimoto discloses “the signal Sig” corresponding to “an output signal” in Claim 1 and that Morimoto neither discloses nor suggest “wherein a value obtained by dividing the number of the pulse signals in a first exposure period by the first exposure period, and a value obtained by dividing the number of the pulse signals in a second exposure period having a length different from a length of the first exposure period, by the second exposure period are different.” the length of the Sig output is shown in Fig. 10 which varies based on the exposure period as discussed in the rejection of amended claim 1.
Applicant's arguments, see page 14 of remarks, filed 03/20/2026, with respect to the rejection of claim 7 under 35 U.S.C. 103 have been fully considered but they are not persuasive. The applicant’s arguments with respect to the application of Morimoto to claim 1 are addressed above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/K.N.F./Examiner, Art Unit 2817 /MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817
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