DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 9, 11-13 and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gao et al (US Patent Application Publication 2023/0123423).
Regarding claim 1, Gao et al disclose an integrated circuit (IC), comprising:
a first die 10 having a first semiconductor layer, a first active device layer and a first back-end-of-line (BEOL) layer [see Fig. 1; see also paragraph 0015];
a second die 20 having a second semiconductor layer, a second active device layer and a second back-end-of-line (BEOL) layer, and on the first die; and
a through substrate via (TSV) 34 extending through the first die and the second die [see Fig. 1].
Regarding claim 2, Gao et al disclose the IC of claim 1, furthermore in which a diameter of the TSV extending through the second semiconductor layer of the second die equals a diameter of the TSV extending through the first BEOL layer of the first die [see Fig. 1].
Regarding claim 3, Gao et al disclose the IC of claim 1, furthermore in which the first BEOL layer of the first die is coupled to the second semiconductor layer of the second die to stack the first die on the second die, and the TSV extends from and through the first semiconductor layer of the first die to and through the second BEOL layer of the second die [see Fig. 1].
Regarding claim 9, Gao et al disclose the IC of claim 1, furthermore in which the TSV comprises a multilayer conductive material [see Fig. 1].
Regarding claim 11, Gao et al disclose a method for fabricating stacked integrated circuit (IC) dies, comprising:
forming a first die 20 having a first semiconductor layer, a first active device layer and a first back-end-of-line (BEOL) layer [see Fig. 1; see also paragraph 0015];
forming a second die 10 having a second semiconductor layer, a second active device layer and a second back-end-of-line (BEOL) layer;
stacking the first die on the second die [see Fig. 1]; and
forming a through substrate via (TSV) 34 extending through the first die and the second die.
Regarding claim 12, Gao et al disclose the method of claim 11, furthermore in which a diameter of the TSV extending through the second semiconductor layer of the second die equals a diameter of the TSV extending through the first BEOL layer of the first die [see Fig. 1].
Regarding claim 13, Gao et al disclose the method of claim 11, furthermore in which the first BEOL layer of the first die is coupled to the second semiconductor layer of the second die to stack the first die on the second die, and the TSV extends from and through the first semiconductor layer of the first die to and through the second BEOL layer of the second die [see Fig. 1].
Regarding claim 19, Gao et al disclose the method of claim 11, furthermore in which the TSV comprises a multilayer conductive material [see Fig. 1].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4, 10, 14 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Gao et al (US Patent Application Publication 2023/0123423) in view of Mawatari et al (US Patent Application Publication 2011/0186990).
Regarding claims 4 and 14, Gao et al disclose the IC of claim 1 and the method of claim 11. Gao et al do not disclose first dielectric liners separating the TSV from the first semiconductor layer and the first active device layer of the first die; and second dielectric layers separating the TSV from the second semiconductor layer and the second active device layer of the second die. One such as Mawatari et al disclose TSV structures 120 such as those disclosed by Gao et al, wherein the TSV structures have dielectric liners 126 separating the TSV core 125 from the surrounding layers. It would have been obvious to one of ordinary skill in the art at the time of invention to include the dielectric liners of Mawatari et al in the IC and method of Gao et al in order to insulate the TSV and prevent current leakage.
Regarding claims 10 and 20, Gao et al disclose the IC of claim 9 and the method of claim 19. Gao et al do not disclose specifically wherein the multilayer conductive material comprises at least one of aluminum (Al), copper (Cu), cobalt (Co), ruthenium (Ru), and tungsten (W). One such as Mawatari et al disclose TSV structures 120 such as those disclosed by Gao et al, wherein the TSV structures have cores 125 and diffusion barrier layers 129, wherein the multilayer conductive material includes Cu and/or Ru, among other materials [see paragraph 0029]. It would have been obvious to one of ordinary skill in the art at the time of invention to form the multilayer conductive TSV structures from the claimed metals because the combination protects diffusion of the core material into the surrounding materials, which increases longevity [see paragraph 0029].
Allowable Subject Matter
Claims 5-8 and 15-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: regarding dependent claims 5 and 15, and claims 6 and 16 which depend therefrom, the prior art of record fails to teach or make reasonably obvious, in combination with the other claimed elements, wherein the second BEOL layer comprises a wrap-around contact coupled to the TSV and coupled to an interconnect of the second BEOL layer; regarding dependent claims 7 and 17, and claims 8 and 18 which depend therefrom, the prior art of record fails to teach or make reasonably obvious, in combination with the other claimed elements, wherein the first BEOL layer comprises a wrap-around contact coupled to the TSV and coupled to an interconnect of the first BEOL layer.
Conclusion
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/C.E.S./Examiner, Art Unit 2899 /VICTOR A MANDALA/Primary Examiner, Art Unit 2899