DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species A, claims 1-6 and 13-14 in the reply filed on February 23, 2026 is acknowledged. The traversal is on the ground(s) that Species A and Species B function the same. This is not found persuasive because Applicant is not admitting that the species are obvious variants of each other. Applicant states the specification explains the first step of manufacturing maybe equally applied to the species. However, the claims expressly state that in Species A the substrate is the gate, and in Species B a gate is added on top of the substrate. Thus, while the function of the transistors, and in fact all transistor devices, may be the same the structure being claimed, and the manufacturing method to create Species A and Species B is in fact mutually exclusive as described above.
The requirement is still deemed proper and is therefore made FINAL.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on November 1, 2024 was considered by the examiner.
Drawing Objections
The drawings are objected to because:
Claim 1 is not shown in the drawings. Claim 1 requires “ a first step of forming a gate insulating film on a substrate, wherein the substrate serves as a gate electrode; a second step of forming a metal layer on the gate insulating film”. However, figure 1 only starts with the second step. Therefore, the first step in the process/method is not shown in the drawings.
In figure 1, Applicant needs to add process labels such as “S1” to each of the steps.
In figures 2-3, Applicant needs to label every element of the transistor.
Claims 1 and 13 are not shown in the drawings. These claims require “an oxygen depletion area is formed in an area of the amorphous metal semiconductor layer adjacent to the metal layer or the metal oxide layer.” It appears based upon ¶ 0084, that this feature is not shown in the drawings.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 13-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 13,
Claim 13 is indefinite because it is unclear based upon the preamble whether the claim is directed to a device or method. This is because the preamble includes “A thin-film transistor manufactured by the method of claim 1, wherein the thin-film transistor includes”. Further, the claims all include the definite article “the” referring back to the limitation of claim 1 instead of the indefinite article “a”. This informs Examiner that claim 13 should be viewed as a dependent claim upon claim 1. It is this dependency which renders the claim indefinite as Applicant is mixing statutory classes.
Under MPEP 2106.03 there are four statutory classes: process, a machine, a manufacture, and a composition of matter. 35 USC § 101. Under MPEP 2173.05(p)(II) a claim is indefinite when one has both a process and product in the same claim. The rational for this is provided in IPXL Holdings v. Amazon.com, Inc., 430 F.3d 1377, 1384 (Fed. Cir. 2005). Where the court held that the claim was indefinite as it is unclear when infringement occurs, and “it did not apprise a person of ordinary skill in the art of its scope and it is invalid under section 112, paragraph 2.”1 Pg. 13 of the included opinion.
Claim 13 suffers from the same issue. The public will not know when infringement of claim 13 occurs. Will it occur when they have the same device made by a different method, or do they need to use the same method, what if they use the same method steps with addition steps (this is allowed by comprising), and make a different device? There is great uncertainty when infringement of claim 13 will occur. Therefore, claim 13 is directed to a mixed statutory class. As such it is indefinite. MPEP 2173.05(p)(II)
If it is considered a method of making then please see 35 USC § 112(d).
If it is considered a device then the preamble is a product-by-process, and the method/process of making the device does not limit the device. MPEP 2113.
For purposes of examination only, claim 13 will be treated as a device.
Regarding claims 13-14,
Because claim 13 is being treated as an independent claim directed to a different statutory class than claim 1 every element needs to start with an indefinite article: a, an, etc. Therefore, the claim is being rejected as every element lacks antecedent basis.
Claim Rejections - 35 USC § 112(d)
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claims 13-14 are rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Regarding claim 13,
As stated in 35 USC § 112(b) above, if claim 13 is directed to a method of making then claim 13 does not further limit the subject matter of claim 1. This is because all of the structure being claimed in claim 13 has already been claimed in claim 1. Therefore, claim 13 does not further limit the subject matter of claim 1.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kiani, Ahmed, “Analysis of metal oxide thin film transistors with high-k dielectrics and source/drain contact metals”, A Dissertation submitted to the University of Cambridge for the Degree of Doctor of Philosophy, June 2013 (“Kiani”), in view of Kato et al. (US 2011/0114941 A1) (“Kato”), in view of Murray et al. (US 2022/0246767 A1) (“Murray”).
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Regarding claim 13, Kiani teaches at least in figure 5.1 above:
the substrate (n-Si) serving as a gate electrode (N-Si serves as the claimed gate electrode);
the gate insulating film (Gate dielectric) formed on the substrate (n-Si);
Kiani does not teach:
the metal layer formed on the gate insulating film;
the metal oxide layer formed on the metal layer and covering an entirety of a surface of the metal layer;
a metal oxide semiconductor layer formed so as to cover an entirety of a surface of the metal oxide layer; and
the source/drain electrode formed on the metal oxide semiconductor layer,
wherein the thin-film transistor further comprises an oxygen depletion layer disposed in an area of the metal oxide semiconductor layer adjacent to the metal oxide layer.
Kato teaches at least in figure 1B:
the metal layer (405) formed on the gate insulating film (404);
the metal oxide layer (406) formed on the metal layer (405) and covering an entirety of a surface of the metal layer (406 covers the entirety of 405);
a metal oxide semiconductor layer (407) formed so as to cover a surface of the metal oxide layer (406); and
the source/drain electrode (408a-b) formed on the metal oxide semiconductor layer (407),
wherein the thin-film transistor further comprises an oxygen depletion layer disposed in an area of the metal oxide semiconductor layer adjacent to the metal oxide layer (according to Applicant’s specification the oxygen deficiency layer (¶ 0084) is the metal oxide layer. Because the prior art teaches the same structure as Applicant it would have been obvious that it would have the above layer).
It would have been obvious to one of ordinary skill in the art to combine Kato with Kiani as this would allow one to create a nonvolatile TFT memory device. Kato ¶ 0004.
The prior art does not teach:
a metal oxide semiconductor layer formed so as to cover an entirety of a surface of the metal oxide layer.
This is because the prior art shows the metal oxide semiconductor layer as mainly being formed between the source drain contacts.
Murray teaches at least in figure 24B:
a metal oxide semiconductor layer (20) formed so as to cover an entirety of a surface of the metal oxide layer (10).
It would have been obvious that the metal oxide semiconductor layer could be equal in length to the metal oxide layer. This is because it is an obvious variant and design choice on how one wants to form the oxide semiconductor layer and its integration with the source and drain.
Regarding claim 14, Kiani teaches at least in figure 5.1 above:
wherein the metal oxide semiconductor layer is obtained by crystallizing the amorphous metal oxide semiconductor layer under the heat-treatment (this is a product-by-process limitation. Kato teaches this limitation in ¶ 0079).
Allowable Subject Matter
Claims 1-6 are allowed.
The following is an examiner’s statement of reasons for allowance: See below.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Regarding claim 1, Kiani teaches at least in figure 5.1 above:
a first step of forming a gate insulating film (Gate dielectric) on a substrate (n-Si),
wherein the substrate (n-Si) serves as a gate electrode (n-Si acts as ;
forming an metal oxide semiconductor layer (IGZO)
a fifth step of depositing a source/drain electrode (source/drain) layer on the metal oxide semiconductor layer (a-IGZO)
Kiani does not teach:
a second step of forming a metal layer on the gate insulating film;
a third step of forming an amorphous metal oxide semiconductor layer so as to cover an entirety of a surface of the metal layer to obtain a structure including the metal layer and the amorphous metal oxide semiconductor layer formed thereon;
a fourth step of heat-treating the structure; and
a fifth step of depositing a source/drain electrode layer on the heat-treated structure,
wherein during the fourth step,
a metal oxide layer is formed between the amorphous metal oxide semiconductor layer and the metal layer,
the amorphous metal oxide semiconductor layer is crystallized, and
an oxygen depletion area is formed in an area of the amorphous metal semiconductor layer adjacent to the metal layer or the metal oxide layer.
Kato teaches
a second step of forming a metal layer (405; ¶ 0064, where 405 can be AL) on the gate insulating film (404);
a third step of forming an amorphous metal oxide semiconductor layer (407) so as to cover an entirety of a surface of the metal layer (405) to obtain a structure (405/407) including the metal layer (405) and the amorphous metal oxide semiconductor layer (407) formed thereon;
a fourth step of heat-treating the structure (¶ 0079); and
a fifth step of depositing a source/drain electrode layer (408a-b) on the heat-treated structure (405/407),
wherein during the fourth step (detailed below),
the amorphous metal oxide semiconductor layer is crystallized (¶ 0079), and
an oxygen depletion area is formed in an area of the amorphous metal semiconductor layer adjacent to the metal layer or the metal oxide layer (¶ 0088).
The prior art does not teach:
wherein during the fourth step,
a metal oxide layer is formed between the amorphous metal oxide semiconductor layer and the metal layer.
This is because the prior art does not teach the metal layer is oxidized during the fourth step.
Conclusion
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/VINCENT WALL/Primary Examiner, Art Unit 2898
1 Examiner cannot cite to the reporter as the office has removed all examiners ability to use Westlaw.