DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is in response to the communication dated 06/22/2026.
Claims 1-7, and 15-22 are pending in this application.
Claims 8-14 have been cancelled.
Remarks
2. Applicants’ argument(s) have been fully considered, but are not persuasive. Specifically, Applicants argued at page 16 of 18:
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This is not found persuasive.
Wang discloses a package structure, comprising:
a plurality of image sensing chips 22 (Figs. 2A-2C) enclosed in plastic packaging material 24 and substrate 21. The plastic packaging material 24 and the substrate 21 form a layer that encapsulates and secures the plurality of image sensing chips 22 to have the surfaces with photosensitive regions 221 of the chips exposed and coplanar with upper surfaces of the plastic packaging material 24 and the upper surface 21a of the substrate 21.
In other words, the plastic packaging material 24 and/or the substrate 21 forms a coplanar control layer 21 and/or 24 configured to encapsulate the plurality of image sensing chips 22 therein, wherein at least one surface of each of the image sensing chips 22 is exposed outside the coplanar control layer 21/24, and is coplanar with at least one surface of another of the plurality of image sensing chips 22.
YEH discloses package structures comprising image sensing chips 250 which are micro-lens image sensing chips, or micro-lens chips, comprising micro-lens array 256. See Figs. 2-9, and para. 0018.
When combining Wang with YEH, the image sensing chips of Wang would be replaced by micro-lens chips similar to that disclosed by YEH. Obviously, the resulting micro-lens chips in the combined Wang-YEH structure would also feature an exposed surface of one micro-lens chip that is coplanar with exposed surface of the other micro-lens chips in the package structure. Consequently, the microlens array of one micro-lens chip would be coplanar with the micro-lens arrays of the other micro-lens chips in the package structure, thereby providing uniform focal planes among the plurality of micro-lens chips, or that the same focal planes would be provided among the plurality of micro-lens chips.
Similarly, Adkisson discloses a package structure comprising an image sensing chip 400 which is a micro-lens image sensing chip (or micro-lens chip) comprising microlens (microlens, Figs. 4-7).
When combining Wang with Adkisson, the image sensing chips of Wang would be replaced by micro-lens chips similar to that disclosed by Adkisson. Obviously, the resulting micro-lens chips in the combined Wang-Adkisson structure would also feature an exposed surface of one micro-lens chip that is coplanar with exposed surface of the other micro-lens chips in the package structure. Consequently, the microlens array of one micro-lens chip would be coplanar with the micro-lens arrays of the other micro-lens chips in the package structure, thereby providing uniform focal planes among the plurality of micro-lens chips, or that the same focal planes would be provided among the plurality of micro-lens chips.
Claim Rejections - 35 U.S.C. § 103
3. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Wang (US 10,763,293) in view of YEH et al. (US 2021/0111221)
Regarding claim 1, Wang discloses a package structure, comprising:
a plurality of image sensing chips 22 arranged at intervals (see figs. 2A-2C); and
a coplanar control layer 21 and/or 24 configured to encapsulate the plurality of image sensing chips 22 therein, wherein at least one surface of each of the image sensing chips 22 is exposed outside the coplanar control layer 21/24, and is coplanar with at least one surface of another of the plurality of image sensing chips 22.
(As stated above, Wang discloses a plurality of image sensing chips 22 (Figs. 2A-2C) enclosed in plastic packaging material 24 and substrate 21. The plastic packaging material 24 and the substrate 21 form a layer that encapsulates and secures the plurality of image sensing chips 22 to have the surfaces with photosensitive regions 221 of the chips exposed and coplanar with upper surfaces of the plastic packaging material 24 and the upper surface 21a of the substrate 21.
In other words, the plastic packaging material 24 and/or the substrate 21 forms a coplanar control layer 21 and/or 24 configured to encapsulate the plurality of image sensing chips 22 therein, wherein at least one surface of each of the image sensing chips 22 is exposed outside the coplanar control layer 21/24, and is coplanar with at least one surface of another of the plurality of image sensing chips 22.)
Wang does not specifically teach that the image sensing chips 22 are micro-lens chips.
YEH discloses package structures comprising image sensing chips 250 which are micro-lens image sensing chips, or micro-lens chips, comprising micro-lens array 256. See figs. 2-9, and para. 0018.
It would have been obvious to one of ordinary skills in the art at the time the invention was made to modify the invention of Wang so that the image sensing chips 22 of Wang would be replaced by micro-lens image sensing chips taught by YEH, in order to focus light onto the sensing area of the image sensing chips, thereby to increase the light-gathering efficiency, hence to increase the performance of the structure.
When combining Wang with YEH, the image sensing chips of Wang would be replaced by micro-lens chips similar to that disclosed by YEH. Obviously, the resulting micro-lens chips in the combined Wang-YEH structure would also feature an exposed surface of one micro-lens chip that is coplanar with exposed surface of the other micro-lens chips in the package structure. Consequently, the microlens array of one micro-lens chip would be coplanar with the micro-lens arrays of the other micro-lens chips in the package structure, thereby providing uniform focal planes among the plurality of micro-lens chips, or that the same focal planes would be provided among the plurality of micro-lens chips.
See also the above remarks.
5. Claims 1-5, and 15-19 are rejected under 35 U.S.C. 103 as being unpatentable over Wang (US 10,763,293) in view of Adkisson et al. (US 2008/0116537)
Regarding claim 1, Wang discloses a package structure, comprising:
a plurality of image sensing chips 22 arranged at intervals (see figs. 2A-2C); and
a coplanar control layer 21 and/or 24 configured to encapsulate the plurality of image sensing chips 22 therein, wherein at least one surface of each of the image sensing chips 22 is exposed outside the coplanar control layer 21/24, and is coplanar with at least one surface of another of the plurality of image sensing chips 22.
(as stated above, Wang discloses a plurality of image sensing chips 22 (Figs. 2A-2C) enclosed in plastic packaging material 24 and substrate 21. The plastic packaging material 24 and the substrate 21 form a layer that encapsulates and secures the plurality of image sensing chips 22 to have the surfaces with photosensitive regions 221 of the chips exposed and coplanar with upper surfaces of the plastic packaging material 24 and the upper surface 21a of the substrate 21.
In other words, the plastic packaging material 24 and/or the substrate 21 forms a coplanar control layer 21 and/or 24 configured to encapsulate the plurality of image sensing chips 22 therein, wherein at least one surface of each of the image sensing chips 22 is exposed outside the coplanar control layer 21/24, and is coplanar with at least one surface of another of the plurality of image sensing chips 22.)
Wang does not specifically teach that the image sensing chips 22 are micro-lens chips.
Adkisson discloses a package structure comprising an image sensing chip 400 which is a micro-lens image sensing chip, or micro-lens chip, comprising microlens (microlens, Figs. 4-7), comprising a coplanar control layer 160.
It would have been obvious to one of ordinary skills in the art at the time the invention was made to modify the invention of Wang so that each of the image sensing chips 22 of Wang would be replaced by a micro-lens image sensing chip as that taught by Adkisson, in order to focus light onto the sensing area of the image sensing chips, thereby to increase the light-gathering efficiency, hence to increase the performance of the structure.
When combining Wang with Adkisson, the image sensing chips of Wang would be replaced by micro-lens chips similar to that disclosed by Adkisson. Obviously, the resulting micro-lens chips in the combined Wang-Adkisson structure would also feature an exposed surface of one micro-lens chip that is coplanar with exposed surface of the other micro-lens chips in the package structure. Consequently, the microlens array of one micro-lens chip would be coplanar with the micro-lens arrays of the other micro-lens chips in the package structure, thereby providing uniform focal planes among the plurality of micro-lens chips, or that the same focal planes would be provided among the plurality of micro-lens chips.
Regarding claim 2, Wang/Adkisson discloses the package structure according to claim 1, wherein each of the micro-lens chips 400 comprises a micro-lens array, a plurality of the micro-lens arrays of the plurality of micro-lens chips are exposed outside the coplanar control layer 160 (figs. 4 of Adkisson), and a plurality of surfaces of the plurality of the micro-lens arrays are coplanar (with each other). See figs. 4-7 of Adkisson.
Regarding claim 3, Wang/Adkisson discloses the package structure according to claim 1, wherein each of the micro-lens chips 400 comprises solder terminals (solder ball shown in figs. 4-7 of Adkisson), a plurality of the solder terminals of the plurality of micro-lens chips are exposed outside the coplanar control layer 160, and a plurality of surfaces of the plurality of solder terminals are coplanar.
Regarding claim 4, Wang/Adkisson discloses the package structure according to claim 3, wherein each of the micro-lens chips further comprises a plurality of connection terminals (to which the solder balls are attached, see figs. 4-7 of Adkisson) connected to the plurality of solder terminals, the plurality of connection terminals of each of the micro-lens chips are exposed outside the coplanar control layer 160, a horizontal plane formed by the plurality of connection terminals of each of the micro-lens chips is a connection surface of the micro-lens chip, and a plurality of the connection surfaces of the plurality of micro-lens chips are coplanar. See figs. 4-7 of Adkisson.
Regarding claim 5, Wang/Adkisson discloses the package structure according to claim 3, wherein the solder terminal is a multi- layer structure (under-bump-metallurgy, or plated contact; see paras. 0049-0050 of Adkisson), the multi-layer structure comprises at least a core (the solder metal) and an outer layer (the plated metal), and the outer layer directly or indirectly covers the core.
Regarding claim 15, Wang discloses a package structure, comprising:
a plurality of image sensing chips 22 arranged at intervals (see figs. 2A-2C); and
a coplanar control layer 21 and/or 24 configured to encapsulate the plurality of image sensing chips 22 therein, wherein each of the image sensing chips 22 comprises a sensing surface (on which sensing region 221 is formed), a connection surface (on which connections 213 are located) a terminal surface (on which terminals or pads 212, 222 are located),
and one of the sensing surfaces, the connection surface, and the terminal surface of the image sensing chips 22 is coplanar with one of the sensing surface, the connection surface, and the terminal surface of another of the plurality of image sensing chips 22.
(Wang discloses a plurality of image sensing chips 22 (Figs. 2A-2C) enclosed in plastic packaging material 24 and substrate 21. The plastic packaging material 24 and the substrate 21 form a layer that encapsulates and secures the plurality of image sensing chips 22 to have the surfaces with photosensitive regions 221 (sensing surfaces 221, or terminal surface) of the chips exposed and coplanar with each other and with upper surfaces of the plastic packaging material 24 and the upper surface 21a of the substrate 21.
In other words, the plastic packaging material 24 and/or the substrate 21 forms a coplanar control layer 21 and/or 24 configured to encapsulate the plurality of image sensing chips 22 therein, wherein one of the sensing surfaces, the connection surface, and the terminal surface of each of the image sensing chips 22 is coplanar with one of the sensing surface, the connection surface, and the terminal surface of another of the plurality of image sensing chips 22.)
Wang does not specifically teach that the image sensing chips 22 are micro-lens chips, wherein each of the micro-lens sensing chips comprises a lens surface, a connection surface, and a terminal surface.
Adkisson discloses a package structure comprising an image sensing chip 400 which is a micro-lens image sensing chip (or a micro-lens chip; see figs. 4-7) comprising a coplanar control layer 140;
wherein the micro-lens sensing chip 400 comprises a lens surface (on which the microlens are located; fig. 7), a connection surface (on which connections 410 are located), and a terminal surface (on which solder balls are located), and one of the lens surface, the connection surface, and the terminal surface of each of the micro-lens chips is coplanar (the lens surface of one chip is coplanar with the lens surface of the other chips, the terminal surface of one chip is coplanar with the terminal surface of the other chips, etc.).
It would have been obvious to one of ordinary skills in the art at the time the invention was made to modify the invention of Wang so that each of the image sensing chips 22 of Wang would be replaced by a micro-lens image sensing chip as that taught by Adkisson, in order to focus light onto the sensing area of the image sensing chips, thereby to increase the light-gathering efficiency, hence to increase the performance of the structure.
When combining Wang with Adkisson, the image sensing chips of Wang would be replaced by micro-lens chips similar to that disclosed by Adkisson. Obviously, the resulting micro-lens chips in the combined Wang-Adkisson structure would also feature an exposed surface of one micro-lens chip that is coplanar with exposed surfaces of the other micro-lens chips in the package structure, and one of the lens surface, the connection surface, and the terminal surface of the micro-lens chips being coplanar with one of the lens surface, the connection surface, and the terminal surface of another of the plurality of micro-lens chips. Consequently, the microlens array of one micro-lens chip would also be coplanar with the micro-lens array of the other micro-lens chips in the package structure, thereby providing uniform focal planes among the plurality of micro-lens chips, or that the same focal planes would be provided among the plurality of micro-lens chips.
Regarding claim 16, Wang/Adkisson discloses the package structure according to claim 15, wherein each of the micro-lens chips comprises a micro-lens array, a plurality of the micro-lens arrays of the plurality of micro- lens chips are exposed outside the coplanar control layer, a horizontal plane formed by outermost endpoints of a plurality of lenses of the micro-lens array of each micro-lens chip is the lens surface of the micro-lens chip, and a plurality of the lens surfaces of the plurality of micro-lens chips are coplanar.
Regarding claim 17, Wang/Adkisson discloses the package structure according to claim 15, wherein each of the micro-lens chips 400 comprises solder terminals (solder ball shown in figs. 4-7 of Adkisson), a plurality of the solder terminals of the plurality of micro-lens chips are exposed outside the coplanar control layer 160, a horizontal plane formed by outermost endpoints of the plurality of solder terminals of each micro-lens chip is the terminal surface of the micro-lens chip, and a plurality of the terminal surfaces of the plurality of micro-lens chips are coplanar (with each other). See figs. 4-7 of Adkisson.
Regarding claim 18, Wang/Adkisson discloses the package structure according to claim 17, wherein each of the micro-lens chips further comprises a plurality of connection terminals (to which the solder balls are attached, see figs. 4-7 of Adkisson) connected to the plurality of solder terminals, the plurality of connection terminals of each of the micro-lens chips are exposed outside the coplanar control layer 160, a horizontal plane formed by the plurality of connection terminals of each micro-lens chip is the connection surface of the micro-lens chip, and a plurality of the connection surfaces of the plurality of micro-lens chips are coplanar (with each other). See figs. 4-7 of Adkisson.
Regarding claim 19, Wang/Adkisson discloses the package structure according to claim 17, wherein the solder terminal is a multi-layer structure (under-bump-metallurgy, or plated contact; see paras. 0049-0050 of Adkisson), the multi-layer structure comprises at least a core (the solder metal) and an outer layer (the plated metal), and the outer layer directly or indirectly covers the core. See paras. 0049-0050 of Adkisson.
Claim Rejections - 35 USC § 102
6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
7. Claims 1-2, and 15-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chang et al. (US 2019/0123081)
Regarding claim 1, Chang discloses a package structure, comprising:
a plurality of micro-lens chips 100 (see Fig. 3a: each chip 100 has a plurality of micro-lens on surface 100a) arranged at intervals; and
a coplanar control layer 150 (Fig. 3b) configured to encapsulate the plurality of micro-lens chips 100 therein, wherein at least one surface 100a of each of the micro-lens chips 100 is exposed outside the coplanar control layer 150 and is coplanar with at least one surface of another of the plurality of micro-lens chips 100, and a same focal plane is provided among the plurality of micro-lens chips (Fig. 3c: the molded layer 150 encapsulates and secures the chips 100 in place to have lower and upper surfaces of the micro-lens chips 100, as well as the micro-lens surface 100a, coplanar with each other and with lower and upper surfaces 150a, 150b of the molded layer 150, respectively, thereby forming the same focal plane among the chips).
Regarding claim 2, Chang discloses the package structure according to claim 1, wherein each of the micro-lens chips 100 comprises a micro-lens array (having micro-lens surface 100a), a plurality of the micro-lens arrays of the plurality of micro-lens chips are exposed outside the coplanar control layer 150, and a plurality of surfaces of the plurality of the micro-lens arrays are coplanar (with lower surface 150a of the coplanar control layer 150). See Fig. 3b.
Regarding claim 15, Chang discloses a package structure, comprising:
a plurality of micro-lens chips 100 (see Fig. 3a: each chip 100 has a plurality of micro-lens on surface 100a) arranged at intervals; and
a coplanar control layer 150 (Fig. 3b) configured to encapsulate the plurality of micro-lens chips 100 therein, wherein each of the micro-lens chips 100 comprises a lens surface 100a, a connection surface (exposing connection via 160 on surface 150b, Fig. 3c), and a terminal surface (exposing metal pads 101), and one of the lens surface 100a, the connection surface, and the terminal surface of each of the micro-lens chips is coplanar with one of the lens surface 100a, the connection surface, and the terminal surface of another of the plurality of micro-lens chips 100, and a same focal plane is provided among the plurality of micro-lens chips (Fig. 3c: the molded layer 150 encapsulates and secures the chips 100 in place to have lower and upper surfaces of the micro-lens chips 100, as well as the micro-lens surface 100a, coplanar with each other and with lower and upper surfaces 150a, 150b of the molded layer 150, respectively, thereby forming the same focal plane among the chips).
Regarding claim 16, Chang discloses the package structure according to claim 15, wherein each of the micro-lens chips 100 comprises a micro-lens array (having micro-lens surface 100a), a plurality of the micro-lens arrays of the plurality of micro- lens chips are exposed outside the coplanar control layer 150, a horizontal plane formed by outermost endpoints of a plurality of lenses of the micro-lens array of each micro-lens chip is the lens surface of the micro-lens chip, and a plurality of the lens surfaces of the plurality of micro-lens chips are coplanar. See Fig. 3c.
Allowable Subject Matter
8. Claims 6-7, and 20 are allowable.
Claims 6-7, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest the claimed package structure (in addition to the other limitations in the claim) comprising:
Claims 6-7:
a dummy die disposed on the first surface of the lower redistribution layer, wherein the dummy die is laterally adjacent to the active device;
an encapsulation layer disposed on the first surface of the lower redistribution layer, and configured to encapsulate the active device and the dummy die.
Claim 20:
a dummy die disposed on the first surface of the lower redistribution layer, wherein the dummy die is laterally adjacent to the active device;
an encapsulation layer disposed on the first surface of the lower redistribution layer, and configured to encapsulate the active device and the dummy die.
Allowance / Reasons for Allowance
9. Claims 21-22 are allowed.
The following is an examiner’s statement of reason for allowance:
None of the references of record teaches or suggests the claimed package structure (in combination set forth in the claim) comprising:
a dummy die disposed on the first surface of the lower redistribution layer, wherein the dummy die is laterally adjacent to the active device;
an encapsulation layer disposed on the first surface of the lower redistribution layer, and configured to encapsulate the active device and the dummy die; and
an upper redistribution layer disposed on the encapsulation layer, wherein the upper redistribution layer is electrically connected to the active device and the plurality of solder terminals of the plurality of micro-lens chips.
Conclusion
10. THIS ACTION IS MADE FINAL. A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Dao Nguyen whose telephone number is (571)272-1791. The examiner can normally be reached on Monday-Friday 9:00am - 6:00pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Loke, can be reached on (571)272-1657. The fax numbers for all communication(s) is (571)273-8300.
Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is (571)272-1633.
/DAO H NGUYEN/
Primary Examiner, Art Unit 2818+
August 18, 2026
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