Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on October 25, 2023 and December 13, 2025 were filed in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Election/Restrictions
Applicant’s election without traverse of Invention Group I, Claims 1-15, in the reply filed on February 17, 2026 is acknowledged. Claims 16-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected i, there being no allowable generic or linking claim. Therefore, an examination on the merits of Claims 1-15 follows in the present Office Action.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 10-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Seacrist et al. (U.S. Pat. 8,884,310), hereinafter Seacrist.
Regarding Claim 1, Seacrist teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15), the method comprising:
-depositing a metal catalyst layer (‘metal film’; Col. 2, Lines 23-29) on a top surface of the semiconductor substrate (Col. 2, Lines 18-23);
-patterning the metal catalyst layer, such that one or more portions of the top surface of the semiconductor substrate are covered by one or more metal catalyst layer structures (‘pattern of metal deposition’; Col. 4, Lines 44-49 and Col. 7, Lines 30-35); and
-facilitating a graphene growth process on an exposed surface of the one or more metal catalyst layer structures (Col. 2, Lines 33-35), wherein
-the graphene growth process forms the graphene layer on the exposed surfaces of the one or more metal catalyst layer structures (‘precipitate at the front metal film surface’; Col. 11, Lines 18-19).
Regarding Claim 2, Seacrist teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 1, wherein:
-the semiconductor substrate comprises Silicon Carbide (Col. 5, Line 15).
Regarding Claim 10, Seacrist teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 1, wherein:
-the metal catalyst layer comprises nickel (Col. 7, Line 66).
Regarding Claim 11, Seacrist teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 1, wherein:
-the metal catalyst layer is deposited by sputtering (Col. 8, Lines 2-4).
Regarding Claim 12, Seacrist teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 1, wherein:
-the one or more metal catalyst layer structures are patterned using a metal etching photolithography process (Col. 4, Lines 44-50 and Col. 7, Lines 30-35).
Regarding Claim 13, Seacrist teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 1, wherein:
-the graphene growth process is facilitated using a chemical vapor deposition process (Col. 4, Lines 1-4 and 13-15), and wherein the chemical vapor deposition process utilizes a carbon precursor (e.g. a carbon-rich gas).
Regarding Claim 14, Seacrist teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 1, wherein:
-methane gas is used as the carbon precursor in the chemical vapor deposition process (Col. 4, Line 14).
Regarding Claim 15, Seacrist teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 13, wherein:
-during the chemical vapor deposition process, the metal catalyst layer is exposed to the carbon precursor for a duration between 600 seconds and 700 seconds (e.g. ‘600 seconds’; Col. 10, lines 48-51).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3, 7, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Seacrist, in view of Ahn et al. (U.S. Pub. 2014/0175458), hereinafter Ahn.
Regarding Claim 3, Seacrist teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 1, upon which it depends, but does not explicitly disclose:
-the metal catalyst layer forms a metal silicide with the one or more portions of the semiconductor substrate covered by the one or more metal catalyst layer structures.
Ahn teaches a method (Paragraph [0035]) of disposing a graphene layer ((20); Fig. 2E, Paragraph [0076]) on a semiconductor substrate ((10); Fig. 2E, Paragraph [0071]) utilizing a metal catalyst layer ((40); Fig. 2C, Paragraph [0075], wherein:
-the metal catalyst layer (40) forms a metal silicide ((50a) as part of layer (50); Figs. 2D-3C, Paragraph [0079]) with the one or more portions of the semiconductor substrate (10) covered by the one or more metal catalyst layer structures (40).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Ahn into the method of Seacrist such that the metal catalyst layer forms a metal silicide with the one or more portions of the semiconductor substrate covered by the one or more metal catalyst layer structures. Futhermore, the incorporation would be done such that the entire one or more metal catalyst layer structure underlying the graphene layer is transitioned to the metal silicide (Ahn, Fig. 3B, Paragraph [0079]). This would be due to the fact that doing so would ensure the graphene layer is uniformly formed (Ahn, Paragraph [0081]).
Regarding Claim 7, Seacrist as modified by Ahn teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 3, wherein:
-wherein the one or more metal catalyst layer structures are patterned (Seacrist, ‘metal films’) such that during the graphene growth process, the entire one or more metal catalyst layer structure underlying the graphene layer is transitioned to the metal silicide (As provided in the incorporation of the teachings of Ahn into Seacrist of Claim 3 above, See Ahn Figs. 3A-3C and Paragraph [0079]).
Regarding Claim 8, Seacrist as modified by Ahn teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 7, wherein:
-wherein the metal catalyst layer comprises a thickness between 45 nanometers and 55 nanometers (Seacrist, e.g. ’50 nanometers’; Col. 8, Lines 10-11).
Claims 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Seacrist in view of Ahn, in further view of Wenxu et al. (U.S. Pub. 2016/0247906), hereinafter Wenxu.
Regarding Claim 4, Seacrist as modified by Ahn teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 3, but does not explicitly teach:
- the semiconductor substrate comprises one or more contact points, and wherein one or more of the one or more metal catalyst layer structures are patterned in alignment with the one or more contact points.
Seacrist does teach the method disclosed may be used for graphene formation within the context of device manufacturing e.g. transistors (Col. 11, Lines 52-55)
Wenxu teaches a transistor (Fig.1, Paragraph [0055]) including graphene ((GP10); Fig. 1, Paragraph [0059]) and a method of manufacturing the same (Figs. 7A-7H; Paragraph [0081]), wherein:
- the semiconductor substrate ((SUB1); Fig. 1, Paragraph [0056]) comprises one or more contact points (e.g. the top surfaces of (S10) and (C10); Fig. 1, Paragraph [0056]) where the graphene layer ((GP10), see also in Fig. 7D) is present.
The limitation “wherein one or more of the one or more metal catalyst layer structures are patterned in alignment with the one or more contact points.” Would necessarily be fulfilled if the graphene is formed at the contact points, as the metal catalyst layer defines the location of the graphene growth.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Wenxu into the method of Seacrist as modified by Ahn such that the semiconductor substrate comprises one or more contact points, and wherein one or more of the one or more metal catalyst layer structures are patterned in alignment with the one or more contact points. This would be due to the fact that doing so would result in the manufacturing of a device (transistor) with improved charge mobility and current density (Wenxu, Paragraph [0002]).
Regarding Claim 5, Seacrist and Ahn as modified by Wenxu teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 4, wherein:
-the one or more contact points comprise an n-type or p-type semiconductor region with a low doping concentration (Wenxu, e.g. (C10) with ‘n-type impurity or a p-type impurity’, Paragraph [0056]), and wherein the metal catalyst layer forms a Schottky contact between the graphene layer (GP10) and the semiconductor substrate (at (C10)) (‘the contact between the graphene layer GP10 and the semiconductor region C10 may be a Schottky contact.’ Paragraph [0059], See also Paragraph [0061])).
Regarding Claim 6, Seacrist and Ahn as modified by Wenxu teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 4, wherein:
the one or more contact points comprise an n-type or p-type semiconductor region with a high doping concentration (Wenxu, e.g. (S10) with ‘n-type impurity or a p-type impurity’ and ‘highly doped’, Paragraph [0056]), and wherein the metal catalyst layer forms an ohmic contact between the graphene layer and the semiconductor substrate (at (S10)) (‘the contact between the graphene layer GP10 and the source region S10 may be an ohmic contact.’ Paragraph [0059])).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Seacrist, in view of Kurganova et al. (U.S. Pub. 2020/0406244), hereinafter Kurganova.
Regarding Claim 9, Seacrist teaches a method of disposing a graphene layer on a semiconductor substrate (Col. 1, Lines 14-15) of Claim 1, but does not specifically disclose:
-the metal catalyst layer comprises molybdenum.
Kurganova teaches a method of disposing a graphene layer (Paragraph [0073]) on a semiconductor substrate ((15); Fig. 2, Paragraph [0077]) utilizing a metal catalyst layer ((17); Fig. 2, Paragraphs [0031] and [0076]), wherein:
-the metal catalyst layer (17) comprises molybdenum (Paragraph [0032]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Kurganova into the method of Seacrist such that the metal catalyst layer comprises molybdenum. This would be due to the fact that doing so would reduce thermal stress (Kurganova, Paragraph [0011]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DMITRI MIHALIOV whose telephone number is (571)270-5220. The examiner can normally be reached weekdays 7:30 - 17:30 US Eastern Time.
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/D.M./Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812