Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested:
“ Semiconductor Device Having An Upper Wiring Structure With Tantalum Doped With Ruthenium And A Lower Wiring Structure Having A Liner Including Cobalt Doped With Ruthenium”.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-6 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Chou et al. (US 2020/0058544 A1) in view of Kuo et al. (US 2021/0391275 A1).
Regarding independent claim 1: Chou teaches (e.g., Figs. 1-6) a semiconductor device ([0009]-[0024]) comprising:
a lower interlayer insulating film ([0010]-[0011]: 16);
a lower wiring structure ([0010]-[0011]: 18) in the lower interlayer insulating film,
the lower wiring structure including
a lower filling film ([0011]: 24) and a lower capping film ([0012]: 26), the lower capping film including an upper surface and a bottom surface opposite each other (inherent structure of capping layer 26), and
the bottom surface of the lower capping film being in contact with an upper surface of the lower filling film (24);
an etch stop film ([0012]: 28) on the lower interlayer insulating film,
the etch stop film (28) in contact with an upper surface of the lower interlayer insulating film (16) and the upper surface of the lower capping film (26);
an upper interlayer insulating film ([0012]-[0013]: 30) on the etch stop film (28),
the upper interlayer insulating film including
an upper wiring trench ([0013]-[0014]: 36); and
an upper wiring structure (Fig. 5; [0021]-[0022]: 46/48/50) in the upper wiring trench and in contact with the lower filling film (24),
wherein the upper wiring structure includes an upper barrier film ([0021]-[0022]: 46), an upper filling film ([0021]-[0022]: 50), and
an upper liner (Fig. 5; [0021]-[0022]: 48) between the upper barrier film and the upper filling film,
the upper liner (48) includes a sidewall portion and a bottom portion (Fig. 5; [0021]-[0022]: 48),
the sidewall portion of the upper liner extends along a sidewall of the upper wiring trench (Fig. 5; [0021]-[0022]: the sidewall portion of the upper liner 48 extends along a sidewall of the upper wiring trench),
the bottom portion of the upper liner extends along a bottom surface of the upper wiring trench (Fig. 5; [0021]-[0022]: the bottom portion of the upper liner 48 extends along a bottom surface of the upper wiring trench),
the upper liner includes cobalt (Co) ([0021]: the upper liner 48 includes cobalt (Co)),
the upper barrier film includes a sidewall portion extending along the sidewall of the upper wiring trench, and
the sidewall portion of the upper barrier film includes tantalum nitride (Fig. 5; [0021]-[0022]: 46).
Chou does not expressly teach tantalum nitride doped with ruthenium (Ru).
However, Kuo teaches (e.g., Figs. 6A-6B) a semiconductor device comprising a barrier layer comprising a tantalum nitride doped with ruthenium (Ru) ([0030]).
Therefore, it would have been obvious to a person of ordinary skill in the art at the time of the effective filing date to include in the device of Chou, the barrier layer comprising tantalum nitride doped with ruthenium (Ru), as taught by Kuo, for the benefits of allowing for a denser barrier layer that provides better protection against diffusion, and improving the thermal stability and the adhesion of the barrier layer (Kuo: [0030]).
Regarding claim 2: Chou and Kuo teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the bottom portion of the upper liner (Chou: 46) is in contact with the lower filling film (Chou: 24).
Regarding claim 3: Chou and Kuo teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the upper barrier film (Chou: 46) further includes a bottom portion extending along the bottom surface of the upper wiring trench (Chou: Fig. 6; bottom portion of upper barrier film 46 extending along the bottom surface of the upper wiring trench 36), and
the bottom portion of the upper barrier film includes tantalum nitride (Chou: bottom portion of the upper barrier film 48 includes tantalum nitride [0021]: tantalum nitride, TaN ).
Regarding claim 5: Chou and Kuo teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the upper barrier film further includes a bottom portion extending along the bottom surface of the upper wiring trench (Chou: Fig. 5; [0021]-[0022]: the upper barrier film 46 further includes a bottom portion extending along the bottom surface of the upper wiring trench 36), the bottom portion of the upper barrier film includes tantalum nitride (Fig. 5; [0021]-[0022]: 46).
Chou does not expressly teach tantalum nitride doped with ruthenium (Ru).
However, Kuo teaches (e.g., Figs. 6A-6B) a semiconductor device comprising a barrier layer comprising a tantalum nitride doped with ruthenium (Ru) ([0030]).
Therefore, it would have been obvious to a person of ordinary skill in the art at the time of the effective filing date to include in the device of Chou, the barrier layer comprising tantalum nitride doped with ruthenium (Ru), as taught by Kuo, for the benefits of allowing for a denser barrier layer that provides better protection against diffusion, and improving the thermal stability and the adhesion of the barrier layer (Kuo: [0030]).
Regarding claim 6: Chou and Kuo teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the upper liner is cobalt (Chou: [0021]: the upper liner 48 includes cobalt (Co)).
Regarding claim 11: Chou and Kuo teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the upper surface of the lower filling film (Chou: 24) in contact with the upper wiring structure (Chou: [0021]: 52) has a planar shape in a cross-sectional view (Chou: Fig. 5, [0011]).
Claims 4 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Chou et al. (US 2020/0058544 A1) in view of Kuo et al. (US 2021/0391275 A1) as applied above and further in view of Kim et al. (US 2018/0261544 A1).
Regarding claim 4: Chou and Kuo teach the claim limitation of the semiconductor device of claim 3, on which this claim depends,
wherein a thickness of the sidewall portion of the upper barrier film is equal to or greater than a thickness of the bottom portion of the upper barrier film (Chou: the upper barrier film is equal to a thickness of the bottom portion of the upper barrier film; [0021]: the barrier layer 46 is uniformly deposit in the trench, from visual).
Alternatively, should the limitation “a thickness of the sidewall portion of the upper barrier film is equal to or greater than a thickness of the bottom portion of the upper barrier film” be interpreted as
“the sidewall portion of the upper barrier film and the bottom portion of the upper barrier film considered deposited sequentially, with the possibility of different thicknesses, then Kim teaches this limitation as shown below:
Kim teaches (e.g., Figs. 7 and 10) a semiconductor device comprising an upper barrier portion ([0077]: 862C);
Kim further teaches that a thickness of the sidewall portion of the upper barrier film ([0077]: 862C) is equal to or greater than a thickness of the bottom portion of the upper barrier film (Fig. 10; [0077]: bottom portion of upper barrier film 862C).
Regarding claim 9: Chou and Kuo teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
Chou as modified by Kuo does not expressly teach that the sidewall portion of the upper barrier film is not in contact with the lower capping film.
Kim teaches (e.g., Fig. 3) a semiconductor device comprising an upper barrier film ([0055]: 162) and a lower capping layer ([0046] and [0055]: 150; [0055]: “referring to FIG. 3, the integrated circuit device 300 has substantially the same structure as the integrated circuit device 100 of FIG. 1A”);
Kim further teaches that the sidewall portion of the upper barrier film ([0055]: 162) is not in contact with the lower capping film ([0046] and [0055]: 150; [0055]: “referring to FIG. 3, the integrated circuit device 300 has substantially the same structure as the integrated circuit device 100 of FIG. 1A”).
Therefore, it would have been obvious to a person of ordinary skill in the art at the time of the effective filing date to include in the device of Chou as modified by Kuo, the sidewall portion of the upper barrier film being not in contact with the lower capping film, as taught by Kim, for the benefits of controlling the adhesion of the filled interconnect layer to the sidewalls of the trench, and thus improve interconnect reliability.
Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Chou et al. (US 2020/0058544 A1) in view of Kuo et al. (US 2021/0391275 A1) as applied above and further in view of Wu et al. (US 2018/0211872 A1).
Regarding claim 7: Chou and Kuo teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
wherein the upper liner includes cobalt (Chou: [0021]: upper liner 48 includes cobalt).
Chou as modified by Kuo does not expressly teach cobalt doped with ruthenium.
Wu teaches (e.g., Fig. 5) a semiconductor device comprising a liner including cobalt doped with ruthenium ([0060]).
Therefore, it would have been obvious to a person of ordinary skill in the art at the time of the effective filing date to include in the device of Chou as modified by Kuo, the liner including cobalt doped with ruthenium, as taught by Wu, for the benefits of reducing cobalt agglomeration and thus improving via conformal coverage and therefore, reducing interconnect resistance, which in turn, increase signal speed during operation.
Regarding claim 8: Chou and Kuo and Wu teach the claim limitation of the semiconductor device of claim 7, on which this claim depends,
Chou as modified by Kuo teaches that
the sidewall portion of the upper liner includes cobalt doped with ruthenium (Wu: [0060]), and
the bottom portion of the upper liner includes cobalt (Chou: [0021]).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Chou et al. (US 2020/0058544 A1) in view of Kuo et al. (US 2021/0391275 A1) as applied above and further in view of Hsueh et al. (US 2021/0287994 A1).
Regarding claim 10: Chou and Kuo teach the claim limitation of the semiconductor device of claim 1, on which this claim depends,
Chou as modified by Kuo does not expressly teach that the upper surface of the lower filling film in contact with the upper wiring structure has a concave curved shape in a cross-sectional view.
Hsueh teaches (e.g., Fig. 4B and 5B) a semiconductor device comprising a lower filling film ([0047]: 110) and an upper wiring structure ([0047] and [0051]: 116/114),
Hsueh further teaches that the upper surface of the lower filling film ([0047]: 110) in contact with the upper wiring structure ([0047] and [0051]: 116/114) has a concave curved shape in a cross-sectional view (Fig. 5B; [0047]: protrusion 120p creates a concave curved shape in a cross-sectional view of the upper surface of the lower filling film).
Therefore, it would have been obvious to a person of ordinary skill in the art at the time of the effective filing date to include in the device of Chou as modified by Kuo, the upper surface of the lower filling film in contact with the upper wiring structure having a concave curved shape in a cross-sectional view, as taught by Hsueh, for the benefits of increasing the adhesion of the upper wiring to the lower wiring, since it creates an anchoring structure, thus improving interconnection reliability.
Allowable Subject Matter
Claims 12-20 are allowable.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 12: the cited prior art of record, either singly or in proper combination, does not teach or make obvious, along with the other claimed features a semiconductor device comprising:
“the sidewall portion of the upper barrier structure includes tantalum nitride (TaN) doped with ruthenium (Ru), and
the bottom portion of the upper barrier structure does not include tantalum nitride doped with ruthenium”.
Claims 13-17 depend from claim 12, and therefore, are allowable for the same reason as claim 12.
Regarding claim 19: the cited prior art of record, either singly or in proper combination, does not teach or make obvious, along with the other claimed features a semiconductor device comprising:
“the sidewall portion of the upper liner includes cobalt doped with ruthenium,
the bottom portion of the upper liner does not include cobalt doped with ruthenium, the upper barrier film includes a sidewall portion extending along the sidewalls of the upper wiring trench,
the sidewall portion of the upper barrier film includes tantalum nitride doped with ruthenium (Ru), and the sidewall portion of the upper barrier film is not in contact with the lower capping film”.
Claim 20 depends from claim 19, and therefore, are allowable for the same reason as claim 19.
Conclusion
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/HERVE-LOUIS Y ASSOUMAN/Examiner, Art Unit 2812