DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This OA is in response to the amendment filled on 12/22/2025 that has been entered, wherein claims 1-9 are pending.
Specification
The objection to the specification is withdrawn in light of Applicant’s amendment of 12/22/2025.
Claim Rejections - 35 USC § 112
The objection to claims 6-8 is withdrawn in light of Applicant’s amendment of 12/22/2025.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-4 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Karp et al. (US 2020/0066837 A1) in view of Kanda et al. (US 2014/0131860 A1) as cited in the IDS of 7/14/2023 of record.
Regarding claim 1, Karp teaches a semiconductor device(Fig. 2) comprising:
a semiconductor substrate(202, ¶0029) that is of a first conductive type(P) and that has a first main surface and a second main surface opposed to the first main surface;
a first well(210, ¶0030) that is of a second conductive type(N) and that is on a first main surface side of the semiconductor substrate(202, ¶0029);
a field effect transistor(204, ¶0029) that is in the first well(210, ¶0030);
a second well(224, ¶0031) that is of the first conductive type(P), that is on the first main surface side of the semiconductor substrate(202, ¶0029), and that surrounds the first well(210, ¶0030) in a plan view of the semiconductor substrate(202, ¶0029); and
a first portion(242, ¶0033) that is on the second well(224, ¶0031).
Karp does not explicitly state a first metal portion(242, ¶0033). However, Karp disclose a first portion(242, ¶0033) that is a contact(¶0033). Metal is a well known in the art as a material for contacts(see Kanda ¶0037). Accordingly, It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a first metal portion, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. MPEP 2144.07
Regarding claim 2, Karp teaches the semiconductor device according to Claim 1, further comprising:
a second portion(242, ¶0033) that is on the field effect transistor(204, ¶0029).
Karp does not explicitly state a second metal portion(242, ¶0033). However, Karp disclose a second metal portion(242, ¶0033) that is a contact(¶0033). Metal is a well-known in the art as a material for contacts(see Kanda ¶0037). Accordingly, It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a second metal portion, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. MPEP 2144.07
Regarding claim 3, Karp teaches the semiconductor device according to Claim 2, but is not relied on to teach a third metal portion that connects the first metal portion(242, ¶0033) and the second metal portion(242, ¶0033) with each other, in a direction along the first main surface.
Kanda teaches a semiconductor device(10D, Fig. 9) comprising:
a third metal portion(25S, ¶0035) that connects the first metal portion(25H, ¶0037) and the second metal portion(25s, ¶0035) with each other, in a direction along the first main surface. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Karp, to include a third metal portion that connects the first metal portion and the second metal portion with each other, in a direction along the first main surface, as taught by Kanda, in order to connect the field effect transistor with a heat dissipation structure at the lowermost layer to rapidly conduct heat to the heat dissipation structure that has low thermal resistance(¶0062).
Regarding claim 4, Karp teaches the semiconductor device according to Claim 2, but is not relied on to teach a fourth metal portion that is between the second metal portion and the field effect transistor(204, ¶0029), that is connected with the second metal portion, and that has a larger area than the second metal portion in the plan view of the semiconductor substrate(202, ¶0029).
Kanda teaches a semiconductor device(10D, Fig. 9) comprising:
a fourth metal portion(24S, ¶0035) that is between the second metal portion(25s, ¶0035) and the field effect transistor(MOS transistor, 23, 21a, 21b, 22, ¶0030), that is connected with the second metal portion(25s, ¶0035), and that has a larger area than the second metal portion(25s, ¶0035) in the plan view of the semiconductor substrate(21, ¶0067). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Karp, to include a fourth metal portion that is between the second metal portion and the field effect transistor, that is connected with the second metal portion, and that has a larger area than the second metal portion in the plan view of the semiconductor substrate, as taught by Kanda, in order to connect the field effect transistor with a heat dissipation structure at the lowermost layer to rapidly conduct heat to the heat dissipation structure that has low thermal resistance(¶0062).
Regarding claim 9, Karp teaches the semiconductor device according to Claim 1, wherein the first conductive type(P) is a P-type conductive property(¶0029), and the second conductive type(N) is an N-type conductive property(¶0030).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Karp et al. (US 2020/0066837 A1) and Kanda et al. (US 2014/0131860 A1) as cited in the IDS of 7/14/2023 of record as applied to claim 1 above, further in view of Nakajima et al. (US 2010/0109052 A1) of record.
Regarding claim 5, Karp, in view of Kanda, teaches the semiconductor device according to Claim 1, further comprising:
a first circuit(204, ¶0029) that comprises the field effect transistor(204, ¶0029);
Karp and Kanda are not relied on to teach a second circuit that does not comprise the field effect transistor(204, ¶0029).
Nakajima teaches a semiconductor device(Fig. 5) comprising a second circuit(4, ¶0130) that does not comprise the field effect transistor(50a of chip 2, Fig. 25, ¶0213). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Karp, to include a second circuit that does not comprise the field effect transistor, as taught by Nakajima, in order to build a power amplifier module capable of using two frequency bands(¶0103) with improved heat dissipation properties, performance and reliability(¶0012).
Claims 6-8 are rejected under 35 U.S.C. 103 as being unpatentable over Karp et al. are(US 2020/0066837 A1) and Kanda et al. (US 2014/0131860 A1) as cited in the IDS of 7/14/2023 of record as applied to claim 1 above, further in view of Mochizuki (JP 2017126668 A) as cited in the IDS of 7/14/2023 of record.
Regarding claim 6, Karp, in view of Kanda, teaches a semiconductor module comprising:
the semiconductor device according to Claim 1(please see claim 1 above).
Karp and Kanda are not relied on to teach a laminated substrate that has a via connected with the first metal portion(242, ¶0033).
Mochizuki teaches a semiconductor module(Fig. 1) comprising a laminated substrate(3, ¶0022) that has a via(31, ¶0020) connected with the first metal portion(7, ¶0013). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Karp, to include a laminated substrate that has a via connected with a metal portion, as taught by Mochizuki, in order to efficiently transfer heat to the laminated substrate from the semiconductor substrate(¶0025) and to increase the mechanical strength of the substrate and the heat radiating/cooling performance(¶0022).
Regarding claim 7, Karp, in view of Kanda, teaches the semiconductor module according to Claim 6, but is not relied on to teach a heat dissipation member that has an opening on a laminated substrate side of the semiconductor module, and that covers the field effect transistor(204, ¶0029), wherein the laminated substrate has a via that is connected with an end portion on the laminated substrate side of the heat dissipation member.
Mochizuki teaches a semiconductor module(Fig. 1) comprising a heat dissipation member(4, ¶0015) that has an opening on a laminated substrate side(3A) of the semiconductor module, and that covers the field effect transistor(MOS transistor, 23, 21a, 21b, 22, ¶0030),
wherein the laminated substrate(3, ¶0022) has a via(31a, ¶0020) that is connected with an end portion on the laminated substrate side(3A) of the heat dissipation member(4, ¶0015). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Karp, to include a heat dissipation member that has an opening on a laminated substrate side of the semiconductor module, and that covers the field effect transistor, wherein the laminated substrate has a via that is connected with an end portion on the laminated substrate side of the heat dissipation member, as taught by Mochizuki, in order to efficiently transfer heat to the laminated substrate from the semiconductor substrate(¶0025) and to increase the mechanical strength of the substrate and the heat radiating/cooling performance(¶0022).
Regarding claim 8, Karp, in view of Kanda, teaches the semiconductor module according to Claim 7, but is not relied on to teach the heat dissipation member is a metal material.
Mochizuki teaches a semiconductor module(Fig. 1) wherein the heat dissipation member(4, ¶0015) is a metal material(¶0015). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Karp, so that the heat dissipation member is a metal material, as taught by Mochizuki, in order to efficiently transfer heat to the laminated substrate from the semiconductor substrate(¶0025) and to increase the mechanical strength of the substrate and the heat radiating/cooling performance(¶0022).
Response to Arguments
Applicant’s arguments with respect to claim 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAURA DYKES whose telephone number is (571)270-3161. The examiner can normally be reached M-F 9:30 am-5 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at 571-272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LAURA M DYKES/Examiner, Art Unit 2892
/NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892
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