Prosecution Insights
Last updated: April 19, 2026
Application No. 18/352,833

SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME

Non-Final OA §102§103
Filed
Jul 14, 2023
Examiner
LE, THAO P
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
National Taiwan University
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
2y 0m
To Grant
91%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allow Rate
740 granted / 800 resolved
+24.5% vs TC avg
Minimal -1% lift
Without
With
+-1.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
15 currently pending
Career history
815
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
40.5%
+0.5% vs TC avg
§102
42.3%
+2.3% vs TC avg
§112
3.4%
-36.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 800 resolved cases

Office Action

§102 §103
DETAILED ACTION Election/Restrictions Applicant’s election without traverse of claims 16-20 and newly added claims 21-35 in the reply filed on 11/12/2025 is acknowledged. Information Disclosure Statement The information disclosure statement (IDS) submitted on 07/14/23 filed after the mailing date of the application. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 28-29 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Dewey et al., U.S. Publication No. 2020/0098887. Regarding claim 28, Dewey discloses a method, comprising (See Figs. 1, 2(a)-2(b)): forming a first 2-D material channel 203 over a substrate 201, forming first interlayer electrodes 205 over source/drain regions of the channel layer ([0030] – the metal carbides such as hafnium carbide and zirconium carbine are multiple metal layers, so could broadly be plural electrodes), forming a second channel layer 209 over the first channel layer and covering the first interlayer electrodes, and forming a gate electrode 211, 217 over the second 2-D material channel layer. Regarding claim 29, Dewey discloses wherein the interlayer electrodes are made of metal [0030]. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 30 is rejected under 35 U.S.C. 103 as being unpatentable over Dewey et al., U.S. Publication No. 2020/0098887, in view of Son et al., U.S. Patent No. 11,569,367. Regarding claim 30, Dewey fails to disclose that the interlayer electrode is made of graphene. Son discloses the interlayer electrode is made of graphene (Fig. 1). It would have been obvious to one having ordinary skill in the art at the time the invention was made to use graphene in Son as interlayer electrode in the method of Dewey because graphene is extremely high in electrical conductivity and extremely high in thermal conductivity. Claims 31 and 32 are rejected under 35 U.S.C. 103 as being unpatentable over Dewey et al., U.S. Publication No. 2020/0098887, in view of Goldsmith et al.., U.S. Publication No. 2022/0155289. Regarding claim 31, Dewey fails to disclose the method of claim 28, further comprising forming 2-D material electrodes over the substrate, wherein the first 2-D material channel layer is formed over the 2-D material electrodes. Goldsmith discloses forming electrodes 22, 24 over a substrate and forming the channel layer 26 over the material electrodes (Fig. 4C). It would have been obvious to one having ordinary skill in the art at the time the invention was made to form channel layer over electrode material (source/drain) in order to improve current flow and provide a low-resistance path, and for easy connectivity. Regarding claim 32, Dewey discloses wherein the first interlayer electrodes vertically overlaps the 2-D material electrodes (Fig. 2a). Allowable Subject Matter Claim 35 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior made of record and considered pertinent to the applicant’s disclosure does not teach or suggest the claimed limitations having the method of claim 28, further comprising: forming second interlayer electrodes over source/drain regions of the second 2-D material channel layer, and forming a third 2-D material channel layer over the second 2-D material channel layer and covering the second interlayer electrodes. Claim 33-34 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior made of record and considered pertinent to the applicant’s disclosure does not teach or suggest the claimed limitations having the method of claim 28, wherein the second 2-D material channel layer interfaces the first 2-D material channel layer (Claim 33), wherein the second 2-D material channel layer interfaces sidewalls of the first interlayer electrodes (Claim 34). Claims 16-20 are allowed. The following is an examiner’s statement of reason for allowance: None of the references of record teaches or suggests the claimed having a method comprising: forming a graphene layer over a substrate, patterning the graphene layer such that the patterned graphene layer has two separated portions, forming a channel layer over the substrate covering the two separated portions of the patterned graphene layer, forming metal electrodes over the source/drain regions (claim 16). Claims 21-27 are allowed. The following is an examiner’s statement of reason for allowance: None of the references of record teaches or suggests the claimed having a method comprising: forming an electrode layer over a substrate, patterning the electrode layer to form first source/drain electrodes spaced apart from each other, depositing channel layer over the source/drain electrodes, forming second source/drain electrodes over the channel layer, and forming a gate electrode over the channel layer (Claim 21). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to THAO P LE whose telephone number is (571)272-1785. The examiner can normally be reached on Monday-Friday 9AM-6PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached on 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 703-872-9306. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /THAO P LE/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Jul 14, 2023
Application Filed
Jan 10, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
91%
With Interview (-1.3%)
2y 0m
Median Time to Grant
Low
PTA Risk
Based on 800 resolved cases by this examiner. Grant probability derived from career allow rate.

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