DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-19 & 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20190165208) in view of Wang et al. (US 20210343913).
Regarding claim 1, Kim discloses that an optoelectronic semiconductor device, comprising:
an stack comprising a first semiconductor structure 111, an active structure 112 on the first semiconductor structure 111, and a second semiconductor structure 113 on the active structure 112, wherein the stack has a first portion and a second portion, and the second semiconductor structure of the first portion is separated from the second semiconductor structure of the second portion (Fig. 2);
a recess 110a located between the first portion and the second portion;
a first contact structure 140 located in the concave recess; and
a first electrode 120 covering the first contact structure 140 , wherein when the optoelectronic semiconductor device is operating, the first portion does not emit light (Fig. 2 & 6).
Kim fails to teach that a stack is an epitaxial stack
However, Wang suggests that a stack can be an epitaxial stack (para. 0020).
Therefore, it would have been obvious to one of ordinary skill in the art before effective filing date of applicant(s) claimed invention was made to provide Kim with an epitaxial stack as taught by Wang in order to enhance variation of forming methods and also, the claim would have been obvious because a particular know technique was recognized as part of the ordinary capabilities of one skilled in the art.
Reclaim 2, Kim & Wang disclose that the recess comprises a trench and a concave portion, and the concave portion is located on a side of the first portion close to the second portion (Kim, Fig. 2 & 6).
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Reclaim 3, Kim & Wang disclose that when viewed in a top view, the optoelectronic semiconductor device has a first area, the second portion has a second area, and the second area is 3% to 90% of the first area (Kim, Fig. 1 & 6).
Reclaim 4, Kim & Wang disclose that when viewed in the top view, the first portion has a third area, and the third area is 1% to 70% of the first area (Kim, Fig. 1 & 6).
Reclaim 5, Kim & Wang disclose that when viewed in the top view, the second portion has a perimeter, and a ratio of the perimeter to the second area is 0.05 to 0.6 (Fig. 1, Kim).
Reclaim 6, Kim & Wang disclose that the first electrode overlaps the first portion in a vertical direction (Fig. 6).
Reclaim 7, Kim & Wang disclose that the first electrode overlaps the second portion in the vertical direction (Fig. 6).
Reclaim 8, Kim & Wang disclose that the recess comprises a trench and a concave portion, and the concave portion is located on a side of the first portion away from the trench (Fig. 2 & 6).
Reclaim 9, Kim & Wang disclose that when viewed in a top view, a side of the second semiconductor structure close to the concave portion has a first width, a side of the second semiconductor structure away from the concave portion has a second width, and the second width is greater than the first width (Kim, Fig. 1, 2, & 6).
Reclaim 10, Kim & Wang disclose that an insulating layer 165 located on the epitaxial stack and not in direct contact with the first contact structure (Kim, Fig. 2).
Reclaim 11, Kim & Wang disclose that a second contact structure 150 located on the second portion (Fig. 2).
Reclaim 12, Kim & Wang disclose that a second electrode 160 located on the second contact structure 150 and covering the second contact structure (Fig. 2, Kim).
Reclaim 13, Kim & Wang disclose that an insulating layer 165 located on the epitaxial stack 110 (Kim in view of Wang), and having a first opening in the recess concave portion and a second opening in the second portion, wherein the first contact structure is located in the first opening and the second contact structure is located in the second opening (Fig. 1, Kim).
Reclaim 14, Kim & Wang disclose that an area of a projection of the first opening on the first semiconductor structure overlaps with an area of a projection of the first contact structure on the first semiconductor structure (Fig. 1, 2, & 6, Kim).
Reclaim 15, Kim & Wang disclose that the first contact structure 140 is in direct contact with the active structure or the second semiconductor structure of the first portion(Fig. 1, 2, & 6, Kim).
Reclaim 16, Kim & Wang disclose that the first electrode is in direct contact with the active structure or the second semiconductor structure of the first portion (Fig. 1, 2, & 6, Kim).
Reclaim 17, Kim & Wang disclose that the first electrode covers the trench (Fig. 1, 2, & 6, Kim).
Reclaim 18, Kim & Wang disclose that the first electrode has a distance with the trench (Fig. 1, 2, & 6, Kim).
Reclaim 19, Kim & Wang fail to specify that a distance between the second semiconductor structure of the first portion and that of the second portion is 0.1 µm to 30 µm.
However, notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization.
Before effective filing date of the invention it would have been obvious to a person of ordinary skill in the art to use a certain distance between the second semiconductor structure of the first portion and that of the second portion, because it would have been to obtain a certain distance between the second semiconductor structure of the first portion and that of the second portion to achieve controlling brightness of LED device.
Reclaim 21, Kim & Wang disclose that when viewed in a top view, the second semiconductor structure of the first portion comprises an area less than an area of the second semiconductor structure of the second portion (Kim, due to a shape of stack structure).
Response to Arguments
Applicant’s arguments with respect to claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SU C KIM whose telephone number is (571)272-5972. The examiner can normally be reached M-F 9:00 to 5:00.
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/SU C KIM/ Primary Examiner, Art Unit 2899