DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings were received on April 6, 2025. These drawings are acceptable.
Claim Objections
Claim 5 is objected to because of the following informalities: “Or” should read “and” (claim 5, line 2). Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 28-30 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There is no support in the specification for the claim limitations of “the gate electrode includes a high-k dielectric film having a dielectric constant greater than that of silicon dioxide”, as recited in claim 28; “a contact resistance of the IGTO film is less than or equal to 200 ohms”, as recited in claim 29; and “a contact resistivity of the IGTO film is less than or equal to 10^-4.5 ohms/square centimeter”, as recited in claim 30.
Claims 28-30 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. There is no support in the specification for the claim limitations of “the gate electrode includes a high-k dielectric film having a dielectric constant greater than that of silicon dioxide”, as recited in claim 28; “a contact resistance of the IGTO film is less than or equal to 200 ohms”, as recited in claim 29; and “a contact resistivity of the IGTO film is less than or equal to 10^-4.5 ohms/square centimeter”, as recited in claim 30 because the disclosure does not enable an artisan to have the gate electrode (conductive material) including a high-k dielectric film; and the IGTO alone having a contact resistance and a contact resistivity (note: a contact resistance and/or a contact resistivity requires an electrical contact/interface between two materials, without an interface, there is no contact resistance and/or a contact resistivity to measure).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1, 2, 4-6, 8 and 21-32, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Jeong et al. (2013/0001566) in view of Sharma et al. (2019/0259844).
As for claims 1, 2, 5, 6, 21 and 32, Jeong et al. show in Fig. 13 and related text a field-effect transistor TFT, comprising:
an insulating barrier layer 12 on a substrate 1;
an oxide semiconductor layer 23 on the insulating barrier layer and including at least one metal element selected from indium (In) and zinc (Zn) ([0044]),
a gate insulating layer 14 covering opposite side surfaces of and a top surface of the oxide semiconductor layer;
a gate electrode 25 on the gate insulating layer; and
a source structure 21 and a drain structure 22 separated from each other, the source structure and the drain structure being configured to be electrically connected to the oxide semiconductor layer,
wherein each of the source structure and the drain structure includes:
a conductive oxide film 211/221,
a conductive film 21b/22b on the IGTO film, and
one of a source electrode 21a and a drain electrode 22a on the conductive film.
Jeong et al. do not disclose the conductive oxide film is an indium gallium tin oxide (IGTO) film, the conductive film is a conductive metal nitride film (claim 1); a thickness of the IGTO film is 5 nm to 12 nm (claim 2); the conductive metal nitride film includes at least one of titanium nitride (TiN) or tantalum nitride (TaN) (claim 5); a thickness of the conductive metal nitride film is 2 nm to 4 nm (claim 6); a thickness of the conductive oxide film is 8 nm (claim 21); and a thickness of the conductive metal nitride film is 3 nm (claim 32).
Sharma et al. show in Figs. 1D, 2A and related text:
As for claim 1, each of the source structure 110 and the drain structure 110 includes:
an indium gallium tin oxide (IGTO) film (outer portion of) 108 ([0027]: mixture of indium gallium zinc tin oxide and titanium nitride),
a conductive metal nitride film (inner portion of) 108 on the IGTO film, and
one of a source electrode 104 and a drain electrode 106 on the conductive film (Fig. 1D).
As for claim 2, a thickness of the IGTO film is 5 nm to 12 nm ([0029]-[0030]).
As for claim 5, the conductive metal nitride film includes at least one of titanium nitride (TiN) or tantalum nitride (TaN) ([0027]).
As for claim 6, a thickness of the conductive metal nitride film is 5 nm to 12 nm ([0029]-[0030]).
As for claim 21, the thickness of the IGTO film is 8 nm ([0029]-[0030]).
As for claim 32, a thickness of the conductive metal nitride film is 3 nm ([0029]-[0030]).
Jeong et al. and Sharma et al. are analogous art because they are directed to a FET and one of ordinary skill in the art would have had a reasonable expectation of success to modify Jeong et al. with the specified feature(s) of Sharma et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to includes IGTO film and a conductive metal nitride film on the IGTO, as parts of each of the source structure and the drain structure; a thickness of the IGTO film being 5 nm to 12 nm; the conductive metal nitride film including at least one of titanium nitride (TiN) or tantalum nitride (TaN); a thickness of the conductive metal nitride film being 2 nm to 4 nm; a thickness of the conductive oxide film being 8 nm, as taught by Sharma et al., in Jeong et al.'s device, in order to reduce infiltration of oxygen and hydrogen into the S/D electrodes, improve quality and optimize the performance of the device.
Furthermore, it has been held that where then general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Furthermore, it has been held in that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
As for claim 4, the combined device shows the oxide semiconductor layer further includes gallium (Ga) (Jeong: [0044]).
As for claim 8, the combined device shows the gate insulating layer includes silicon oxide (SiO2) (Jeong: [0094]).
As for claim 22, the combined device shows the IGTO film contacts the oxide semiconductor layer (Jeong: Fig. 13 combined with Sharma: Figs. 1D and 2A).
As for claim 23, the combined device shows the IGTO film contacts the gate insulating layer (Jeong: Fig. 13 combined with Sharma: Figs. 1D and 2A).
As for claim 24, the combined device shows the IGTO film contacts the gate insulating layer and the oxide semiconductor layer (Jeong: Fig. 13 combined with Sharma: Figs. 1D and 2A).
As for claim 25, the combined device shows the drain electrode contacts the substrate (Jeong: Fig. 13).
As for claim 26, the combined device shows the insulating barrier layer surrounds the drain electrode (Jeong: Fig. 13).
As for claim 27, the combined device shows the substrate includes a glass material (Jeong: [0029]).
As for claim 28, the combined device shows the gate electrode includes a high-k dielectric film having a dielectric constant greater than that of silicon dioxide (Jeong: [0094]).
As for claims 29-31, Jeong et al. and Sharma et al. disclosed substantially the entire claimed invention, as applied to claim 1 above, except a contact resistance of the IGTO film is less than or equal to 200 ohms (claim 29); a contact resistivity of the IGTO film is less than or equal to 10^-4.5 ohms/square centimeter (claim 30); and a carrier concentration of the IGTO film is greater than or equal to 10^18 carriers per cubic centimeter (claim 31).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include a contact resistance of the IGTO film is less than or equal to 200 ohms; a contact resistivity of the IGTO film is less than or equal to 10^-4.5 ohms/square centimeter; and a carrier concentration of the IGTO film is greater than or equal to 10^18 carriers per cubic centimeter, in Jeong et al. and Sharma et al.'s device, in order to optimize the performance of the device. Furthermore, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Furthermore, it has been held in that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
Claim(s) 3, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Jeong et al. (2013/0001566) and Sharma et al. (2019/0259844) in view of Tao et al. (2019/0177230).
Jeong et al. and Sharma et al. disclosed substantially the entire claimed invention, as applied to claim 1 above, except the IGTO film has a tin concentration of at least 20 at%.
Tao et al. teach in Fig. 1 and related text the IGTO film 10 has a tin concentration of at least 20 at% ([0114], [0058]).
Jeong et al., Sharma et al. and Tao et al. are analogous art because they are directed to a metal semiconductor oxide film and one of ordinary skill in the art would have had a reasonable expectation of success to modify Jeong et al. and Sharma et al. with the specified feature(s) of Tao et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include the IGTO film having a tin concentration of at least 20 at%, as taught by Tao et al., in Jeong et al. and Sharma et al.’s device, in order to improve the etchant resistance of the oxide semiconductor thin film (Tao: [0058]).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-6 and 8 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
/MEIYA LI/Primary Examiner, Art Unit 2811
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