Prosecution Insights
Last updated: April 18, 2026
Application No. 18/354,118

ELECTRONIC DEVICE AND FORMING METHOD THEREOF

Final Rejection §102
Filed
Jul 18, 2023
Examiner
ALBRECHT, PETER M
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Carux Technology Pte. Ltd.
OA Round
2 (Final)
70%
Grant Probability
Favorable
3-4
OA Rounds
2y 10m
To Grant
73%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allow Rate
332 granted / 475 resolved
+1.9% vs TC avg
Minimal +3% lift
Without
With
+2.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
30 currently pending
Career history
505
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
41.5%
+1.5% vs TC avg
§102
25.6%
-14.4% vs TC avg
§112
30.0%
-10.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 475 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement(s) submitted on July 18, 2023 is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered by the examiner. Specification The disclosure is objected to because of the following informalities: In paragraph [0044], all instances of “um” must be corrected to “[Symbol font/0x6D]m”; In paragraph [0061], all instances of “um” and “um2” must be corrected to “[Symbol font/0x6D]m” and “[Symbol font/0x6D]m2” respectively. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2018/0373079 A1 (hereinafter “Yeh”). Regarding claim 1, Yeh discloses in Figs. 8A-8D and related text an electronic device, comprising: a substrate (301; [0073]); a metal layer (330; [0077]) disposed on the substrate and comprising a sensing line (333, 334; [0077]) and a drain electrode (331D; [0077]); a first insulating layer (340; [0078]; note: reference numeral 340 is present in Figs. 6A and 7A but is omitted from Fig. 8A) disposed on the metal layer; a first conductive layer (a transparent conductive layer such as an indium tin oxide (ITO) layer; [0078] and [0089]) disposed on the first insulating layer and comprising a touch electrode (350; [0003] and [0078]); a second insulating layer (360; [0079]) disposed on the first conductive layer; and a second conductive layer (370; [0082]) disposed on the second insulating layer and comprising a conductive pattern (371; [0083]); wherein the conductive pattern is electrically connected to the sensing line and the touch electrode ([0083]-[0084]). Regarding claim 2, Yeh discloses the second insulating layer further comprises a first opening (363; Fig. 8A; [0080]), and the first opening exposes at least a portion of the sensing line and at least a portion of the touch electrode. Regarding claim 3, Yeh shows at least a portion of the conductive pattern covers the first opening (Fig. 8A). Regarding claim 4, Yeh discloses the second insulating layer further comprises a second opening (366; Fig. 8A; [0080]), and the second opening exposes at least a portion of the drain electrode. Regarding claim 5, Yeh discloses the second conductive layer further comprises a pixel electrode (372; Fig. 8A; [0083]), and at least a portion of the pixel electrode covers the second opening and is electrically connected to the drain electrode. Regarding claim 6, Yeh discloses a third insulating layer disposed between the first insulating layer and the first conductive layer (“one insulation layer [e.g., insulation layer 340] shown in the figures may include two or more than two insulation layers stacked with each other with different material” as described in paragraph [0090]). Regarding claim 7, Yeh shows the touch electrode covers a side surface (a top side surface) of the third insulating layer (Fig. 8A). Regarding claim 8, Yeh shows the touch electrode exposes a side surface (a lateral side surface) of the third insulating layer (Fig. 8A). Regarding claim 9, Yeh shows a projection of the third insulating layer on the substrate is located within a projection of the second insulating layer on the substrate (Fig. 8A). Regarding claim 10, Yeh shows a projection of the third insulating layer on the substrate partially overlaps a projection of the second insulating layer on the substrate (Fig. 8A). Regarding claim 11, Yeh discloses the second insulating layer further comprises a second opening (363; Fig. 8A; [0080]), and the second opening exposes a side surface (a lateral side surface) of the third insulating layer. Regarding claim 12, Yeh discloses the second insulating layer further comprises a second opening (366; Fig. 8A; [0080]), and the second opening does not expose the third insulating layer. Regarding claim 13, Yeh shows at least a portion of the first insulating layer and at least a portion of the second insulating layer are in direct contact (Fig. 8A). Regarding claim 14, Yeh shows the second insulating layer covers a side surface (a left side surface in Fig. 8A) of the touch electrode. Regarding claim 15, Yeh shows the second insulating layer exposes a side surface (a top side surface in Fig. 8A) of the touch electrode. Regarding claim 16, Yeh discloses in Figs. 8A-8D and related text an electronic device, comprising: a substrate (301; [0073]); a metal layer (330; [0077]) disposed on the substrate and comprising a sensing line (333, 334; [0077]); a first insulating layer (340; [0078]; note: reference numeral 340 is present in Figs. 6A and 7A but is omitted from Fig. 8A) disposed on the metal layer; a first conductive layer (a transparent conductive layer such as an indium tin oxide (ITO) layer; [0078] and [0089]) disposed on the first insulating layer and comprising a touch electrode (350; [0003] and [0078]); a second insulating layer (360; [0079]) disposed on the first conductive layer and comprising a first opening (363; [0080]); and a second conductive layer (370; [0082]) disposed on the second insulating layer; wherein the first opening exposes at least a portion of the sensing line and at least a portion of the touch electrode ([0080]). Regarding claim 17, Yeh discloses the metal layer further comprises a drain electrode (331D; Fig. 8A; [0077]), the second insulating layer further comprises a second opening (366; Fig. 8A; [0080]), and the second opening exposes at least a portion of the drain electrode. Regarding claim 18, Yeh discloses the second conductive layer further comprises a pixel electrode (372; Fig. 8A; [0083]), and at least a portion of the pixel electrode covers the second opening and is electrically connected to the drain electrode. Regarding claim 19, Yeh discloses a third insulating layer disposed between the first insulating layer and the first conductive layer (“one insulation layer [e.g., insulation layer 340] shown in the figures may include two or more than two insulation layers stacked with each other with different material” as described in paragraph [0090]). Regarding claim 20, Yeh discloses a method for forming an electronic device, comprising: forming a sensing line (333, 334; Fig. 5A; [0077]) on a substrate (301; [0073]; note: reference numeral 301 is present in Fig. 3A but is omitted from Fig. 5A); forming a first insulating layer (340; Fig. 6A; [0078]) on the sensing line; forming a touch electrode (350; Fig. 6A; [0003] and [0078]) on the first insulating layer; forming a second insulating layer (360; Fig. 7A; [0079]) on the touch electrode; removing a portion of the second insulating layer and a portion of the first insulating layer to expose the sensing line and the touch electrode ([0080]); and forming a conductive pattern (371; Fig. 8A; [0083]) on the second insulating layer, so that the conductive pattern is electrically connected to the sensing line and the touch electrode (Fig. 8D; [0083]-[0084]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER M ALBRECHT whose telephone number is (571)272-7813. The examiner can normally be reached M-F 9:30 AM - 6:30 PM (CT). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at (571) 272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PETER M ALBRECHT/Primary Examiner, Art Unit 2811
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Prosecution Timeline

Jul 18, 2023
Application Filed
Nov 15, 2025
Non-Final Rejection — §102
Mar 09, 2026
Response Filed
Apr 09, 2026
Final Rejection — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
70%
Grant Probability
73%
With Interview (+2.8%)
2y 10m
Median Time to Grant
Moderate
PTA Risk
Based on 475 resolved cases by this examiner. Grant probability derived from career allow rate.

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