DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed on October 27, 2023.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on July 18, 2023 is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: Memory Device With Barrier Interface Material
Election/Restrictions
Applicant’s election without traverse of Group I (claims 1-16) in the reply filed on November 7, 2025 is acknowledged.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jang (US 2014/0070300). Claim 1, Jang discloses (Fig. 3) a memory device, comprising: a first conductive layer (2nd left 344, first gate electrode, Para [0065], hereinafter “cond1”) extending in a first direction (cond1 extends in 3RD Direction) ; a second conductive layer (left 322, first filling layer pattern can be metal or doped polysilicon, Para [0085], hereinafter “cond2”) extending from the first conductive layer (cond2 extends from cond1) in a second direction (cond2 extends in 2ND Direction) intersecting the first direction (2nd Direction intersects 3rd Direction); a plurality of first channel structures (column of 252b, second channels, Para [0067], hereinafter “chan1”) penetrating the first conductive layer (chan1 penetrates cond1) and disposed to be spaced apart from each other in the first direction (each chan1 is spaced apart from other in the 3RD Direction); and a plurality of second channel structures (left column of 252a, channel, Para [0067], hereinafter “chan2”) penetrating the second conductive layer (chan2 penetrates cond2), wherein the first conductive layer (cond1) forms an interface (312, second barrier layer is interface layer between cond1 and cond2, Para [0091]) with the second conductive layer (312 is interface between cond1 and cond2), and wherein the interface (312) is disposed between the plurality of first channel structures and the plurality of second channel structures (portions of 312 are between chan1 and chan2). Claim 2, Jang discloses (Fig. 3) the memory device according to claim 1, wherein the interface (312) is formed along profiles of the plurality of first channel structures facing the second conductive layer (312 is formed along the profiles of 252b facing cond2). Claim 3, Jang discloses (Fig. 3) the memory device according to claim 1, wherein the interface (312) includes an uneven shape (since uneven is never specifically defined in the specification and circular shapes are shown, 312 which has a circular shape is considered uneven). Claim 4, Jang discloses (Fig. 3) the memory device according to claim 1, wherein the interface includes an arc shape (312 includes in arc shape).
Allowable Subject Matter
Claims 5-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the closest prior art of record, Jang (US 2014/0070300), Lee (US 2012/0037977), fail to disclose (by themselves or in combination) the following limitations in combination with the rest of the claim:
Regarding Claim 5 (from which claims 6-8 depend), a separation pattern spaced apart from the second conductive layer with the first conductive layer interposed therebetween, wherein the separation pattern is formed along profiles of the plurality of first channel structures facing the separation pattern.
Claims 9-16 are allowed.
The following is a statement of reasons for the indication of allowable subject matter: the closest prior art of record, Jang (US 2014/0070300), Lee (US 2012/0037977), fail to disclose (by themselves or in combination) the following limitations in combination with the rest of the claim:
Regarding Claim 9 (from which claims 10-16 depend), wherein the plurality of first cell conductive layers are disposed to be spaced apart from each other in the first direction to overlap the first select conductive layer, and the second cell conductive layer is configured to fill spaces between the plurality of first cell conductive layers…
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lee (US 2012/0037977) discloses (Fig. 1) first conductive layer GLS extending in first direction x, a second conductive layer BL extending in a second direction y intersecting x; a plurality of channel structures 60 penetrating GLs. Lee does not disclose where second channel structures penetrates BL.
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/G.G.R/Examiner, Art Unit 2812