DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claim 1-8,10,11-19,21-22 in the reply filed on 11/7/2025 is acknowledged.
Claims 9 and 20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 11/7/2025
Claim Objections
Claim 6 is objected to because of the following informalities: “non-display area NA” is not consistent with previously mentioned “ non-display area” in claim 1. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1,7,10,11,17, 18, 21 & 22 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kishimoto (US Pub no. 2021/00433868 A1)
Regarding claim 1, Kishimoto et al discloses A display apparatus comprising:
a display panel(DP) including a display area(DA) and a non-display area(NDA) surrounding the display area(DA) fig. 4[0044], wherein the non-display area( NDA)has a bendable area(BA) [0050]; a first backplate(FLM1) supporting at least the display area (DA)of the display panel(DP); and a second backplate (FLM2)spaced apart from the first backplate (FLM1)and supporting a portion of the non-display area (NDA)of the display panel[0052], wherein the display panel(DP) includes: a substrate(SUB)[0056]; an adhesive buffer layer( BL)disposed on the substrate (SUB)in the display area (DA)and the non-display area(NDA)[0075]; and first signal lines (CP1)disposed on the adhesive buffer layer(BL) and extending across
the bendable area fig. 5 wherein the adhesive buffer layer(BL) is disposed on an upper surface of the substrate(SUB) in the bendable area(BA) fig. 5.
Regarding claim 7, Kishimoto et al discloses wherein the display panel (DP) further includes: a pixel circuit (PX) disposed on the adhesive buffer layer (BL)in the display area(DA)[0064]; and a planarization layer (30)surrounding a side surface of the pixel circuit(PX) fig. 5[0078].
Regarding claim 10, Kishimoto et al discloses wherein the substrate(SUB) includes a single layer made of a polymer material [0049].
Regarding claim 11, Kishimoto et al discloses A display apparatus, comprising:
a display panel (DP)including a first area(DA), a second area(NDA), and a third, bendable area(BA) between the first area(DA) and the second area(NDA) [0044][0050];
a first backplate(FLM1) supporting the first area(DA) of the display panel; and
a second backplate (FLM2)spaced apart from the first backplate(FLM1) and supporting the second area (NDA)of the display panel[0052], wherein the display panel(DP) includes: a substrate(SUB) [0056]; an adhesive buffer layer(BL) disposed on the substrate(SUB) in the third, bendable area(BA) of the display panel (DP)(fig. 5); and first signal lines(CP1) disposed on the adhesive buffer layer(BL) and extending across the third, bendable area(BA) fig. 5.
Regarding claim 17, Kishimoto et al discloses wherein the adhesive buffer layer (BL) is disposed in entirety of the first area(DA), the second area(NDA), and the third area(BA) fig. 4/ 5.
Regarding claim 18, Kishimoto et al discloses wherein the first area (DA)includes a display area of the display panel (DP), and a non-display area (NDA)of the display panel includes the second area (NDA)and the third area(BA) fig. 4/ fig. 5.
Regarding claim 21, Kishimoto et al discloses wherein the substrate(SUB) includes a single layer made of a polymer material [0049].
Regarding claim 22, Kishimoto et al discloses wherein the adhesive buffer layer (BL)is disposed directly on the substrate(SUB) in the third area(BA), and the first signal lines(CP1) are disposed directly on the adhesive buffer layer(BL) fig. 4/ fig. 5.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2, 4, and 12 & 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kishimoto (US Pub no. 2021/00433868 A1) in view of Jin (US Pub no. 2021/0118336 A1)
Regarding claim 2, Kishimoto et al discloses all the claim limitations of claim 1 but fails to teach wherein the adhesive buffer layer has a storage modulus lower than a storage modulus of a polymer material constituting the substrate.
However, Jin et al teaches a first passivation layer (SNL-Examiner notes adhesion is a characteristics of the material since separation does not occur [0126]) protect a substrate from external moisture[0073] and further teaches that the first passivation layer (SNL) may adjust the position of the stress neutral plane of the substrate in the bent region (BA) by adjust thickness and modulus of the passivation layer(SNL)[0074] but fails to teach wherein the adhesive buffer layer has a storage modulus lower than a storage modulus of a polymer material constituting the substrate. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to adjust the modulus of the passivation layer(adhesion layer) such that the adhesive buffer layer has a storage modulus lower than a storage modulus of a polymer material constituting the substrate through routine experimentation to optimize stress. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Kishimoto et al with the teachings of Jin et al to prevent separation.
Regarding claim 4, Kishimoto et al discloses all the claim limitations of claim 1 but fails to teach wherein the adhesive buffer layer has a thickness in a range of 0.5 µm to 3.0 µm.
However, Jin et al teaches a passivation layer (SNL-Examiner notes adhesion is a characteristics of the material since separation does not occur [0126]) having a thickness [0076]but fails to teach a thickness in a range of 0.5 µm to 3.0 µm. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to achieve a thickness in a range of 0.5 µm to 3.0 µm through routine experimentation. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Regarding claim 12, Kishimoto et al discloses all the claim limitations of claim 11 but fails to teach wherein the adhesive buffer layer has a storage modulus lower than a storage modulus of a polymer material constituting the substrate.
However, Jin et al teaches a first passivation layer (SNL-Examiner notes adhesion is a characteristics of the material since separation does not occur [0126])protect a substrate from external moisture[0073] and further teaches that the first passivation layer (SNL) may adjust the position of the stress neutral plane of the substrate in the bent region (BA) by adjust thickness and modulus of the passivation layer(SNL)[0074] but fails to teach wherein the adhesive buffer layer has a storage modulus lower than a storage modulus of a polymer material constituting the substrate. However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to adjust the modulus of the passivation layer such that the adhesive buffer layer has a storage modulus lower than a storage modulus of a polymer material constituting the substrate through routine experimentation to optimize stress of the layer. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Furthermore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Kishimoto et al with the teachings of Jin et al to prevent separation.
Regarding claim 14, Kishimoto et al discloses all the claim limitations of claim 11 but fails to teach wherein the adhesive buffer layer has a thickness in a range of 0.5 µm to 3.0 µm.
However, Jin et al teaches a passivation layer (SNL-Examiner notes adhesion is a characteristics of the material since separation does not occur [0126]) having a thickness [0076]but fails to teach a thickness in a range of 0.5 µm to 3.0 µm. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to achieve a thickness in a range of 0.5 µm to 3.0 µm through routine experimentation. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Claim(s) 3, 8, 13, & 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kishimoto (US Pub no. 2021/00433868 A1) in view of Lee (US Pub no. 2024/0215190 A1)
Regarding claim 3, Kishimoto et al discloses all the claim limitations of claim 1 but fails to teach wherein the adhesive buffer layer has a storage modulus in a range of 0.01 MPa to 1,000 MPa at 25 °C.
However, Lee et al teaches adhesive buffer layer has a storage modulus in a range of 0.01 MPa to 1,000 MPa at 25 °C[0053]. It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the invention of Kishimoto et al with the teachings of Lee et al to suppress cracks in the bending area.
Regarding claim 8, Kishimoto et al discloses all the claim limitations of claim 1 but fails to teach wherein the planarization layer extends into the non- display area,
wherein an end of the planarization layer in the non-display area is spaced apart from
an end of the first backplate in the non-display area by a distance of 60 µm or greater.
However, Lee et al discloses a display panel wherein the planarization layer 145)extends into the non- display area(NA), wherein an end of the planarization layer (145)in the non-display area is spaced apart from an end of the first backplate (130L)in the non-display area by a distance of 60 µm or greater[0084-0085]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Kishimoto et al with the teachings of Lee et al to prevent larger amount of stress in the bendable area.
Regarding claim 13, Kishimoto et al discloses all the claim limitations of claim 11 but fails to teach wherein the adhesive buffer layer has a storage modulus in a range of 0.01 MPa to 1,000 MPa at 25 °C.
However, Lee et al teaches adhesive buffer layer has a storage modulus in a range of 0.01 MPa to 1,000 MPa at 25 °C[0053]. It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the invention of Kishimoto et al with the teachings of Lee et al to suppress cracks in the bending area. Regarding claim 19, Kishimoto et al discloses all the claim limitations of claim 11and further teaches a pixel circuit (PX)disposed on the adhesive buffer layer (BL)in the first area(DA) fig. 5 but fails to teach wherein the planarization layer extends into the non- display area,
wherein an end of the planarization layer in the non-display area is spaced apart from
an end of the first backplate in the non-display area by a distance of 60 µm or greater.
However, Lee et al discloses a display panel wherein the planarization layer 145)extends into the non- display area(NA), wherein an end of the planarization layer (145)in the non-display area is spaced apart from an end of the first backplate (130L)in the non-display area by a distance of 60 µm or greater[0084-0085]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Kishimoto et al with the teachings of Lee et al to prevent larger amount of stress in the bendable area.
Claim(s) 5 & 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kishimoto (US Pub no. 2021/00433868 A1) in view of Tomioka (US Pub no. 2020/0303490 A1).
Regarding claim 5, Kishimoto et al discloses all the claim limitations of claim 1 but fails to teach wherein the adhesive buffer layer is made of one of acryl-based, silicon-based, rubber-based, or polyurethane-based adhesive material or a combination thereof.
However, Tomioka et al teaches a an insulating buffer(barrier) film made of silicon oxide beneath a wiring layer(WL) (fig. 5)[0052]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Kishimoto et al with the teachings of Tomioko et al since silicon oxide is known for its intrusion suppressing properties.
Regarding claim 15, Kishimoto et al discloses all the claim limitations of claim 11 but fails to teach wherein the adhesive buffer layer is made of one of acryl-based, silicon-based, rubber-based, or polyurethane-based adhesive material or a combination thereof.
However, Tomioka et al teaches a an insulating buffer(barrier) film made of silicon oxide beneath a wiring layer(WL) (fig. 5)[0052]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Kishimoto et al with the teachings of Tomioko et al since silicon oxide is known for its intrusion suppressing properties.
Claim(s) 6 & 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kishimoto (US Pub no. 2021/00433868 A1) in view of Kwon ( US Pub no 2014/0217382 A1)
Regarding claim 6, Kishimoto et al discloses all the claim limitations of claim 1 but fails to teach wherein in a state where the bendable area of the display panel is bent such that the second backplate is attached to a lower surface of the first backplate, a distance between an end of the first backplate and an end of the second backplate
adjacent to each other in the non-display area NA is 10 µm or smaller.
However, Kwon et al teaches a flexible display wherein in a state where the bendable area (BP)of the display panel is bent such that the second backplate(140/340) is attached to a lower surface of the first backplate(130/330), a distance between an end of the first backplate (130/330)and an end of the second backplate(140/340)
adjacent to each other in the non-display area NA[0051][0067] but fails to teach is 10 µm or smaller. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to achieve a distance of 10 µm or smaller through routine experimentation. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Furthermore, it would have been obvious to ore of ordinary skill in the art before the effective filing date of the invention to modify Kishimoto et al with the teachings of Kwon et al to optimize external impact.
Regarding claim 16, Kishimoto et al discloses all the claim limitations of claim 11 but fails to teach wherein in a state where the bendable area of the display panel is bent such that the second backplate is attached to a lower surface of the first backplate, a distance between an end of the first backplate and an end of the second backplate
adjacent to each other in the non-display area NA is 10 µm or smaller.
However, Kwon et al teaches a flexible display wherein in a state where the bendable area (BP)of the display panel is bent such that the second backplate(140/340) is attached to a lower surface of the first backplate(130/330), a distance between an end of the first backplate (130/330)and an end of the second backplate(140/340)
adjacent to each other in the non-display area NA[0051][0067] but fails to teach is 10 µm or smaller. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to achieve a distance of 10 µm or smaller through routine experimentation. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Furthermore, it would have been obvious to ore of ordinary skill in the art before the effective filing date of the invention to modify Kishimoto et al with the teachings of Kwon et al to optimize external impact.
Claim(s) 8 & 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kishimoto (US Pub no. 2021/00433868 A1) in view of Gao (US Pub no. 2022/0320227 A1).
Regarding claim 8, Kishimoto et al discloses all the claim limitations of claim 1 but fails to teach wherein the planarization layer extends into the non- display area,
wherein an end of the planarization layer in the non-display area is spaced apart from
an end of the first backplate in the non-display area by a distance of 60 µm or greater.
However, Gao et al discloses a display panel wherein the planarization layer (PNL)extends into the non- display area(NA), wherein an end of the planarization layer (PNL)in the non-display area is spaced apart from an end of the first backplate in the non-display area by a distance of 60 µm or greater.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LATANYA N CRAWFORD EASON whose telephone number is (571)270-3208. The examiner can normally be reached Monday-Friday 8:30 AM-4:30 PM.
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/LATANYA N CRAWFORD EASON/Primary Examiner, Art Unit 2813