DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of claims
Claims 1-20 are rejected under 35 U.S.C. 112(a).
Claims 2-4, 9-11, 16 and 20 are rejected under 35 U.S.C. 112(b).
Claims 1-4, 8-11, and 15-18 are rejected under 35 U.S.C. 101.
Claims 1-2, 5-9 and 12-16 and 19-20 are rejected under 35 U.S.C. 103
Claims 3-4, 10-11 and 17-18 are objected to.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/26/2026 has been entered.
Response to Arguments
Applicant’s claim amendment of claim 15 overcomes the objection of claim 15.
Applicant’s claim amendment of claim 6 overcomes the 35 U.S.C. 112(b) rejection of claim 6.
Applicant's arguments filed on 05/26/2026 have been fully considered but they are not persuasive.
Applicant’s argument with regard to the claim interpretation of claims 3 and 10 under 35 U.S.C. 112(f) found in last paragraph on page 6 and first paragraph on page 7 of applicant’s remarks, which argues that one of ordinary skill would understand to recite structure of the term “circuitry”.
It is respectfully disagreed.
The structure of the term “circuitry” is not described nor found in applicant’s original specification and drawing; therefore, one of ordinary skill in the art would not understand the specific structure of the circuitry that perform the recited functions of claims 3 and 10.
Applicant’s argument with regard to the 112(a) rejection of claims 1-20 found in paragraph 3 on page 7 of applicant’s remark, which argues that the limitation “at least one circuit configured to: compare the additional power signal to the power signal; and carryout one or more response procedures based on the comparison” is supported by the Specification as filed as least at paragraphs [0050]-[0055], and [0060].
It is respectfully disagreed.
After detail evaluations of the paragraphs [0050]-[0055], and [0060] of the Specification as filed. No particular circuit is found that compares an additional power signal to a power signal and also carryout any response procedures based on the comparison.
In particular, paragraph [0050] recites “route the power signal and/or the additional power signal to one or more amplifiers, resistors, and/or comparators”; and
paragraph [0053] recites “response module 108 can, as part of computing device 202 in FIG. 2, carry out, by the at least one processor, one or more response procedures based on the one or more measurements”.
In addition, paragraph [0051] recites “The term “measurement,” as used herein, can generally refer to the process of associating numbers with physical quantities and phenomena”.
As a result, no specific description is found from applicant’s specification and drawing that describes any the connection between the comparator and the response module 108.
These are the recited paragraphs [0050]-[0055], and [0060] of the Specification as filed:
[0050] The systems described herein can perform step 302 in a variety of ways. In one example, power input module 104 can, as part of computing device 202 in FIG. 2, receive the power signal and the additional power signal using two or more power connector elements (e.g., pins, sockets, etc.) of same or different power connectors. In some of these implementations, separate power connectors can be connected to separate power cables. In others of these implementations, a same power connector can have pins that provide separate power input signals from provided by a connection to an individual power cable. Additionally, power input module 104 can, as part of computing device 202 in FIG. 2, route the power signal and/or the additional power signal to one or more detection units, such as a detection unit for voltage drop of the power signal and/or a detection unit for the additional power connector. In some of these implementations, the power input module 104 can, as part of computing device 202 in FIG. 2, route the power signal and/or the additional power signal to one or more amplifiers, resistors, and/or comparators.
[0051] At step 304 one or more of the systems described herein can perform a measurement. For example, power sensing module 106 can, as part of computing device 202 in FIG. 2, perform, by the at least one processor, one or more measurements of the additional power signal.
The term “measurement,” as used herein, can generally refer to the process of associating numbers with physical quantities and phenomena. For example, a measurement can be a sensed or determined voltage, current, etc.
[0052] The systems described herein can perform step 304 in a variety of ways. In one example, power sensing module 106 can, as part of computing device 202 in FIG. 2, measure presence or absence of the additional power signal. Additionally or alternatively, power sensing module 106 can, as part of computing device 202 in FIG. 2, measure voltage drop of the power signal. Additionally, power sensing module 106 can, as part of computing device 202 in FIG. 2, employ, by the at least one processor, one or more hysteresis control units to avoid jitter. Alternatively or additionally, power sensing module 106 can, as part of computing device 202 in FIG. 2, employ, by the at least one processor, a low-pass filter to avoid mis-touching protection.
[0053] At step 306 one or more of the systems described herein can respond to the measurement. For example, response module 108 can, as part of computing device 202 in FIG. 2, carry out, by the at least one processor, one or more response procedures based on the one or more measurements.
[0054] The systems described herein can perform step 306 in a variety of ways. In one example, response module 108 can, as part of computing device 202 in FIG. 2, generate, by the at least one processor, a first alarm signal that informs a system control unit that the additional power signal is not ready, and disable, by the at least one processor, a second alarm signal. Alternatively or additionally, response module 108 can, as part of computing device 202 in FIG. 2, enable, by the at least one processor, a voltage drop detection unit and a current sense unit configured to determine a contacting impedance of the power connector, determine, by the at least one processor, that the contacting impedance of the power connector exceeds a target reference contacting impedance, and generate, by the at least one processor and in response to the determination, an alarm signal that informs a system control unit that it can carry out one or more additional response procedures. In some of these implementations, response module 108 can, as part of computing device 202 in FIG. 2, control, by the at least one processor, system loading (e.g., system throttling) and/or generate, by the at least one processor, an additional alarm signal that informs a user and/or a system administrator.
[0055] FIG. 4 illustrates example power cable and/or connector configurations 400 for abnormal power connection detection. For example, configuration 402 corresponds to an original design having a connector that receives signal lines and power and grounds lines of an individual power cable. In contrast to configuration 402, configurations 404, 406, and 408 have additional power connection elements that facilitate abnormal power connection detection. Configuration 404, for example, has the individual power cable configured with a cable plug connector on a board side of the power cable that has an additional power pin as a signal detection point. Additionally, configuration 406 has an additional cable line for power and an additional power pin connector on a board side of the power cable as a signal detection point. The additional cable line for power can originate at and extend from power connectors on a power supply unit side of the power cable. The additional power pin of configuration 406 can be implemented as part of the cable plug connector on the board side of the power cable or can be implemented using a separate cable plug connector on the board side of the power cable. Like configuration 406, configuration 408 has an additional cable line for power and an additional power pin connector on a board side of the power cable as a signal detection point. Likewise, the additional power pin of configuration 408 can be implemented as part of the cable plug connector on the board side of the power cable or can be implemented using a separate cable plug connector on the board side of the power cable. However, the additional cable line for power can originate at and extend from a position proximate to cable plug connector on the board side of the power cable. With configurations 404, 406, and/or 408, a board of a computing device can receive a power signal by a power connector and an additional power signal by an additional power connector.
[0060] Signal amplification unit 508 can provide an amplified signal output to a low pass filter unit 522, and thereafter to a proportioner unit 524. In some implementations, computing device 500 can implement low pass filter unit 522 to avoid mistouching protection. Alternatively or additionally, computing device 500 can implement proportioner unit 524 to correct a sensed current signal.
Applicant’s argument with regard to the rejection of claims 1-4, 8-11 and 15-18 under 35 U.S.C. 101 found in last three paragraphs on page 7 of applicant’s remark, which argues that the claims do not recite a mental process when they do not contain limitation that can practically be performed in the human mind.
It is respectfully disagreed.
According the 35 U.S.C. 101 rejection, claim 1 recites “compare the additional power signal to the power signal” and claim 8 recites “compare the power signal and the additional power” which may be perform though human mental activities by comparing the additional power signal to the power signal mentally through visualization; as a result, human mental activities by comparing the additional power signal to the power signal visually is abstract idea; and
A computing device is merely used a tool to compare the additional power signal to the power signal which is insignificant, and when considering claim 1 as a whole, the computing device having the power connectors to receive the corresponding power signals and the circuit component do not amount to significantly more than judicial exception.
A computing processor is merely used a tool to compare the additional power signal to the power signal which is insignificant, and when considering claim 8 as a whole, the computing processor and memory, and the power connectors that receive corresponding signal do not amount to significantly more than judicial exception.
Applicant’s argument with regard to the rejection of claim 1 under 35 U.S.C. 101 found in last three paragraphs on page 8 of applicant’s remark, which argues that claim 1 does not recite a mental process because it recites acts that cannot “practically be performed in the human mind” since claim 1 recites power connectors that receiving corresponding power signals and a circuit that compares the power signals; therefore, human mind cannot “receive” and “compare” an electrical power signal; and
And as explained in paragraph [0033] of the specification, the system allows the detection of abnormal power connection, a technical improvement.
It is respectfully disagreed.
According the 35 U.S.C. 101 rejection, claim 1 recites “compare the additional power signal to the power signal” and claim 8 recites “compare the power signal and the additional power” which may be perform though human mental activities by comparing the additional power signal to the power signal mentally through visualization; as a result, human mental activities by comparing the additional power signal to the power signal visually is abstract idea;
claim 1 recites additional element “a power connector configured to receive a power signal” is a general pre-solution activity which does not integrate the Judicial Exception into a Practical Application because the additional element does not impose any meaningful limits on practicing the abstract ideas. The additional element is just only insignificant general pre-solution activity for receiving a power signal;
claim 1 recites additional element “an additional power connector configured to receive an additional power signal” is a general pre-solution activity which does not integrate the Judicial Exception into a Practical Application because the additional element does not impose any meaningful limits on practicing the abstract ideas. The additional element is just only insignificant general pre-solution activity for receiving an additional power signal; and
claim 1 recites additional element “a computing device” and “at least one circuit” which do not integrate the Judicial Exception into a Practical Application because the additional elements do not impose any meaningful limits on practicing the abstract idea as “a computing device” is computer as shown in figure 2 and paragraph [0035] of applicant’s specification (with receipt date 07/19/2023), and “at least one circuit” which may interpreted as a general component of the computer as shown in figure 2 and paragraph [0035] of applicant’s specification (with receipt date 07/19/2023). Using a component of a computer merely as a tool to compare the additional power signal to the power signal does not impose any meaningful limits on practicing the abstract idea.
A computing device is merely used a tool to compare the additional power signal to the power signal which is insignificant, and when considering claim 1 as a whole, the computing device having the power connectors to receive the corresponding power signals and the circuit component do not amount to significantly more than judicial exception.
Applicant’s argument with regard to the rejection of claim 1 under 35 U.S.C. 103 found in last two paragraphs on page 8, paragraph 1 on page 9, and paragraph 1 on page 10 of applicant’s remark, which argues that “a power signal” of Liu must be “an additional power signal received from an addition power connector”, and “Pref as an adjustable power reference signal” is not “an additional power signal received from an additional power connector”; therefore, it is not appropriate to interpret a comparison involving Liu’s Pref as disclosing the claimed comparing;
there is no suggestion in Fiora that compare the signal received from an “additional power connector” to some other signal would be advantageous, and there is no suggestion in Liu that compare a power reference Pref with a signal received by Fiora’s connector.
It is respectfully disagreed.
In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
In this case, it is the combination of Della Fiora and Liu that teaches all claim limitations of claim 1;
in particular, Della Fiora teaches
a power connector (e.g. figs. 1 and 12, [0038], power connector 146) configured to receive a power signal (e.g. figs. 1 and 12, [0038], the power connector 146 receives a power signal from power connector 138 of bay 112);
an additional power connector (e.g. figs. 1 and 12, [0038], power connector 148) configured to receive an additional power signal (e.g. figs. 1 and 12, [0038], the power connector 148 receives an additional power signal from power connector 140 of bay 112).
However, Della Fiora is silent on compare the additional power signal to the power signal.
Liu teaches at least one circuit (e.g. figs. 1A and 4, [0071], controller 15 in Fig 1A having circuit 41 and analog controller 42 forms a circuit shown in fig. 4) configured to:
compare an additional power signal to a power signal (e.g. figs. 1A and 4, compare a power signal Pin to a power reference signal Pref).
It is obvious and reasonable to interpret that “a power signal Pin” of Liu is an additional power signal in additional to “a power reference signal Pref” of Liu; and
A comparator 411 of Liu compares the power signal Pin to the power reference signal Pref.
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It is obvious and analogous to use a comparator or comparator function of a processor to compare the additional power signal to the power signal.
As a result, it would produce a predictive result of having the processor circuit of the computer to generate a response signal abased the comparison of the additional power signal to the power signal, for the purpose of detecting power stabilities to maintain power level for the computer to operate properly and/or detecting power supply issue for an operator to take further action.
Applicant’s argument with regard to the rejection of independent claims 8 and 15 under 35 U.S.C. 103 found second half page of page 10 of applicant’s remark, which argues that for the reasons from the foregoing (the reasons as arguments for claim1), no combination of Fiora and Liu would have disclosed: “compare the power signal and the additional power signal” recited in claim 8; or “comparing… the power signal to the additional power signal” recited in claim 15.
It is respectfully disagreed.
For the same reason from the foregoing (the reasons to address applicant’s arguments for claim1), combination of Fiora and Liu teaches all claim limitations of corresponding independent claims 8 and 15 including the claim limitations of “compare the power signal and the additional power signal” recited in claim 8; and the claim limitations of “comparing, by at least one processor, the power signal to the additional power signal” recited in claim 15.
Claim Objections
Claim 8 is objected to because of the following informalities:
In last two lines of claim 8, “the additional power” should be change to “the additional power signal; and” because “an additional power signal” is claimed previously in line 4 of claim 8.
Appropriate correction is required.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
“circuitry to perform current sensing” in claim 3; and
“circuitry to perform current sensing” in claim 10.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding independent claim 1, claim 1 recites “at least one circuit configured to: compare the additional power signal to the power signal; and carryout one or more response procedures based on the comparison”; and no support is found from applicant’s specification to describe any circuit is configured to compare the additional power signal and the power signal directly nor carrying out any respond procedures based on the comparison specifically.
Regarding claims 2-7, claims 2-7 are also rejected under 35 U.S.C. 112(a) because claims 2-7 depend on all claim limitations of independent claim 1.
Regarding claim 3, claim 3 recites “circuitry to perform current sensing configured to determine a contacting impedance of the power connector based on the voltage drop and/or current sensing”; and no support is found from applicant’s specification to describe any circuitry that performs current sensing configured to determine a contacting impedance of the power connector based on the voltage drop and/or current sensing.
Regarding claim 4, claim 4 is also rejected under 35 U.S.C. 112(a) because claim 4 depends on all claim limitations of claim 3.
Regarding claim 5, claim 5 recites “at least one circuit configured to prevent hysteresis to avoid jitter”, and no support is found from applicant’s specification to describe the claim limitation “at least one circuit configured to prevent hysteresis to avoid jitter”.
Regarding claim 7, claim 7 recites “at least one circuit configured to correct a current sense signal”, and no support is found from applicant’s specification to describe the claim limitation “at least one circuit configured to correct a current sense signal”.
Regarding independent claim 8, claim 8 recites “compare the power signal and the additional power; carry out one or more response procedures based on the comparison”, and no support is found from applicant’s specification to describe compare the additional power signal and the power signal directly nor carrying out any respond procedures based on the comparison specifically.
Regarding claims 9-14, claims 9-14 are also rejected under 35 U.S.C. 112(a) because claims 9-14 depend on all claim limitations of independent claim 8.
Regarding claim 10, claim 10 recites “determining a voltage drop across the power connector”, and no support is found from applicant’s specification to describe the claim limitation “determining a voltage drop across the power connector”.
Regarding claim 10, claim 10 recites “circuitry to perform current sensing”, and no support is found from applicant’s specification to describe the claim limitation “circuitry to perform current sensing”.
Regarding claim 11, claim 11 is also rejected under 35 U.S.C. 112(a) because claim 11 depends on all claim limitations of claim 10.
Regarding claim 12, claim 12 recites “prevent hysteresis to avoid jitter”, no support is found from applicant’s specification to describe the claim limitation “circuitry to perform current sensing”.
Regarding claim 14, claim 14 recites “at least one circuit configured to correct a current sense signal”, no support is found from applicant’s specification to describe the claim limitation “at least one circuit configured to correct a current sense signal”.
Regarding independent claim 15, claim 15 recites “comparing, by at least one processor, the power signal to the additional power signal; and carrying out, by the at least one processor, one or more response procedures based on the comparison ”,
Regarding claims 16-20, claims 16-20 are also rejected under 35 U.S.C. 112(a) because claims 16-20 depend on all claim limitations of independent claim 15.
Regarding claim 17, claim 17 recites “determining, by the at least one processor, a voltage drop across the power connector and performing current sensing to determine a contacting impedance of the power connector”, and no support is found from applicant’s specification to describe the claim limitation “determining, by the at least one processor, a voltage drop across the power connector and performing current sensing to determine a contacting impedance of the power connector”.
Regarding claim 18, claim 18 is also rejected under 35 U.S.C. 112(a) because claim 18 depends on all claim limitations of claim 17.
Regarding claim 19, claim 19 recites “at least one circuit configured to prevent hysteresis to avoid jitter”, and no support is found from applicant’s specification to describe the claim limitation “at least one circuit configured to prevent hysteresis to avoid jitter”.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-4, 9-11, 16 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 2, 9 and 16, each of claims 2, 9 and 16 recites “compare the additional power signal to a reference voltage and based on the comparison”; claims 2, 9 and 16 depend on corresponding independent claims 1, 8 and 15, and each of the independent claims 1, 8 and 15 recites “the comparison”; therefore, it is not clear which one of “compare the additional power signal to a reference voltage” (of the corresponding claims 2, 9 and 16) and “the comparison” (of the corresponding independent claims 1, 8 and 15) that “the comparison” (of the corresponding claims 2, 9 and 16) is referring to because there are two comparing results one is in current dependent claim and one is in its independent claim.
Regarding claim 3, claim 3 recites “circuitry to perform current sensing configured to determine a contacting impedance of the power connector based on the voltage drop and/or current sensing”, it is not clear what structure of the “circuitry” that performs the current sensing as well as being configured to the contacting impedance of the power connector based on the voltage drop and/or current sensing.
Regarding claim 4, claim 4 is also rejected under 35 U.S.C. 112(b) because claim 4 depends on all claim limitations of claim 3.
Regarding claim 10, claim 10 recites “circuitry to perform current sensing configured to determine a contacting impedance of the power connector”, it is not clear what structure of the “circuitry” that performs the current sensing as well as being configured to the contacting impedance of the power connector.
Regarding claim 11, claim 11 is also rejected under 35 U.S.C. 112(b) because claim 11 depends on all claim limitations of claim 10.
Regarding claim 20, claim 20 recites “employing, by the at least one processor, a low-pass filter to avoid mis-touching protection”, but does not describe how the filter is connected to or interacts with the other claimed elements. As written, it is unclear how the recited low-pass filter is configured to achieve the claimed function of avoiding “mis-touching protection.” Because the recitation fails to provide the necessary structural or functional linkage to other claim elements, the metes and bounds of claim 6 cannot be determined with reasonable certainty and the claim is indefinite.
To resolve this issue, it is suggested to change “employing, by the at least one processor, a low-pass filter to avoid mis-touching protection”, to
“employing, by the at least one processor, a low-pass filter
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-4, 8-11, and 15-18 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter.
Regarding claim 1:
1. A computing device, comprising:
a power connector configured to receive a power signal;
an additional power connector configured to receive an additional power signal;
at least one circuit configured to:
compare the additional power signal to the power signal; and
carry out one or more response procedures based on the comparison.
Analysis Steps for claim 1:
Step 1: Is claim 1 claim to a process, machine, manufacture or composition of matter?
Yes, claim 1 recites a computing device which is within one of the 4 statutory categories the process, machine, manufacture or composition of matter.
Step 2a) Prong One: Does claim 1 recite an abstract idea, law of nature, or natural phenomenon?
Yes, claim 1 recites “compare the additional power signal to the power signal” may be perform though human mental activities by comparing the additional power signal to the power signal mentally through visualization; as a result, human mental activities by comparing the additional power signal to the power signal visually is abstract idea.
Step 2a) Prong Two: Does claim 1 recite additional element that integrate the Judicial Exception into a Practical Application?
No, claim 1 recites additional element “a power connector configured to receive a power signal” is a general pre-solution activity which does not integrate the Judicial Exception into a Practical Application because the additional element does not impose any meaningful limits on practicing the abstract ideas. The additional element is just only insignificant a general pre-solution activity for receiving a power signal.
No, claim 1 recites additional element “an additional power connector configured to receive an additional power signal” is a general pre-solution activity which does not integrate the Judicial Exception into a Practical Application because the additional element does not impose any meaningful limits on practicing the abstract ideas. The additional element is just only insignificant a general pre-solution activity for receiving an additional power signal.
No, claim 1 recites additional element “a computing device” and “at least one circuit” which do not integrate the Judicial Exception into a Practical Application because the additional elements do not impose any meaningful limits on practicing the abstract idea as “a computing device” is computer as shown in figure 2 and paragraph [0035] of applicant’s specification (with receipt date 07/19/2023), and “at least one circuit” which may interpreted as a general component of the computer as shown in figure 2 and paragraph [0035] of applicant’s specification (with receipt date 07/19/2023). Using a component of a computer merely as a tool to compare the additional power signal to the power signal does not impose any meaningful limits on practicing the abstract idea.
No, claim 1 recites additional element “carry out one or more response procedures based on the comparison” which does not integrate the Judicial Exception into a Practical Application because the additional elements do not impose any meaningful limits on practicing the abstract ideas. The additional element is just only an insignificant post-solution activity.
Step 2b): Does claim 1 recite additional elements that amount to significantly more than the Judicial Exception?
No, a computing device is merely used a tool to compare the additional power signal to the power signal which is insignificant, and when considering claim 1 as a whole, the computing device having the power connectors to receive the corresponding power signals and the circuit component do not amount to significantly more than judicial exception.
Therefore, claim 1 is not eligible subject matter under 35 U.S.C. 101.
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Regarding claim 8, claim 8 recites similar claim limitations as in claim 1; therefore, claim 8 is also anomalously rejected under 35 U.S.C. 101 as in claim 1, where the physical memory comprising computer-executable instructions that, when executed by the at least one physical processor of the system does not integrate the Judicial Exception into a Practical Application because the additional elements do not impose any meaningful limits on practicing the abstract idea as physical processor and physical memory are general computer component of the system which is insignificant.
Regarding claim 15, claim 15 recites similar claim limitations as in claim 1; therefore, claim 15 is also anomalously rejected under 35 U.S.C. 101 as in claim 1, where using the at least one physical processor of a computer to implemented the method steps does not integrate the Judicial Exception into a Practical Application because the additional elements do not impose any meaningful limits on practicing the abstract idea as a processor is general computer component of the computer which is insignificant.
Regarding claims 2, 9 and 16, they recite wherein the at least one circuit is further configured to: compare the additional power signal to reference voltage and based on the comparison: generate a first alarm signal (e.g. general extra-solution activity which is insignificant); and disable a second alarm signal (e.g. general extra-solution activity which is insignificant).
Regarding claims 3, 10 and 17, they recite wherein the one or more response procedures include:
determining a voltage drop across the power connector and circuitry to perform current sense (e.g. insignificant computer software/hardware elements of the computing device (a computer as addressed in claim 1) configured to determine a contacting impedance of the power connector based on the voltage drop and/or current sensing (e.g. determine the contacting impedance may be mental activity based on calculating using voltage drop and/or current sensing measurement values);
determine that the contacting impedance of the power connector exceeds a target reference contacting impedance (e.g. may be mental activity which is abstract); and
generate, in response to the determining, an alarm signal that informs a system control unit that it can carry out one or more additional response procedures (e.g. general extra-solution activity which is insignificant).
Regarding claims 4, 11 and 18, they recite wherein the one or more additional response procedures include at least one of: controlling system loading (e.g. general extra-solution activity which is insignificant); or generating an additional alarm signal that informs at least one of a user or a system administrator (e.g. general extra-solution activity which is insignificant).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 8 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Della Fiora et al. (US 2007/0279892), and further in view of Liu (CN 103713685 A).
Regarding independent claim 1, Della Fiora teaches a computing device (e.g. figs. 1 and 12, [0020], module 106 may be a computer), comprising:
a power connector (e.g. figs. 1 and 12, [0038], power connector 146) configured to receive a power signal (e.g. figs. 1 and 12, [0038], the power connector 146 receives a power signal from power connector 138 of bay 112);
an additional power connector (e.g. figs. 1 and 12, [0038], power connector 148) configured to receive an additional power signal (e.g. figs. 1 and 12, [0038], the power connector 148 receives an additional power signal from power connector 140 of bay 112); and
at least one circuit (e.g. figs. 1 and 12, [0020], module 106 may be a computer which inherently has a processor circuit) configured to:
process data (e.g. figs. 1 and 6, [0020], module 106 may be a computer which inherently has a processor circuit to process data).
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However, Della Fiora is silent with regard to
compare the additional power signal to the power signal; and
carry out one or more response procedures based on the comparison.
Liu teaches at least one circuit (e.g. figs. 1A and 4, [0071], controller 15 in Fig 1A having circuit 41 and analog controller 42 forms a circuit shown in fig. 4) configured to:
compare an additional power signal to a power signal (e.g. figs. 1A and 4, compare a power signal Pin to a power reference signal Pref); and
carry out one or more response procedures based on the comparison (e.g. figs. 1A and 4, [0071], generate control signal Cs based on the comparison of the power signal Pin to the power reference signal Pref).
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It is obvious and analogous to use a comparator or comparator function of a processor to compare the additional power signal to the power signal.
As a result,it would produce a predictive result of having the processor circuit of the computer to generate a response signal abased the comparison of the additional power signal to the power signal, for the purpose of detecting power stabilities to maintain power level for the computer to operate properly and/or detecting power supply issue for an operator to take further action.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora by applying the teaching of Liu to explicitly have at least one circuit configured to: compare the additional power signal to the power signal; and carry out one or more response procedures based on the comparison, for the purpose of detecting power stabilities to maintain power level for the computer to operate properly and/or detecting power supply issue for an operator to take further action.
Regarding independent claim 8, Della Fiora teaches a system comprising (e.g. figs. 1 and 12, [0020], a system having module 106 may be a computer), comprising:
at least one physical processor (e.g. figs. 1 and 12, [0020], module 106 may be a computer which inherently has a processor circuit).
a power connector (e.g. figs. 1 and 12, [0038], power connector 146) configured to receive a power signal (e.g. figs. 1 and 12, [0038], the power connector 146 receives a power signal from power connector 138 of bay 112);
an additional power connector (e.g. figs. 1 and 12, [0038], power connector 148) configured to receive an additional power signal (e.g. figs. 1 and 12, [0038], the power connector 148 receives an additional power signal from power connector 140 of bay 112); and
physical memory comprising computer-executable instructions that, when executed by the at least one physical processor, cause the at least one physical processor (e.g. figs. 1 and 12, [0020], module 106 may be a computer which inherently has a processor and physical memory storing computer-executable instructions, and the computer-executable instructions is executed by the processing to perform processing operation) to:
process data (e.g. figs. 1 and 6, [0020], module 106 may be a computer which inherently has a processor circuit to process data).
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However, Della Fiora is silent with regard to
compare the power signal to the additional power,
carry out one or more response procedures based on the comparison.
Liu teaches at least one circuit (e.g. figs. 1A and 4, [0071], controller 15 in Fig 1A having circuit 41 and analog controller 42 forms a circuit shown in fig. 4) configured to:
compare an additional power signal to a power signal (e.g. figs. 1A and 4, compare a power signal Pin to a power reference signal Pref); and
carry out one or more response procedures based on the comparison (e.g. figs. 1A and 4, [0071], generate control signal Cs based on the comparison of the power signal Pin to the power reference signal Pref).
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It is obvious and analogous to use a comparator or comparator function of a processor to compare the additional power signal to the power signal.
As a result,it would produce a predictive result of having the processor circuit of the computer to generate a response signal abased the comparison of the additional power signal to the power signal, for the purpose of detecting power stabilities to maintain power level for the computer to operate properly and/or detecting power supply issue for an operator to take further action.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora by applying the teaching of Liu to compare the power signal to the additional power and carry out one or more response procedures based on the comparison, for the purpose of detecting power stabilities to maintain power level for the computer to operate properly and/or detecting power supply issue for an operator to take further action.
Regarding independent claim 15, Della Fiora teaches a computer-implement method (e.g. figs. 1 and 3-4, [0020], module 102 may be a computer), comprising:
receiving a power signal by a power connector (e.g. figs. 1 and 3-4, [0029], main connector 5 having sub-power connectors 146 and 148, receives power signal from sub-power connector 146 of the main connector 5; Please Note: a power connector may be interpreted as a connector having connection element(s) that is capable of receiving power; therefore, main connector 5 may be interpreted as a power connector) and
an additional power signal (e.g. connector (e.g. figs. 1 and 3-4, [0029], main connector 5 having sub-power connectors 146 and 148, and receiving additional power signal from sub-power connector 148 of the main connector 5; Please Note: as claimed, this claim limitation does not limit that “an additional power signal” is received from the same power connector as for the power signal);
at least one processor (e.g. figs. 1 and 3-4, [0020], module 102 may be a computer which inherently has a processor circuit) configured to:
process data (e.g. figs. 1 and 3-4, [0020], module 102 may be a computer which inherently has a processor circuit to process data).
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However, Della Fiora is silent with regard to
comparing, by the at least one processor, the power signal to the additional power signal; and
carrying out, by the at least one processor, one or more response procedures based on the comparison.
Liu teaches at least one circuit (e.g. figs. 1A and 4, [0071], controller 15 in Fig 1A having circuit 41 and analog controller 42 forms a circuit shown in fig. 4) configured to:
compare an additional power signal to a power signal (e.g. figs. 1A and 4, compare a power signal Pin to a power reference signal Pref); and
carry out one or more response procedures based on the comparison (e.g. figs. 1A and 4, [0071], generate control signal Cs based on the comparison of the power signal Pin to the power reference signal Pref).
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It is obvious and analogous to use a comparator or comparator function of a processor to compare the additional power signal to the power signal.
As a result, it would produce a predictive result of having the processor circuit of the computer to generate a response signal abased the comparison of the additional power signal to the power signal, for the purpose of detecting power stabilities to maintain power level for the computer to operate properly and/or detecting power supply issue for an operator to take further action.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora by applying the teaching of Liu to explicitly have comparing, by the at least one processor, the power signal to the additional power signal; and carrying out, by the at least one processor, one or more response procedures based on the comparison, for the purpose of detecting power stabilities to maintain power level for the computer to operate properly and/or detecting power supply issue for an operator to take further action.
Claims 2, 9 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Della Fiora et al. (US 2007/0279892) in view of Liu (CN 103713685 A), and further in view of Mao (CN 203455864 U).
Regarding claim 2 (claim 2 depends on claim 1), combination of Della Fiora and Liu teaches wherein the at least one circuit is further configured to: compare the additional power signal to a reference voltage and based on the comparison (e.g. as rejected in claims 1, 8 and 15 above, Liu, figs. 1A and 4, compare the power signal Pin to the power reference signal Pref that contains a reference voltage value):
However, combination of Della Fiora and Liu is silent with regard to generate a first alarm signal; and disable a second alarm signal.
Mao teaches generate a first alarm signal (e.g. [0021], acousto-optic alarm having light alarm signal and sound alarm signal);
Although Mao is silent with regard to disable a second alarm signal, it is obvious to try to different combination of light and sound alarm including enabling both light and sound alarm, enabling light alarm and disabling sound alarm, disabling light alarm and enabling sound alarm to represent different risk or emergency levels; and/or in a case of both light alarm and sound alarm are generated, is also obvious to disable the sound alarm while a user is taking action with regard the alarms to eliminate noise while working on this problem.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora and Liu by applying the teaching of Mao to explicitly generate a first alarm signal; and disable a second alarm signal, for the purpose of having different alarm combination to represent different risk or emergency levels; and/or eliminating noise while working on this problem by disable the sound alarm signal.
Regarding claim 9 (claim 9 depends on claim 8), combination of Della Fiora and Liu teaches wherein the physical processor is further configured to: compare the additional power signal to a reference voltage and based on the comparison (e.g. as rejected in claims 1, 8 and 15 above, Liu, figs. 1A and 4, compare the power signal Pin to the power reference signal Pref that contains a reference voltage value):
However, combination of Della Fiora and Liu is silent with regard to generate a first alarm signal; and disable a second alarm signal.
Mao teaches generate a first alarm signal (e.g. [0021], acousto-optic alarm having light alarm signal and sound alarm signal);
Although Mao is silent with regard to disable a second alarm signal, it is obvious to try to different combination of light and sound alarm including enabling both light and sound alarm, enabling light alarm and disabling sound alarm, disabling light alarm and enabling sound alarm to represent different risk or emergency levels; and/or in a case of both light alarm and sound alarm are generated, is also obvious to disable the sound alarm while a user is taking action with regard the alarms to eliminate noise while working on this problem.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora and Liu by applying the teaching of Mao to generate a first alarm signal; and disable a second alarm signal, for the purpose of having different alarm combination to represent different risk or emergency levels; and/or eliminating noise while working on this problem by disable the sound alarm signal.
Regarding claim 16 (claim 16 depends on claim 15), combination of Della Fiora and Liu teaches wherein the at least one processor is further configured to: compare the additional power signal to a reference voltage and based on the comparison (e.g. as rejected in claims 1, 8 and 15 above, Liu, figs. 1A and 4, compare the power signal Pin to the power reference signal Pref that contains a reference voltage value):
However, combination of Della Fiora and Liu is silent with regard to generate by the at least one processor, a first alarm signal; and disable, by the at least one processor, a second alarm signal.
Mao teaches generate a first alarm signal (e.g. [0021], acousto-optic alarm having light alarm signal and sound alarm signal);
Although Mao is silent with regard to disable a second alarm signal, it is obvious to try to different combination of light and sound alarm including enabling both light and sound alarm, enabling light alarm and disabling sound alarm, disabling light alarm and enabling sound alarm to represent different risk or emergency levels; and/or in a case of both light alarm and sound alarm are generated, is also obvious to disable the sound alarm while a user is taking action with regard the alarms to eliminate noise while working on this problem.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora and Liu by applying the teaching of Mao to generate by the at least one processor, a first alarm signal; and disable, by the at least one processor, a second alarm signal, for the purpose of having different alarm combination to represent different risk or emergency levels; and/or eliminating noise while working on this problem by disable the sound alarm signal.
Claims 5, 12 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Della Fiora et al. (US 2007/0279892) in view of Liu (CN 103713685 A), and further in view of Liu_754 (CN 203611754 U)
Regarding claim 5 (claim 5 depends on claim 1), combination of Della Fiora and Liu is silent with regard to further comprising at least one circuit configured to prevent hysteresis to avoid jitter.
Liu_754 teaches at least one circuit configured to prevent hysteresis to avoid jitter (e.g. [0032], controller 120 performing jitter preventing processing to avoid frequency jitter).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora and Liu by applying the teaching of Liu_754 to explicitly have at least one circuit configured to prevent hysteresis to avoid jitter, for the purpose of improving signal qualities to increase processing accuracy.
Regarding claim 12 (claim 12 depends on claim 8), combination of Della Fiora and Liu is silent with regard to wherein the computer-executable instructions further cause the at least one physical processor to: prevent hysteresis to avoid jitter.
Liu_754 teaches at least one circuit configured to prevent hysteresis to avoid jitter (e.g. [0032], controller 120 performing jitter preventing processing to avoid frequency jitter).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora and Liu by applying the teaching of Liu_754 to explicitly have wherein the computer-executable instructions further cause the at least one physical processor to: prevent hysteresis to avoid jitter, for the purpose of improving signal qualities to increase processing accuracy.
Regarding claim 19 (claim 19 depends on claim 15), combination of Della Fiora and Liu is silent with regard to further comprising: employing, by the at least one processor, at least one circuit configured to prevent hysteresis to avoid jitter.
Liu_754 teaches at least one circuit configured to prevent hysteresis to avoid jitter (e.g. [0032], controller 120 performing jitter preventing processing to avoid frequency jitter).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora and Liu by applying the teaching of Liu_754 to explicitly have further comprising: employing, by the at least one processor, at least one circuit configured to prevent hysteresis to avoid jitter, for the purpose of improving signal qualities to increase processing accuracy.
Claims 6-7, 13-14 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Della Fiora et al. (US 2007/0279892) in view of Liu (CN 103713685 A), and further in view of Moon et la. (US 2010/0246225).
Regarding claim 6 (claim 6 depends on claim 1), combination of Della Fiora and Liu is silent with regard to further comprising a low-pass filter.
Moon teaches a circuit comprising a low-pass filter configured to removes noise (e.g. figs. 2-3, [0050]-[0051], low-pass filter 142 is capable of removing noises and/or spikes due to mis-touching which would provide protection from high frequency noises and/or spikes).
It would provide a predictive result of having a low-pass filter to remove noises and/or spikes due to mis-touching which would provide protection from high frequency noises and/or spikes.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora and Liu by applying the teaching of Moon to further comprising a low-pass filter configured to avoid mis-touching protection, for the purpose of removing high frequency noises and/or spikes that are harmful to computer processing device.
Regarding claim 13 (claim 13 depends on claim 8), combination of Della Fiora and Liu is silent with regard to wherein the computer-executable instruction further cause the at least one physical processor to: employ a low-pass filter.
Moon teaches a circuit comprising a low-pass filter configured to removes noise (e.g. figs. 2-3, [0050]-[0051], low-pass filter 142 is capable of removing noises and/or spikes due to mis-touching which would provide protection from high frequency noises and/or spikes).
It would provide a predictive result of having a low-pass filter to remove noises and/or spikes due to mis-touching which would provide protection from high frequency noises and/or spikes.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora and Liu by applying the teaching of Moon to have wherein the computer-executable instruction further cause the at least one physical processor to: employ a low-pass filter, for the purpose of removing high frequency noises and/or spikes that are harmful to computer processing device.
Regarding claim 20 (claim 20 depends on claim 15), combination of Della Fiora and Liu is silent with regard to further comprising, employing by the at least one processor, a low-pass filter configured to avoid mis-touching protection.
Moon teaches a circuit comprising a low-pass filter configured to removes noise (e.g. figs. 2-3, [0050]-[0051], low-pass filter 142 is capable of removing noises and/or spikes due to mis-touching which would provide protection from high frequency noises and/or spikes).
It would provide a predictive result of having a low-pass filter to remove noises and/or spikes due to mis-touching which would provide protection from high frequency noises and/or spikes.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the invention of Della Fiora and Liu by applying the teaching of Moon to have further comprising, employing by the at least one processor, a low-pass filter configured to avoid mis-touching protection, for the purpose of removing high frequency noises and/or spikes that are harmful to computer processing device.
Regarding claim 7 (claim 7 depends on claim 1), combination of Della Fiora, Liu and Moon teaches further comprising at least one circuit configured to correct a current sense signal (e.g. as rejected in claims 6 and 13 above, Moon, figs. 2-3, [0050]-[0051], low-pass filter 142 configured to filter noise in detected current signal by current detector 141; as a result, the detected current signal is being corrected by filtering the noise in the detected current signal).
Regarding claim 14 (claim 14 depends on claim 8), combination of Della Fiora, Liu and Moon teaches wherein the computer-executable instruction further cause the at least one physical processor to: at least one circuit configured to correct a current sense signal (e.g. as rejected in claims 6 and 13 above, Moon, figs. 2-3, [0050]-[0051], low-pass filter 142 configured to filter noise in detected current signal by current detector 141; as a result, the detected current signal is being corrected by filtering the noise in the detected current signal).
Allowable Subject Matter
Claims 3-4, 10-11 and 17-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims; and if all rejections are overcome without broadening the scopes of the claims 3-4, 10-11 and 17-18.
Prior Art of Record
The prior art made of record is considered pertinent to applicant's disclosure.
Moon et al. (US 2010/0246225) teaches “variable controller 143 is connected to the low-pass filter 142 and can generate a frequency control signal to adjust the operation frequency of the switching device to operate at an operation frequency higher than a predetermined operation frequency in the case where load corresponds to light load after amplifying a signal passing through the low-pass filter 142 and acquiring load information from the amplified signal” (fig. 4, [0058]).
Ziegler (US 2011/0181294) teaches “a system 100 for detecting electrical connection quality according to one embodiment of the current invention. According to one embodiment, the system 100 is a datacenter containing computing equipment. The system 100 includes a first electronic circuit 102, a second electronic circuit 104, a temperature sensor 110, a current sensor 112, a controller 116, external system interface 120, user interface 118, data storage 122 and a bus 114. In the example shown in FIG. 1, the first electronic circuit 102 is a modular Power Distribution Unit (PDU) and the second electronic circuit 104 is an equipment rack. According to one embodiment, the PDU 102 is capable of being installed in the equipment rack 104. In another embodiment, the PDU 102 is removable from the equipment rack 104. In another example, the system 100 may also include additional sensors, for example, an ambient temperature sensor 124. However, it should be appreciated that even though examples in accordance with the present invention are described herein for use with a PDU and an equipment rack of a datacenter, other examples may be used with any other type of power connection utilizing electrical connectors” (e.g. fig. 1, [0034]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAIDONG ZHANG whose telephone number is (571)270-5815. The examiner can normally be reached M-F 8:00 AM - 5:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached at (571) 272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HAIDONG ZHANG/Examiner, Art Unit 2858
/GIOVANNI ASTACIO-OQUENDO/Primary Examiner, Art Unit 2858 6/26/2026
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