Attorney’s Docket Number: 3590-1192US
Filing Date: 07/19/2023
Claimed Priority Date: 12/23/2022 (PRO 63/477,073)
Applicant: Yamaha
Examiner: Younes Boulghassoul
DETAILED ACTION
This Office action responds to the Election filed on 01/28/2026.
Remarks
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's elections without traverse of Group Invention I (drawn to a semiconductor structure) and of Species 1 (directed to Figs. 1-17), in the reply filed on 01/28/2026, is acknowledged. Applicant indicated that claims 1-10 read on the elected Species. The examiner agrees. Accordingly, pending in this application are claims 1-20, with Claims 11-20 standing withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group Invention, there being no allowable generic or linking claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 4-5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Rhodes et al. (US4536951).
Regarding Claim 1, Rhodes (see, e.g., Figs. 3-5) shows all aspects of the instant invention, including a structure comprising an integrated line-and-via structure (e.g., integrated pattern/line 2 and pillar/via 10) located over a substrate (e.g., substrate 4), wherein the integrated line-and-via structure comprises:
- a metal line structure comprising a first metal and having a pair of lengthwise metal line sidewalls that laterally extend along a first horizontal direction (e.g., first metal layer 2 patterned into a line)
- a metallic capping plate comprising a metallic capping material and overlying the metal line structure and having a pair of lengthwise metal cap sidewalls that are vertically coincident with the pair of lengthwise metal line sidewalls (e.g., barrier layer 6 of chromium)
- a metal via structure comprising a second metal and having a pair of lengthwise metal via sidewalls that is vertically coincident with the pair of lengthwise metal cap sidewalls and having a lateral extent along the first horizontal direction that is less than a lateral extent of the metal line structure along the first horizontal direction (e.g., second metal layer 8 patterned into metal pillar/via 10)
Regarding Claim 2, Rhodes (see, e.g., Fig. 3) shows that an entirety of the pair of lengthwise metal via sidewalls and an entirety of the pair of lengthwise metal line sidewalls are located within a pair of vertical planes that laterally extend along the first horizontal direction.
Regarding Claim 4, Rhodes (see, e.g., Fig. 4) shows a dielectric material layer (e.g., dielectric layer 12) having a homogeneous material composition throughout and having a bottom surface with a horizontal plane including a bottom surface of the metal line structure and having a top surface within a horizontal plane including a top surface of the metal via structure.
Regarding Claim 5, Rhodes (see, e.g., Fig. 4) shows that a top surface of the metallic capping plate is in contact with a horizontal surface of the dielectric material layer.
Claims 1-3 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Mebarki et al. (US2015/0056800).
Regarding Claim 1, Mebarki (see, e.g., Figs. 8-10) shows all aspects of the instant invention, including a structure comprising an integrated line-and-via structure (e.g., integrated metal line 104 and metal pillar/via 208) located over a substrate (e.g., base layer 102), wherein the integrated line-and-via structure comprises:
- a metal line structure comprising a first metal and having a pair of lengthwise metal line sidewalls that laterally extend along a first horizontal direction (e.g., line metal layer 104 pattered into a line)
- a metallic capping plate comprising a metallic capping material and overlying the metal line structure and having a pair of lengthwise metal cap sidewalls that are vertically coincident with the pair of lengthwise metal line sidewalls (e.g., etch stop layer 106 of, e.g., TiN or Co)
- a metal via structure comprising a second metal and having a pair of lengthwise metal via sidewalls that is vertically coincident with the pair of lengthwise metal cap sidewalls and having a lateral extent along the first horizontal direction that is less than a lateral extent of the metal line structure along the first horizontal direction (e.g., pillar-forming metal layer 108 patterned into metal pillar/via 208)
Regarding Claim 2, Mebarki (see, e.g., Fig. 8) shows that an entirety of the pair of lengthwise metal via sidewalls and an entirety of the pair of lengthwise metal line sidewalls are located within a pair of vertical planes that laterally extend along the first horizontal direction.
Regarding Claim 3, Mebarki (see, e.g., Fig. 8) shows the metallic capping plate (e.g., 106) has a first thickness in a first area that underlies the metal via structure (e.g., 208) and has a second thickness in a second area that does not have an areal overlap with the metal via structure, the second thickness being less than the first thickness (e.g., 106 is etched in areas not covered by 208).
Regarding Claim 7, Mebarki (see, e.g., Par. [0074]-[0076]) shows that the first metal (e.g., metal of 104) and the second metal (e.g., metal of 108/208) comprise Mo, W, or Ru (e.g., tungsten or ruthenium).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Mebarki et al. (US2015/0056800).
Regarding Claim 8, Mebarki (see, e.g., Par. [0021],[0074]-[0076]) discloses that:
- 104 and 108/208 can be any one of, e.g., W or Ru
- 106 can be any one of, e.g., TiN, W, Co, or Ru
- the etch selectivity of materials selected for 104 and 108/208 need to be different from the etch selectivity of 106.
Accordingly, it would have been obvious to one of ordinary skill in the art at the lime the invention was filed to have first metal and the second metal comprise Ru and the metallic capping material comprises TiN, in the structure of Mebarki, because Ru is a known material suitable for implementing metal lines, as suggested by Mebarki himself, and TiN is also a known material suitable for implementing metallic caps while maintaining etch selectivity from the material of the metal lines, as also suggested by Mebarki, and selecting known materials based on their suitability for their intended use would have been obvious to the skilled artisan. See, Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945).
Regarding Claim 9, Mebarki (see, e.g., Par. [0021],[0074]-[0076]) discloses that:
- 104 and 108/208 can be any one of, e.g., W or Ru
- 106 can be any one of, e.g., TiN, W, Co, or Ru
- the etch selectivity of materials selected for 104 and 108/208 need to be different from the etch selectivity of 106.
Accordingly, it would have been obvious to one of ordinary skill in the art at the lime the invention was filed to have first metal and the second metal comprise W and the metallic capping material comprises Co or Ru, in the structure of Mebarki, because W is a known material suitable for implementing metal lines, as suggested by Mebarki himself, and Co or Ru are also knowns material suitable for implementing metallic caps while maintaining etch selectivity from the material of the metal lines, as also suggested by Mebarki, and selecting known materials based on their suitability for their intended use would have been obvious to the skilled artisan. See, Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945).
Claims 1-2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wu et al. (US2021/0082804) in view of Ren et al. (US2020/0350206).
Regarding Claim 1, Wu (see, e.g., Figs. 11-12) shows most aspects of the instant invention, including a structure comprising an integrated line-and-via structure (e.g., integrated conductive line feature 106B and contact via 110A) located over a substrate (e.g., substrate 102), wherein the integrated line-and-via structure comprises:
- a metal line structure comprising a first metal and having a pair of metal line sidewalls (e.g., conductive line feature 106B)
- a metallic capping plate (e.g., metal etch stop layer 108) comprising a metallic capping material and overlying the metal line structure and having a pair of metal cap sidewalls that are vertically coincident with the pair of metal line sidewalls
- a metal via structure comprising a second metal and having a pair of metal via sidewalls that is vertically coincident with the pair of metal cap sidewalls (e.g., contact via 110A)
However, Wu depicts his invention in cross-sections in the X-Y plane. Therefore, Wu is silent about the respective pairs of metal line sidewalls, pair of metal cap sidewalls, and pair of metal via sidewalls are lengthwise sidewalls that laterally extend along a first horizontal direction, and that the metal via structure has a lateral extent along the first horizontal direction that is less than a lateral extent of the metal line structure along the first horizontal direction.
Ren (see, e.g., Figs. 10-12 and Par. [0004]-[0006],[0042]-[0044]), on the other hand and in the same field of endeavor, teaches forming electronic devices comprising integrated line-and-via arrangements, wherein a metal via 908 and an etch stop layer 906 are fully aligned to an underlying metal line 904 using a subtractive etching process, such that the pairs of metal line 904 sidewalls, the pair of metal cap 906 sidewalls, and pair of metal via 908 sidewalls are lengthwise sidewalls that laterally extend along a first horizontal direction, and that the metal via structure has a lateral extent along the first horizontal direction that is less than a lateral extent of the metal line structure along the first horizontal direction.
Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have a pair of lengthwise metal line sidewalls that laterally extend along a first horizontal direction, a metallic capping plate overlying the metal line structure and having a pair of lengthwise metal cap sidewalls that are vertically coincident with the pair of lengthwise metal line sidewalls, a metal via structure having a pair of lengthwise metal via sidewalls that is vertically coincident with the pair of lengthwise metal cap sidewalls and having a lateral extent along the first horizontal direction that is less than a lateral extent of the metal line structure along the first horizontal direction, as claimed, in the structure of Wu, because such arrangement of integrated self-aligned line-and-via is known in the semiconductor art for implementing on-chip electrical interconnections that reduce or eliminate via alignment errors when compared to previous “dual-damascene” fabrication techniques at the 10 nm node and smaller feature sizes, as suggested by Ren, and implementing a known electrical connection arrangement for its conventional use would have been a common sense choice by the skilled artisan. KSR Int’l Co. v. Teleflex Inc., 550 U.S, 82 USPQ2d 1385 (2007).
Regarding Claim 2, Wu (see, e.g., Figs. 11-12) shows that an entirety of the pair of metal via 110A sidewalls and an entirety of the pair of metal line 106B sidewalls are located within a pair of vertical planes. Additionally, Ren (see, e.g., Figs. 10-12) teaches that an entirety of the pair of lengthwise metal via 908 sidewalls and an entirety of the pair of lengthwise metal line 904 sidewalls are located within a pair of vertical planes that laterally extend along the first horizontal direction.
Claim 10 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wu et al. (US2021/0082804) in view of Ren et al. (US2020/0350206), and in further view of Amano et al (US2022/0399232).
Regarding claim 10, while Wu (see, e.g., Par. [0010]) discloses that his invention is applicable to IC devices including a memory, Wu in view of Ren is silent about having a three-dimensional memory device located between the substrate and the integrated line-and-via structure.
Amano (see, e.g., Figs. 15-17), on the other hand and in the same field of endeavor, teaches that a self-aligned bit line contact arrangement can be implemented in the upper wiring layer of a three-dimensional NAND memory device, such that the three-dimensional memory device is located between a substrate 9 and an integrated line-and-via structure 108,168, implementing bit-line biasing mean to the vertical semiconductor channels of said three-dimensional memory device.
Accordingly, it would have been obvious to one of ordinary sill in the art at the time the invention was filed to have a three-dimensional memory device located between a substrate and the integrated line-and-via structure in the structure of Wu in view of Ren, because it is known in the semiconductor memory art that integrated line-and-via structure arrangements can be implemented as bit-line and bit-line contact for biasing the vertical semiconductor channels of a three-dimensional memory device, as suggested by Amano, and implementing a known electrical connection arrangement for its conventional use would have been a common sense choice by the skilled artisan. KSR Int’l Co. v. Teleflex Inc., 550 U.S, 82 USPQ2d 1385 (2007).
Allowable Subject Matter
Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The additional references cited disclose self-aligned via-and-line interconnect structures formed by subtractive etching, and having aspects similar to the instant invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Younes Boulghassoul at (571) 270-5514. The examiner can normally be reached on Monday-Friday 9am-6pm EST (Eastern Standard Time), or by e-mail via younes.boulghassoul@uspto.gov. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached at (571) 272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/YOUNES BOULGHASSOUL/Primary Examiner, Art Unit 2814