DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action has been issued in response to Applicant’s Communication of application S/N 18/355,331 filed on July 19, 2023. Claims 1 to 20 are currently pending with the application.
Priority
The instant application claims priority from Provisional Application Number 63/419,872, filed on October 27, 2022. Applicant’s claim for the benefit of the prior-filed application, under 35 U.S.C. 119(e), 120, 121, or 365(c), or 386(c) is acknowledged.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 07/19/2023 and 02/09/2024 were filed before the mailing date of the first action on the merits. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2, 3, 15, and 16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 recites the limitation “the image file”. There is insufficient antecedent basis for this limitation in the claim.
Claim 3 recites the limitation “the image file”. There is insufficient antecedent basis for this limitation in the claim.
Claim 15 recites the limitation “the proposed layout modification” in line 2. There is insufficient antecedent basis for this limitation in the claim.
Claim 16 recites the limitations “the text description” in line 1, and “the proposed layout modification” in line 2. There is insufficient antecedent basis for these limitations in the claim.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are: “a first block configured to”, “a second block configured to”, “a third block configured to”, recited in claims 12 to 20.
Because these claim limitations are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, they are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. (See Specification Para [0040] – “some or all of the elements of matching system 300b may be implemented on a computing device, such as a computer, workstation, tablet, smartphone or other similar computing device.”)
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1 to 11 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter.
Claim 1 recites “a system comprising: a machine learning system…”. The claim does not fall within at least one of the four categories of patent eligible subject matter because the claim is a system type claim that does not recite any type of hardware. As such, it could be interpreted by one or ordinary skill in the art as software alone, hence, as software per se, and not tangibly embodied on any sort of physical medium, or an appropriate non-transitory computer readable medium in a manner so as to be executed by a computer. Software is neither a physical thing, nor a process, as they are not ‘acts’ being performed.
Claims 1 to 20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claims 1, 12, and 18 recite matching a wafer hotspot to categories.
The limitation of matching a wafer hotspot to categories, which specifically recites “match the previously identified wafer hotspot to one of a plurality of categories of wafer hotspot types”, is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind, but for the recitation of generic computer components. That is, other than reciting “by a machine learning system”, nothing in the claim element precludes the steps from practically being performed in a human mind. For example, but for the “by a machine learning system” language, “matching”, in the context of this claim encompasses the user mentally, with the aid of pen and paper, identifying a category of wafer hotspot that corresponds to the previously identified wafer hotspot. If a claim limitation, under its broadest reasonable interpretation, covers mental processes but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claims recite an abstract idea.
This judicial exception is not integrated into a practical application. In particular, the claims recite the additional elements – “receive an input layout file that comprises a portion of an integrated circuit layout that includes a previously identified wafer hotspot”, “output a proposed layout modification associated with the matching category of wafer hotspot types”, “designate a previously identified wafer hotspot in an input layout file that comprises a portion of an integrated circuit layout” (claims 12 and 18), “convert information from the input layout file to generate an image of the portion of the integrated circuit layout with the previously identified wafer hotspot” (claims 12 and 18), and a machine learning system. The limitations “receive an input layout file that comprises a portion of an integrated circuit layout that includes a previously identified wafer hotspot”, and “output a proposed layout modification associated with the matching category of wafer hotspot types” amount to data-gathering steps which is considered to be insignificant extra-solution activity (See MPEP 2106.05(g)). The limitations “designate a previously identified wafer hotspot in an input layout file that comprises a portion of an integrated circuit layout” and “convert information from the input layout file to generate an image of the portion of the integrated circuit layout with the previously identified wafer hotspot” are recited at a high-level of generality, with no restriction on how the result is accomplished and no description of the mechanism for accomplishing the result, and is equivalent to merely saying “applying it”.
Continuing with the analysis, the machine learning system in these steps is recited at a high-level of generality (i.e., as a generic processor performing a generic computer function) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, these additional elements do not integrate the abstract idea into a practical application because they do not impose any meaningful limits on practicing the abstract idea. The claims are directed to an abstract idea.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. The insignificant extra-solution activity identified above, which include the data gathering steps, is recognized by the courts as well-understood, routine, and conventional activity when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity (See MPEP 2106.05(d)(II)(i) Receiving or transmitting data over a network, e.g., using the Internet to gather data, buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network)). The claims are not patent eligible.
Claim 2 is dependent on claim 1 and includes all the limitations of claim 1. Therefore, claim 2 recites the same abstract idea of claim 1. The claim recites the additional limitations of “the image file comprises a label that designates the previously identified wafer hotspot”, which is tying the abstract idea to a field of use by further specifying the target data, and which is simply an attempt to limit the application of the abstract idea to a particular technological environment; merely indicating a field of use or technological environment in which to apply the judicial exception does not meaningfully limit the claim (See MPEP 2106.05(h)). Same rationale applies to claims 3, to 5, 8, and 9.
Claim 6 is dependent on claim 1 and includes all the limitations of claim 1. Therefore, claim 6 recites the same abstract idea of claim 1. The claim recites the additional limitations of “the machine learning system comprises a convolutional neural network”, which is recited at a high-level of generality, and amounts to no more than mere instructions to apply the exception using generic computer components, because it does no more than invoking computers or other machinery merely as a tool to perform an existing process. Additional elements that invoke computers, computer components, or other machinery in its ordinary capacity, merely as a tool, or simply add a general-purpose computer or computer components after the fact to an abstract idea, do not integrate a judicial exception into a practical application nor provide significantly more. Same rationale applies to claim 7.
Claim 10 is dependent on claim 1 and includes all the limitations of claim 1. Therefore, claim 10 recites the same abstract idea of claim 1. The claim recites the additional limitations of “the machine learning system comprises a machine learning model trained to match previously identified wafer hotspots to one of N categories of wafer hotspots”, which is recited at a high-level of generality, with no restriction on how the result is accomplished and no description of the mechanism for accomplishing the result, and is equivalent to merely saying “applying it”, therefore, does not integrate the judicial exception into a practical application nor amount to significantly more. Same rationale applies to claim 11.
Additionally, the claims do not include a requirement of anything other than conventional, generic computer technology for executing the abstract idea, and therefore, do not amount to significantly more than the abstract idea.
Same rationale applies to claims 13 to 17, 19, and 20 since they recite similar limitations.
Claims 1 to 20 are therefore not drawn to eligible subject matter as they are directed to an abstract idea without significantly more.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 4, 6, 10 to 12, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Kwang et al. (U.S. Publication No. 2009/0268958) hereinafter Kwang, and further in view of Buzaglo (U.S. Publication No. 2021/0334946).
As to claim 1:
Kwang discloses:
A system comprising: a system configured to:
receive an input layout file that comprises a portion of an integrated circuit layout that includes a previously identified wafer hotspot [Paragraph 0052 teaches receiving design layouts, where the layout can include a hotspot; Paragraph 0048 teaches classifying each pattern-clip-based hotspot into one of a predefined set of hotspot categories, hence, the hotspot has been previously identified and is known];
match the previously identified wafer hotspot to one of a plurality of categories of wafer hotspot types [Paragraph 0048 teaches classifying each pattern-clip-based hotspot into one of a predefined set of hotspot categories]; and
output a proposed layout modification associated with the matching category of wafer hotspot types [Paragraph 0052 teaches matching pattern clips in the layout, and retrieve correction guidance descriptions associated with the matched pattern, where the correction guidance descriptions are to remove the hotspot in the layout or to reduce the hotspot severity; Paragraph 0014 teaches determining a set of correction recommendations when the pattern matches a known manufacturing hotspot].
Kwang does not appear to expressly disclose a machine learning system.
Buzaglo discloses:
a machine learning system [Paragraph 0008 teaches providing one or more machine learning models to identify and classify one or more defects present in the semiconductor wafer into one or more defect classes].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating a machine learning system, as taught by Buzaglo [Paragraph 0008], because both applications are directed to identification and classification of defects in wafers; incorporating machine learning enables to accurately determine the defects in wafer including by considering different aspects or mixture of modalities of defect images corresponding to wafer (See Buzaglo Para [0005]).
As to claim 2:
Kwang as modified by Buzaglo discloses:
the image file comprises a label that designates the previously identified wafer hotspot [Paragraph 0008 teaches labelled images; Paragraph 0011 teaches the labelled images comprises labels related to the one or more defect classes].
As to claim 4:
Kwang as modified by Buzaglo discloses:
each of the categories of wafer hotspot types comprises a corresponding category indicator [Paragraph 0013 teaches classify one or more defects in the semiconductor wafer into one or more defect classes; Fig. 5a, teaches classification of the defects into categories, i.e., class A, class B, class C, class D, etc., therefore, including category indicators].
As to claim 6:
Kwang as modified by Buzaglo discloses:
the machine learning system comprises a convolutional neural network [Paragraph 0037 teaches the deep learning model or classifier can be a Convolutional Neural Network (CNN)].
Same rationale applies to claim 17, since it recites similar limitations.
As to claim 10:
Kwang as modified by Buzaglo discloses:
the machine learning system comprises a machine learning model trained to match previously identified wafer hotspots to one of N categories of wafer hotspots [Paragraph 0013 teaches classify with a machine learning model, one or more defects in the semiconductor wafer into one or more defect classes; Fig. 5a, teaches classification of the defects into categories, i.e., class A, class B, class C, class D, etc., therefore, including category indicators; Paragraph 0107 teaches matching or classifying labeled images into a defect class; Paragraph 0037 teaches the deep learning model or classifier can be a Convolutional Neural Network (CNN)].
As to claim 11:
Kwang as modified by Buzaglo discloses:
a graphical user interface configured to facilitate training and implementation of the machine learning system [Paragraph 0040 teaches a user can provide metadata associated with the defects features; Paragraph 0035 teaches electronic device includes a storage unit, a processor and an input/output (I/O) interface].
As to claim 12:
Kwang discloses:
An apparatus comprising: a first block configured to designate a previously identified wafer hotspot in an input layout file that comprises a portion of an integrated circuit layout [Paragraph 0052 teaches receiving design layouts, where the layout can include a hotspot; Paragraph 0048 teaches classifying each pattern-clip-based hotspot into one of a predefined set of hotspot categories, hence, the hotspot has been previously identified and is known];
match the previously identified wafer hotspot to one of a plurality of categories of wafer hotspot types [Paragraph 0048 teaches classifying each pattern-clip-based hotspot into one of a predefined set of hotspot categories].
Kwang does not appear to expressly disclose a second block configured to convert information from the input layout file to generate an image of the portion of the integrated circuit layout with the previously identified wafer hotspot; a third block comprising a machine learning model.
Buzaglo discloses:
a second block configured to convert information from the input layout file to generate an image of the portion of the integrated circuit layout with the previously identified wafer hotspot [Paragraph 0037 teaches input may include clips from a design layout; Paragraph 0008 teaches capturing images using a plurality of imaging modalities]; and
a third block comprising a machine learning model [Paragraph 0008 teaches providing one or more machine learning models to identify and classify one or more defects present in the semiconductor wafer into one or more defect classes].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating a second block configured to convert information from the input layout file to generate an image of the portion of the integrated circuit layout with the previously identified wafer hotspot; a third block comprising a machine learning model, as taught by Buzaglo [Paragraph 0008, 0037], because both applications are directed to identification and classification of defects in wafers; incorporating machine learning enables to accurately determine the defects in wafer including by considering different aspects or mixture of modalities of defect images corresponding to wafer (See Buzaglo Para [0005]).
Claims 3, 5, 8, 9, and 13 to 16 are rejected under 35 U.S.C. 103 as being unpatentable over Kwang et al. (U.S. Publication No. 2009/0268958) hereinafter Kwang, in view of Buzaglo (U.S. Publication No. 2021/0334946), and further in view of LEU et al. (U.S. Publication No. 2020/0026819) hereinafter Leu.
As to claim 3:
Kwang does not appear to expressly disclose the image file comprises a Graphic Design System data file.
Leu discloses:
the image file comprises a Graphic Design System data file [Paragraph 0096 teaches the design layout pattern format can be GDS format, GDS-II format, etc.].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating image files comprising a Graphic Design System data file, as taught by Leu [Paragraph 0089], because the applications are directed to identification and classification of wafer defects; incorporating an additional image file format is a simple substitution of one known element for another to obtain predictable results.
Same rationale applies to claim 13, since it recites similar limitations.
As to claim 5:
Kwang does not appear to expressly disclose each of the categories of wafer hotspot types comprises a corresponding text description of the proposed layout modification.
Leu discloses:
each of the categories of wafer hotspot types comprises a corresponding text description of the proposed layout modification [Paragraph 0121 teaches defect pattern library and frequent failure defect library, including text descriptions; Fig. 9, 1610-1630 teach descriptions of the layouts].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating text descriptions, as taught by Leu [Paragraph 0121], because the applications are directed to identification and classification of wafer defects; incorporating an additional data format is a simple substitution of one known element for another to obtain predictable results.
Same rationale applies to claim 15, since it recites similar limitations.
As to claim 8:
Kwang does not appear to expressly disclose the output comprises text.
Leu discloses:
the output comprises text [Paragraph 0097 teaches obtaining the defect text data].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating text as output, as taught by Leu [Paragraph 0097], because the applications are directed to identification and classification of wafer defects; incorporating an additional data format is a simple substitution of one known element for another to obtain predictable results.
As to claim 9:
Kwang does not appear to expressly disclose the output comprises an image.
Leu discloses:
the output comprises an image [Paragraph 0097 teaches obtaining the defect image].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating an image as output, as taught by Leu [Paragraph 0097], because the applications are directed to identification and classification of wafer defects; incorporating an additional data format is a simple substitution of one known element for another to obtain predictable results.
As to claim 14:
Kwang does not appear to expressly disclose the image file comprises a Graphic Design System data file.
Leu discloses:
the image comprises TIFF, BMP, JPG, JPEG or PNG data [Paragraph 0090 teaches defect data will be processed to be JPG, TIFF, PNG, image data file, etc.].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating image files comprising a Graphic Design System data file, as taught by Leu [Paragraph 0089], because the applications are directed to identification and classification of wafer defects; incorporating an additional image file format is a simple substitution of one known element for another to obtain predictable results.
As to claim 16:
Kwang does not appear to expressly disclose output the text description of the proposed layout modification.
Leu discloses:
output the text description of the proposed layout modification [Paragraph 0097 teaches obtaining the defect text data; Paragraph 0121 teaches defect pattern library and frequent failure defect library, including text descriptions; Fig. 9, 1610-1630 teach descriptions of the layouts].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by output the text description of the proposed layout modification, as taught by Leu [Paragraph 0097, 0121], because the applications are directed to identification and classification of wafer defects; incorporating an additional data format is a simple substitution of one known element for another to obtain predictable results.
Claims 7, 18, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Kwang et al. (U.S. Publication No. 2009/0268958) hereinafter Kwang, in view of Buzaglo (U.S. Publication No. 2021/0334946), and further in view of AMTHOR et al. (U.S. Publication No. 2023/0111345) hereinafter Amthor.
As to claim 7:
Kwang does not appear to expressly disclose the machine learning system comprises an image-to-image translation predictor.
Amthor discloses:
the machine learning system comprises an image-to-image translation predictor [Paragraph 0068 teaches image-to-image transformation can then be carried out using a machine-learned algorithm].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating an image-to-image translation predictor, as taught by Amthor [Paragraph 0068], because the applications are directed to identification and classification of defects; incorporating an image-to-image translation predictor to perform the clustering or matching of the images is a simple substitution of one known element for another to obtain predictable results.
As to claim 18:
Kwang discloses:
An apparatus comprising: a first block configured to designate a previously identified wafer hotspot in an input layout file that comprises a portion of an integrated circuit layout [Paragraph 0052 teaches receiving design layouts, where the layout can include a hotspot; Paragraph 0048 teaches classifying each pattern-clip-based hotspot into one of a predefined set of hotspot categories, hence, the hotspot has been previously identified and is known].
match the previously identified wafer hotspot to a corrected portion of the integrated circuit layout [Paragraph 0048 teaches classifying each pattern-clip-based hotspot into one of a predefined set of hotspot categories; Paragraph 0062 teaches if a match is found, retrieve the stored correction guidance descriptions for the matched known hotspot configuration and use this information to correct the received pattern clip].
Kwang does not appear to expressly disclose a second block configured to convert information from the input layout file to generate an image of the portion of the integrated circuit layout with the previously identified wafer hotspot; an image-to-image translation predictor.
Buzaglo discloses:
a second block configured to convert information from the input layout file to generate an image of the portion of the integrated circuit layout with the previously identified wafer hotspot [Paragraph 0037 teaches input may include clips from a design layout; Paragraph 0008 teaches capturing images using a plurality of imaging modalities].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating a second block configured to convert information from the input layout file to generate an image of the portion of the integrated circuit layout with the previously identified wafer hotspot, as taught by Buzaglo [Paragraph 0008, 0037], because both applications are directed to identification and classification of defects in wafers; incorporating machine learning enables to accurately determine the defects in wafer including by considering different aspects or mixture of modalities of defect images corresponding to wafer (See Buzaglo Para [0005]).
Neither Kwang nor Buzaglo appear to expressly disclose an image-to-image translation predictor.
Amthor discloses:
an image-to-image translation predictor [Paragraph 0068 teaches image-to-image transformation can then be carried out using a machine-learned algorithm].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating an image-to-image translation predictor, as taught by Amthor [Paragraph 0068], because the applications are directed to identification and classification of defects; incorporating an image-to-image translation predictor to perform the clustering or matching of the images is a simple substitution of one known element for another to obtain predictable results.
As to claim 19:
Kwang discloses:
generate an output image file that depicts a same portion of the integrated circuit layout as the portion depicted in the input layout file, but with proposed changes to eliminate the previously identified wafer hotspot [Paragraph 0062 teaches if a match is found, retrieve the stored correction guidance descriptions for the matched known hotspot configuration and use this information to correct the received pattern clip].
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Kwang et al. (U.S. Publication No. 2009/0268958) hereinafter Kwang, in view of Buzaglo (U.S. Publication No. 2021/0334946), in view of AMTHOR et al. (U.S. Publication No. 2023/0111345) hereinafter Amthor, and further in view of LEU et al. (U.S. Publication No. 2020/0026819) hereinafter Leu.
As to claim 20:
Kwang does not appear to expressly disclose the input layout file comprises a Graphic Design System data file.
Leu discloses:
the input layout file comprises a Graphic Design System data file [Paragraph 0096 teaches the design layout pattern format can be GDS format, GDS-II format, etc.].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of the cited references and modify the invention as taught by Kwang, by incorporating input layout files comprising a Graphic Design System data file, as taught by Leu [Paragraph 0089], because the applications are directed to identification and classification of wafer defects; incorporating an additional image file format is a simple substitution of one known element for another to obtain predictable results.
Conclusion
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/RAQUEL PEREZ-ARROYO/Primary Examiner, Art Unit 2169