DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-7 in the reply filed on 27 November 2025 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 5 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites the limitation “the second electronic component and the circuit substrate are on two opposites of the circuit substrate respectively.” This is unclear both for the circuit substrate being opposite the circuit substrate, and it being unclear if “opposites” refer to opposite sides of the circuit substrate or, for example, to opposite ends of the same side of the circuit substrate. Examiner is treating this limitation as instead saying “the first and second electronic components are on opposite sides of the circuit substrate”, in agreement with language used in applicant’s specification ¶0042 and Fig 6A.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-6 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 20190279937 (Chiu et al).
As to claim 1: Chiu teaches a method for fabricating an electronic package module comprising:
providing a circuit substrate (Fig 2B 20);
disposing an interposer frame and a first electronic component on the circuit substrate (23 and 21 on 20, respectively);
disposing a shielding material on the interposer frame and the shielding material has at least one opening overlapping the first electronic component (24 on 23 with opening overlapping 21);
using the shielding material as a mask and filling a molding material through the opening, and thus a molding layer is formed, wherein the molding layer encapsulates the first electronic component (molding material 25 filled in process between Figs. 2B and 2C); and
removing the shielding material to expose an interface of the interposer frame after the molding layer is formed (24 removed in Fig 2D exposing interface 23b).
As to claim 2: Chiu teaches the method of claim 1 further comprising:
Disposing a plurality of solder materials on the interface of the interposer frame (80 added in Fig 2E); and
Connecting the circuit substrate with a main board through the plurality of solder materials after disposing the plurality of solder materials (8 added after disposing 80 in Fig 2E)
As to claim 3: Chiu teaches the method of claim 1 further comprising:
Disposing a barrier surrounding a perimeter of the opening on the interposer frame before filling the molding material (overhang portions of 24 in Fig 2B constitute a barrier)
As to claim 4: Chiu teachers the method of claim 1 further comprising:
forming a metal layer on the molding layer, wherein the metal layer overlaps the first electronic component (Fig 6E shows further step of forming metal layer 68 which overlaps component 21).
As to claim 5: Chiu teaches the method of claim 1 further comprising:
disposing a second electronic component on the circuit substrate, and the second electronic component and the first electronic component are on two opposite sides of the circuit substrate respectively (optional second component 22 shown in Fig 4A).
As to claim 6: Chiu teaches the method of claim 1 further comprising:
Cutting the circuit substrate, the molding layer, and the interposer frame after removing the shielding material (Fig 6C shows claimed cutting step along lines S)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chiu as applied to claim 1 above, and further in view of US 20200006170 (Nunokawa et al).
As to claim 7: Chiu teaches the method of claim 1 but fails to explicitly teach wherein filling into the molding material is by a method of vacuum printing.
Nunokawa teaches a method similar to that of Chiu and explicitly teaching filling into a molding material by vacuum printing (¶0047).
It would have been obvious to one of ordinary skill in the art at the time of filing to combine the method of vacuum printing taught by Nunokawa with the general method taught by Chiu as Nunokawa teaches it was well-known to those of ordinary skill in the art at the time of filing that a method of vacuum printing may be used to fill a molding material in similar devices.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Corbyn D Mellinger whose telephone number is (703)756-5683. The examiner can normally be reached M-F 9-6 Eastern.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at 571-272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Corbyn D Mellinger/Examiner, Art Unit 2899
/EVAN G CLINTON/Primary Examiner, Art Unit 2899
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