DETAILED ACTION
This office action is in response to the amendments and arguments filed on January 21, 2026. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on July 20, 2023 is being considered by the examiner.
Priority
Acknowledgment is made of the priority documents have been received
Acknowledgements
Applicant's amendments and arguments filed on January 21, 2026, in response to the office action mailed on October 21, 2025 are acknowledged. The present office action is made with all the suggested arguments being fully considered. Accordingly, claims 1-18 are currently pending
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION. —The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 17 recites the limitation “The vertical oriented semiconductor device of vertical oriented semiconductor device of vertical oriented semiconductor device of claim 5, wherein the semiconductor body comprises a semiconductor material comprises that is Silicon Carbide (SiC).” However, the examiner points out that the claim seems to have some irregular verbiage. Appropriate correction is required. For purpose of examination, the examiner has interpreted the claim to read “The vertical oriented semiconductor device of claim 5, wherein the semiconductor body comprises a semiconductor material comprises that is Silicon Carbide (SiC).”
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-18 are rejected under 35 U.S.C. 103 as being unpatentable over Ghandi (US 2020/0105529) in view of Ootsuka (US 2009/0020834) and in further view of Miwa (US 2022/0336219)
With respect to Claim 1, Ghandi shows (Fig. 2-8) most aspects of the current invention including a method of manufacturing a vertical oriented semiconductor device, comprising the steps of:
providing a semiconductor body (16) of a first conductivity type having a first major surface and having a current-accommodating region (42A) of the first conductivity type, the current-accommodating region being placed adjoining the first major surface (Fig 4-5);
implanting free charge carriers of a second conductivity type, the second conductivity type opposite to the first conductivity type, using a second mask (83) on the semiconductor body, so that well regions (42B) of the second conductivity type are created at opposite lateral sides of the current-accommodating region (Fig 6-8);
wherein the implanting free charge carriers of the second conductivity type is performed, using the second mask (Fig 6-8);
wherein the method further comprises the step of: implanting free charge carriers of the first conductivity type using a first mask (80) on the semiconductor body so that the current-accommodating region of the first conductivity type is created in the semiconductor body (Fig 5),
However, Ghandi does not show wherein the implanting free charge carriers of the second conductivity type is performed using at least a third mask, so that at least one of the well regions has a lateral doping gradient with monotonic decreasing doping concentration, from a higher doping concentration at a first lateral end of the well regions towards a lower doping concentration at a second, opposite, lateral end thereof facing the current-accommodating region, wherein the second mask has a width larger than a width of the current-accommodating region and wherein the third mask has a width smaller than a width of the second mask and smaller than a width of the current-accommodating region.
On the other hand, and in the same field of endeavor, Ootsuka teaches (Fig. 2-9) a method of manufacturing a vertical oriented semiconductor device, comprising the steps of providing a semiconductor body (2) of a first conductivity type having a first major surface (Fig 2), implanting free charge carriers of a second conductivity type (see par 35), the second conductivity type opposite to the first conductivity type, using a second mask on the semiconductor body so that well regions (3a-3c) of the second conductivity type are created (Fig 3-5), wherein the implanting free charge carriers of the second conductivity type is performed, using the second mask and, subsequently, at least a third mask, so that at least one of the well regions has a lateral doping gradient with monotonic decreasing doping concentration, from a higher doping concentration at a first lateral end (3a) of the well regions towards a lower doping concentration at a second, opposite, lateral end (3c) thereof facing a current-accommodating region (11) (Fig 3-5; par 32-36 Ootsuka teaches the formations of the p-type SiC regions 3a, 3b, 3c and the n-type SiC source region 4 may be achieved by using separate implantation masks, and the p-type SiC region 3a formed under the source electrode 8 and having an increased concentration at least in its surface portion, a p-type SiC region 3b formed right under the n-type SiC source region 4 and having a lower impurity implantation concentration than the p-type SiC region 3a, and a p-type SiC region 3c formed right under the channel layer and having a lower impurity implantation concentration than the p-type SiC region 3b (par 32)). Ootsuka teaches this device makes it possible to obtain a breakdown voltage close to the ideal withstand voltage without depletion when the concentration of the p-type region right under the channel region corresponds to about 5 to 20% of the concentration of the p-type SiC region (away from the current-accommodating region) (par 40-42).
Therefore, it would have been obvious to one of ordinary skill in the art, and before the effective filing date of the claimed invention to have method steps of wherein the implanting free charge carriers of the second conductivity type is performed using at least a third mask, so that at least one of the well regions has a lateral doping gradient with monotonic decreasing doping concentration, from a higher doping concentration at a first lateral end of the well regions towards a lower doping concentration at a second, opposite, lateral end thereof facing the current-accommodating region, in the method of manufacturing of Ghandi, as taught by Ootsuka, because this device makes it possible to obtain a breakdown voltage close to the ideal withstand voltage without depletion when the concentration of the p-type region right under the channel region corresponds to about 5 to 20% of the concentration of the p-type SiC region (away from the current-accommodating region).
Furthermore, although Ghandi shows wherein the second mask has a width equal to a width of the current-accommodating region, the combination of references do not show wherein the second mask has a width larger than a width of the current-accommodating region and wherein the third mask has a width smaller than a width of the second mask and smaller than a width of the current-accommodating region.
On the other hand, and in the same field of endeavor, Miwa teaches (Fig. 1-7) a method of manufacturing a vertical oriented semiconductor device, comprising providing a semiconductor body (21) of a first conductivity type having a first major surface and having a current-accommodating region (channel 21), implanting free charge carriers of a second conductivity type, the second conductivity type opposite to the first conductivity type, using a second mask (90d) on the semiconductor body, and, subsequently, at least a third mask (90c), so that well regions (30,32) of the second conductivity type are created at opposite lateral sides of the current-accommodating region, wherein the second mask (90d) has a width larger than a width of the current-accommodating region and wherein the third mask (90c) has a width smaller than a width of the second mask and smaller than a width of the current-accommodating region (channel 21). Miwa teaches the electrical characteristics of the semiconductor device can be stabilized by using the implantation masks having high perpendicularity (par 61-63).
Therefore, it would have been obvious to one of ordinary skill in the art, and before the effective filing date of the claimed invention to have wherein the second mask has a width larger than a width of the current-accommodating region and wherein the third mask has a width smaller than a width of the second mask and smaller than a width of the current-accommodating region, in the device of Ghandi and Ootsuka, as taught by Miwa, because the electrical characteristics of the semiconductor device can be stabilized by using the implantation masks having high perpendicularity.
With respect to Claim 2, Miwa teaches (Fig. 1-7) wherein the step of implanting free charge carriers of the second conductivity type further comprises implanting free charge carriers of the second conductivity using a fourth mask (90a), and wherein the fourth mask has a width lager than a width of the third mask (90c) and smaller than a width of the second mask (90d).
With respect to Claim 3, Ghandi shows (Fig. 2-8) wherein the first conductivity type and the second conductivity type comprises any type selected from the group consisting of a N-type, and a P-type.
With respect to Claim 4, Ghandi shows (Fig. 2-8) wherein the semiconductor body comprises a semiconductor material that is Silicon Carbide (SiC).
With respect to Claim 5, Ghandi in view of Ootsuka and in further view of Miwa shows a vertical oriented semiconductor device obtained by a method in accordance with claim 1.
With respect to Claim 6, Ghandi shows (Fig. 2-8) wherein the first conductivity type and the second conductivity type comprises any type selected from the group consisting of a N-type, and a P-type.
With respect to Claim 7, Ghandi shows (Fig. 2-8) wherein the semiconductor body comprises a semiconductor material comprises that is Silicon Carbide (SiC).
With respect to Claim 8, Ghandi in view of Ootsuka and in further view of Miwa shows a vertical oriented semiconductor device obtained by a method in accordance with claim 2.
With respect to Claim 9, Miwa teaches (Fig. 1-7) wherein the method comprises the step of: implanting free charge carriers, of the first conductivity type, using the fourth mask, with a reduced implant depth compared to implant depths of the other implanting steps, so that source contacts are provided in the well regions.
With respect to Claim 10, Ghandi shows (Fig. 2-8) wherein the first conductivity type and the second conductivity type comprises any type selected from the group consisting of a N-type, and a P-type.
With respect to Claim 11, Ghandi shows (Fig. 2-8) wherein the semiconductor body comprises a semiconductor material comprises that is Silicon Carbide (SiC).
With respect to Claim 12, Ghandi in view of Ootsuka and in further view of Miwa shows a vertical oriented semiconductor device obtained by a method in accordance with claim 3.
With respect to Claim 13, Ghandi shows (Fig. 1, 2-8) wherein the method further comprises at least one step selected from the group consisting of: manufacturing a gate oxide (26), manufacturing a gate conduction line (27), manufacturing interlayer dielectrics, and manufacturing ohmic contacts.
With respect to Claim 14, Ghandi shows (Fig. 2-8) wherein the first conductivity type and the second conductivity type comprises any type selected from the group consisting of a N-type, and a P-type.
With respect to Claim 15, Ghandi shows (Fig. 2-8) wherein the semiconductor body comprises a semiconductor material comprises that is Silicon Carbide (SiC).
With respect to Claim 16, Ghandi in view of Ootsuka and in further view of Miwa shows a vertical oriented semiconductor device obtained by a method in accordance with claim 4.
With respect to Claim 17, Ghandi in view of Ootsuka and in further view of Miwa shows the vertical oriented semiconductor device of claim 5, wherein the semiconductor body comprises a semiconductor material comprises that is Silicon Carbide (SiC).
With respect to Claim 18, Ghandi in view of Ootsuka and in further view of Miwa shows a vertical oriented semiconductor device obtained by a method in accordance with claim 5.
Response to Arguments
Applicant’s arguments filed on January 21, 2026, with respect to claims 1-18 have been considered but are not persuasive.
Applicant argues: Ghandi does not show "a current-accommodating region of the first conductivity type being placed adjoining the first major surface" and "well regions of the second conductivity type at opposite lateral sides of the current-accommodating region" as recited in claim 1. Furthermore, the Office Action admits Ghandi fails to disclose "wherein the implanting free charge carriers of the second conductivity type is performed using at least a third mask, so that at least one of the well regions has a lateral doping gradient with monotonic decreasing doping concentration, from a higher doping concentration at a first lateral end of the well regions towards a lower doping concentration at a second, opposite, lateral end thereof facing the current-accommodating region, wherein the second mask has a width larger than a width of the current-accommodating region and wherein the third mask has a width smaller than a width of the second mask and smaller than a width of the current-accommodating region." Additionally, the fact that Ootsuka makes no distinction between using separate masks or a single two-layered mask demonstrates Ootsuka fails to disclose "a lateral doping gradient with monotonic decreasing doping concentration" as recited in claim 1. Miwa fails to cure Ghandi's and Ootsuka's deficiencies.
Examiner responds: The examiner respectfully disagrees. In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007).
In this case, Ghandi shows (Fig. 2-8) providing a semiconductor body (16) of a first conductivity type having a first major surface and having a current-accommodating region (42A) of the first conductivity type, the current-accommodating region being placed adjoining the first major surface (top surface) (Fig 4-5) and well regions (42B) of the second conductivity type are created at opposite lateral sides of the current-accommodating region (Fig 6-8). Additionally, Ootsuka teaches (Fig. 2-9) a method of manufacturing a vertical oriented semiconductor device, comprising the steps of providing a semiconductor body (2) of a first conductivity type having a first major surface (Fig 2), implanting free charge carriers of a second conductivity type (see par 35), the second conductivity type opposite to the first conductivity type, using a second mask on the semiconductor body so that well regions (3a-3c) of the second conductivity type are created (Fig 3-5; par 32-36 Ootsuka teaches the formations of the p-type SiC regions 3a, 3b, 3c and the n-type SiC source region 4 may be achieved by using separate implantation masks, and the p-type SiC region 3a formed under the source electrode 8 and having an increased concentration at least in its surface portion, a p-type SiC region 3b formed right under the n-type SiC source region 4 and having a lower impurity implantation concentration than the p-type SiC region 3a, and a p-type SiC region 3c formed right under the channel layer and having a lower impurity implantation concentration than the p-type SiC region 3b (par 32)).
Monotonic is defined as a sequence, function, or action that moves in one direction only—consistently increasing or consistently decreasing without changing direction. Ootsuka does not teach away from the doping concentration being a lateral doping gradient with monotonic decreasing doping concentration. Ootsuka teaches the impurity implantation concentration of 3a is higher than the impurity implantation concentration of 3b, and the impurity implantation concentration of 3b is higher than the impurity implantation concentration of 3c. Therefore, Ootsuka teaches at least one of the well regions has a lateral doping gradient with monotonic decreasing doping concentration. The examiner invites the applicant and/or applicants’ representative to an Examiner’s Interview to discuss the application and ways to advance prosecution.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/Q.A.B/ Examiner, Art Unit 2814
/WAEL M FAHMY/ Supervisory Patent Examiner, Art Unit 2814