DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 1-8 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 5/13/2026.
Claim Objections
Claims 13 and 18 are objected to because of the following informalities.
The Examiner suggests the following amendments to correct apparent grammatical errors:
13. The method of claim 11, wherein the etching comprises performing a selective dry etching process configured to selectively remove material having the suitable concentration ratio of silicon to germanium.
18. The method of claim 17, wherein the etching comprises performing a selective dry etching process configured to selectively remove material having the suitable concentration ratio of silicon to germanium.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “suitable” in claim 11 is a relative term which renders the claim indefinite. The term “suitable” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention.
Claim 11 recites epitaxial layers with a suitable concentration ratio of silicon to germanium. These layers are subsequently subjected to selective removal by a selective etch process. Therefore, it appears that the suitability of the silicon to germanium concentration ratio relates to an etch rate, and/or etch selectivity. As is well-known in the field of semiconductor manufacturing, the etch rate of material, such as silicon germanium alloy, will depend on the particular composition of the material, for example the ratio of germanium to silicon. However, the claim does not define the degree of concentration ratio which might be considered suitable or unsuitable. Therefore, the scope of claim 11 is indefinite.
Claims 12-13 depend on claim 11 and are indefinite for the same reasons.
Furthermore, it has been held where a broad range or limitation together with a narrow range or limitation that falls within the broad range or limitation (in the same claim) may be considered indefinite if the resulting claim does not clearly set forth the metes and bounds of the patent protection desired. See MPEP § 2173.05(c). In the present instance, claim 12 recites the broad recitation ‘comprises’, and the claim also recites ‘pure silicon’ which is the narrower statement of the range/limitation. The claim(s) are considered indefinite because there is a question or doubt as to whether the feature introduced by such narrower language is (a) merely exemplary of the remainder of the claim, and therefore not required, or (b) a required feature of the claims.
For example, any material which includes elemental silicon, including alloys such as silicon germanium, could broadly interpreted to comprise both pure silicon and germanium.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 9-14 are rejected under 35 U.S.C. 103 as being unpatentable over Wahl et al. (US 2015/0187762 A1) in view of Peng et al. (US 2020/0168716 A1).
Regarding claim 9, Wahl teaches a method, comprising:
growing a superlattice epitaxy structure, the superlattice epitaxy structure comprising at least one second epitaxy layer (¶ 0025: nanowire stack including layers 114A and 114B);
depositing a mask (¶ 0026: 124) at a first side and a second side of the at least one second epitaxy layer such that a center portion of the at least one second epitaxy layer is unmasked (fig. 3A: 124 disposed at sides of 114A/114B to expose center of 114A/114B); and
growing a third epitaxy layer (¶ 0026: 123) on the at least one second epitaxy layer at the unmasked center portion (fig. 3A: 123 grown on unmasked portion of 114A114B).
Wahl is silent to the step of growing the superlattice structure further comprising more than one first epitaxy layers grown alternatingly with the at least one second epitaxy layer, and the method further comprising etching the more than one first epitaxy layers from the superlattice epitaxy structure.
Peng teaches a method including:
growing a superlattice epitaxy structure (¶ 0033 & fig. 2: stack including epitaxially formed layers 20 and 25), the superlattice epitaxy structure comprising more than one first epitaxy layers (plurality of 20) and at least one second epitaxy layer (25) grown alternatingly one over another (fig. 2: 20/25 alternatingly grown to form a stack), and
etching the more than one first epitaxy layers from the superlattice epitaxy structure (¶ 0049 & fig. 8: layers 20 etched from 20/25 stack).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the method of Wahl with the first epitaxial layer formation/removal of Peng, as a means to prevent impurity diffusion and provide in interface with low resistance (Peng, ¶ 0077).
Regarding claim 10, Wahl in view of Peng teaches the method of claim 9, wherein a lowermost layer of the superlattice epitaxy structure and an uppermost layer of the superlattice epitaxy structure are the more than one first epitaxy layers (Wahl, fig. 3A: remaining layers 114A/114B arranged above and below portions of cavities 124A, formed by removal of 25 of Peng).
Regarding claim 11, Wahl in view of Peng teaches the method of claim 9, wherein the more than one first epitaxy layers (Peng, 20) comprise silicon germanium having a suitable concentration ratio of silicon to germanium (Peng, ¶ 0030: 20 comprises SiGe, meeting the broadest reasonable interpretation of ‘a suitable concentration ratio of silicon to germanium’), and the at least one second epitaxy layer (Peng, 25) comprises silicon (Peng, ¶ 0029: 25 comprises silicon).
Regarding claim 12, Wahl in view of Peng teaches the method of claim 11, wherein the at least one second epitaxy layer comprises pure silicon (Peng, ¶ 0029: 25 comprises Si, meeting the broadest reasonable interpretation of ‘comprises pure silicon’).
Regarding claim 13, Wahl in view of Peng teaches the method of claim 11, wherein the etching comprising performing a selective dry etching process configured to selectively remove material having the suitable concentration ratio of silicon to germanium (¶ 0049: 25 removed selective to 20 by a dry etch process).
Regarding claim 14, Wahl in view of Peng teaches the method of claim 9, wherein the at least one second epitaxy layer forms a second fin in a second direction of a metal-oxide semiconductor field effect transistor (MOSFET) channel (Wahl, ¶ 0025 & figs. 4L-4K among others: 114A/14B arranged in a vertical fin, and configured to electrically connect source/drain regions 130/132, meeting the broadest reasonable interpretation of a MOSFET channel).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Wahlin view of Peng as applied to claim 14 above, and further in view of Xie et al. (PG Pub. No. US 2020/0274000 A1).
Regarding claim 15, Wahl in view of Peng teaches the method of claim 14, wherein the third epitaxy layer extends in a first direction of the MOSFET channel (Wahl, fig. 3A: 123 extends in a channel direction of FET 100), the second fin protruding from the first fin in the second direction (Wahl, fig. 3A: 123 vertically protrudes from 114A/114B) and crossing the first fin.
Wahl in view of Peng does not explicitly teach the third epitaxy layer forms a first fin, the second fin crossing the first fin.
Xie teaches a MOSFET device (¶ 0099: 200) including a third epitaxy layer (¶ 0117: 602) forming a first fin extending in a first direction of the MOSFET channel (figs. 14A-14B: 602 formed a fin shape extending in a channel direction of 200), the second fin protruding from a first fin in a second direction and crossing the first fin (fig. 14A: 602 protrudes from and crosses a fin of semiconductor layers 206).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the third epitaxial layer of Wahl in view of Peng with a fin shape, as a means to allow short gate lengths, while providing higher drive currents (Xie, ¶ 0097).
Claims 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Xie in view of Cheng et al. (Patent No. US 9,570,297 B1).
Regarding claim 16, Xie teaches method, comprising:
depositing a mask (¶ 0162: 2008) at a center portion of a silicon layer (¶¶ 0105, 0161& fig. 21: 2008 deposited at a central portion of silicon layer 2006);
removing unmasked portions of the silicon layer (¶ 0163: portions of 2006 not masked by 2008 removed);
growing a superlattice structure (¶ 0166: 2104/2106 stack formed on 2102) at a first side and a second side of the silicon layer (fig. 21: 2104/2106 formed at two sides of 2006), the superlattice structure comprising more than one first layers and at least one second layer formed alternatingly one over another (fig. 21: 2104/2106 alternatingly stacked), the at least one second layer being a silicon layer (¶ 0168: 2106 comprises silicon); and
etching the more than one first layers from the superlattice structure (¶¶ 0170-0171 & figs. 22-23: 2104 etched from 2104/2106 stack).
Xie does not teach the first and second layers are or include epitaxy.
However, Xie does teach embodiments (figs. 2A-2B among others) including growing a superlattice epitaxy structure (¶ 0104: 206/208) comprising more than one first epitaxy layers (206) and at least one second epitaxy layer (208) grown alternatingly one over another (fig. 2B: 206 and 208 alternatingly stacked).
Furthermore, Cheng teaches forming layers (col. 6 lines 43-44: 110, including material equivalent to 2104 and 2106 of Xie) by epitaxial growth (col. 6 lin3. 40: 110 formed by epitaxial growth) at a first side and a second side of a semiconductor layer (col. 6 lines 37-38: 110 formed on side surfaces of semiconductor layer 106).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to form the first and second layers with epitaxial material, and/or by epitaxial growth, as a means to provide a defect free interface (Cheng, col. 5 lines 56-58).
Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. In the instant case, the epitaxy of Chen is suitable to provide the material of the superlattice layers of Xie.
Regarding claim 17, Xie in view of Cheng teaches the method of claim 16, wherein a lowermost layer of the superlattice epitaxy structure and an uppermost layer of the superlattice epitaxy structure are the more than one first epitaxy layers (Xie, fig. 21: 2104 provides top and bottom layers of 2104/2106 stack).
Xie in view of Cheng as applied to claim 16 above does not teach the more than one first epitaxy layers comprise silicon germanium having a suitable concentration ratio of silicon to germanium.
However, Xie does teach embodiments (figs. 2A-2C among others) including more than one first epitaxy layers (208) comprising silicon germanium having a suitable concentration ratio of silicon to germanium (¶ 0106: 208 comprises silicon germanium).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the more than one first epitaxy layers of Xie in view of Cheng to comprise silicon germanium, as a means to provide etch selectivity to other materials, such as the mask (Cheng, ¶ 0110).
Regarding claim 18, Xie in view of Cheng teaches the method of claim 17, wherein the etching comprising performing a selective dry etching process configured to selectively remove material having the suitable concentration ratio of silicon to germanium (Xie, ¶ 0130: 208 at least partially removed with selective dry etch).
Regarding claim 19, Xie in view of Cheng teaches the method of claim 16, comprising at least one second epitaxy layer.
Xie in view of Cheng as applied to claim 16 above does not teach wherein the at least one second epitaxy layer forms a second fin in a first direction of a metal-oxide semiconductor field effect transistor (MOSFET) channel.
However, Xie does teach embodiments (figs. 2A-2C among others) including at least one second epitaxy layer (206) forms a second fin in a first direction of a metal-oxide semiconductor field effect transistor (MOSFET) channel (¶ 0104 & figs. 15A-15B: 206 functions as a fin-shaped channel region of an FET device).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to configure the at least one second epitaxy layers of Xie in view of Cheng as a channel region, as a means to provide an FET with increased effective channel width for a given device foot print (Xie, ¶ 0096).
Regarding claim 20, Xie in view of Cheng teaches the method of claim 19, wherein the silicon layer forms a first fin extending in a first direction of the MOSFET channel (¶¶ 0099, 0160 & fig. 20: 2006 formed a fin shape which implicitly extends in a cross-gate “Y” direction), the second fin protruding from the first fin in the second direction and crossing the first fin (fig. 26: 2106 protrudes from 2006).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRIAN TURNER whose telephone number is (571)270-5411. The examiner can normally be reached M-F 8am-5pm.
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/BRIAN TURNER/Examiner, Art Unit 2818
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