DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 5 and 10-17 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by LEE et al. (FP: KR20160097926A, As in the IDS), herein after LEE.
Regarding claim 1, LEE teaches a method for producing a solar cell having a rear-side contact with a tunnel barrier, the method comprises:
providing a monocrystalline wafer (figure 3a, reference sign 110) having a front side and a rear side (implicit for figure 3a), the wafer comprising silicon and a dopant (paragraph [0075]),;
producing a tunnel barrier (figure 3b, 21/31; paragraph [0076]) on the wafer figure 3b, reference sign 110);
depositing a polycrystalline or amorphous layer (figure 3c, reference signs 120/130; paragraphs [0078]-[0080]) on the tunnel barrier (figure 3b, 21/31), wherein the polycrystalline or amorphous layer comprises silicon (paragraph [0021]); and removing the polycrystalline or amorphous layer on the front side by gas-phase etching, wherein an etchant for the gas-phase etching comprises F2 (paragraph [0091]; "fluorine containing gas". As an example, a gas containing a halogen element may be used. For example, a fluorine-containing gas (eg, CF 4, SF 6, etc.), a chlorine-containing gas (eg, Cl 2, etc.), an oxygen-containing gas, etc. may be used together. For example, the ratio of chlorine-containing gas to fluorine-containing gas may be 1: 0.3 to 1: 0.01, and the ratio of oxygen gas: (sum of fluorine-containing gas and chlorine-containing gas) may be 1: 0.1 to 1: 1. have. Within this range, the etching selectivity of the oxide and the semiconductor material may be increased to etch and texture only desired portions).
Regarding claim 5, LEE teaches the method according to claim 1, wherein the gas-phase etching is carried out with a gas phase, and the F2 concentration is about 20% to about 30% (paragraph [0091]; "fluorine containing gas". As an example, a gas containing a halogen element may be used. For example, a fluorine-containing gas (eg, CF 4, SF 6, etc.), a chlorine-containing gas (eg, Cl 2, etc.), an oxygen-containing gas, etc. may be used together. For example, the ratio of chlorine-containing gas to fluorine-containing gas may be 1: 0.3 to 1: 0.01, and the ratio of oxygen gas: (sum of fluorine-containing gas and chlorine-containing gas) may be 1: 0.1 to 1: 1. have. Within this range, the etching selectivity of the oxide and the semiconductor material may be increased to etch and texture only desired portions).
Regarding claim 10, LEE teaches the method according to claim 1, wherein the gas-phase etching is stopped upon reaching the tunnel barrier at the front side ([Paragraph [0091]).
Regarding claim 11, LEE teaches the method according to claim 10, wherein the gas-phase etching is continued when reaching the tunnel barrier at the front side so that a surface patterning is produced on the front side of the wafer ([Paragraph [0091]).
Regarding claim 12, LEE teaches the method according to claim 1, further comprising: diffusing boron into the wafer; and removing the boron-containing layer on the rear side (Paragraph [0082]-[0088]).
Regarding claim 13, LEE teaches the m method according to claim 12, wherein the borosilicate glass layer forming when boron is diffused on the rear side and/or on the front side of the wafer is removed in a wet chemical process (Paragraph [0092], [0082]-[0091]).
Regarding claim 14, LEE teaches the method according to claim 12, wherein the tunnel barrier has a thickness from about 1 nm to about 5 nm (Paragraph [0026]).
Regarding claim 15, LEE teaches the method according to claim 14, wherein the polycrystalline or amorphous layer has a thickness from about 30 nm to about 300 nm (Paragraph [0033]).
Regarding claim 16, LEE teaches the method according to claim 15, wherein the tunnel barrier comprises SiOx wherein 1 < x < 2. (Paragraph [0021])
Regarding claim 17, LEE teaches the method according to claim 1, wherein the polycrystalline or amorphous layer further contains at least one dopant (Paragraphs [0080]-[0085]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-4 and 6-9 are rejected under 35 U.S.C. 103 as being unpatentable over LEE, in view of known arts in the industry
Regarding claim 2, LEE teaches the method according to claim 1, wherein for the gas-phase etching, the wafer is heated to a temperature from about 120°C to about 260°C (At this time, by controlling the type and amount of the gas used in the reactive ion etching, the first conductive region 20 is easily etched without etching the mask layer made of oxide, and irregularities are formed on the semiconductor substrate 110 by texturing. can do. RIE or gas phase etching are done below 300C as per Bishal Kaffle et al., paper name: “On the formation if Black silicon Features by Plasma less etching of Silicon…..”. In this paper, we study the plasma-less etching of Si in F2/N2 gas mixture when the Si wafer is heated at moderate temperatures of up to 300 °C).
Regarding claim 3, LEE teaches the method according to claim 2, wherein for gas-phase etching, the wafer is heated to a temperature from about 190°C to about 200°C (At this time, by controlling the type and amount of the gas used in the reactive ion etching, the first conductive region 20 is easily etched without etching the mask layer made of oxide, and irregularities are formed on the semiconductor substrate 110 by texturing. can do. RIE or gas phase etching are done below 300C as per Bishal Kaffle et al., paper name: “On the formation if Black silicon Features by Plasma less etching of Silicon…..”. In this paper, we study the plasma-less etching of Si in F2/N2 gas mixture when the Si wafer is heated at moderate temperatures of up to 300 °C).
Regarding claim 4, LEE teaches the method according to claim 1, wherein for the gas-phase etching, the wafer rests on a conveyor belt (this is known to people skilled in the art like Bishal Kaffle et al.).
Regarding claim 6, LEE teaches the method according to claim 5, wherein the gas-phase etching is carried out with a gas phase which is supplied with F2 at a flow rate from about 5 slm to about 7 slm (this is known to people skilled in the art as Kazem et al. (US 2022/0301887 A1) in Paragraphs [0016], [0023]-[0029], claim 4).
Regarding claim 7, LEE teaches the method according to claim 1 wherein the gas-phase etching is carried out with a gas phase which is supplied with N2 at a flow rate from about 0.75 slm to about 1.25 slm (this is known to people skilled in the art as Kazem et al. (US 2022/0301887 A1) in Paragraphs [0016], [0023]-[0029], claim 4).
Regarding claim 8, LEE teaches the method according to claim 7, wherein the gas-phase etching is carried out between about 15 sec. and about 35 sec (this is known to people skilled in the art as Kazem et al. (US 2022/0301887 A1) in Paragraphs [0016], [0023]-[0029], claim 3).
Regarding claim 9, LEE teaches the method according to claim 1, wherein the gas-phase etching is carried out in a gas phase which has a pressure from about 960 mbar to about 1040 mbar (this is known to people skilled in the art as Kazem et al. (US 2022/0301887 A1) in Paragraph [0029], claim 14).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See form PTO-892.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHEIKH MARUF whose telephone number is (571)270-1903. The examiner can normally be reached on M-F, 8am-6pm EDT.
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/SHEIKH MARUF/Primary Examiner, Art Unit 2897