DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 10 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 10 recites “wherein the second unit pixel comprises a single photodiode”. It is unclear whether the limitation requires that the second pixel unit consist of only one photodiode, or may contain additional photodiodes besides one. “Comprise” may be interpreted as open-ended, allowing for additional elements, but “single” implies only one. Because of this, the scope of the claim is indefinite. The claim is rejected below under U.S.C. 103 under two interpretations: (1) “wherein the second unit pixel comprises a photodiode” and (2) “wherein the second unit pixel consists of a single photodiode”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-11, and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Gove; Robert et al. US 2013/0070109; hereinafter Gove) in view of Ma; Jiaju et al. (US 2021/0151485; hereinafter Ma).
Regarding claim 1, Gove discloses an image sensing device, comprising:
a plurality of pixel arrays (the 70A region of array 14 and the 70B region of array 14; Figs 2-4; ¶ [0020-38]) wherein the pixel arrays comprise:
a first pixel array (70A; Fig 4) comprising a plurality of first unit pixels (28, in region 70A; Figs 3-4; ¶ [0026,0035]) and
a second pixel array (70B,70C; Fig 4) disposed to surround the first pixel array and comprising a plurality of second unit pixels (28, in region 70B; Figs 3-4; ¶ [0026,0035]),
wherein the first unit pixel comprises photodiodes (44{44A}; Fig 3; ¶ [0026]).
Gove does not specifically disclose the photodiodes of the first unit pixel comprise a plurality of photodiodes (it is unclear to the Examiner), and each photodiode of the first unit pixel is connected to a different transfer transistor.
In the same field of endeavor, Ma discloses a similar image sensing device (100; Fig 1), wherein a first unit pixel (sub-pixel; Fig 1; ¶ [0024]) comprises a plurality (115) of photodiodes (SW1-SW4; Fig 1; ¶ [0024-26]) and each photodiode of the first unit pixel is connected to a different transfer transistor (TG1-TG4 respectively; Fig 1; ¶ [0024,0026]).
Accordingly, it would have been obvious to a person having ordinary skill in the art that the first pixel unit of Gove may comprise a plurality of photodiodes each connected to a different transfer transistors as disclosed by Ma. One may have been motivated to thus combine the disclosures of Ma and Gove for a number of reasons including (1) because Gove does not specifically disclose the configuration of the photodiodes in the first until pixel, while Ma does so in the similar device, and (2) to implement the specific scalable pixel size image sensor of Ma (Abstr, entire document), having the variable resolution (foveated) region configuration of Gove (Fig 4; ¶ [0037]). One would have had a reasonable expectation of success because of the similar structures (photodiode arrays having variable resolution) in the similar endeavors.
Regarding claim 2, Gove in view of Ma discloses the image sensing device of claim 1,
wherein the second unit pixel comprises a plurality of photodiodes (Ma; 115, comprising SW1-SW4 {in the second unit pixel of Gove}; Fig 1; ¶ [0024-26]) and
each photodiode of the second unit pixel is connected to a first transfer transistor (Ma; TG1, connected through TG2-TG4 to SW2-SW4 respectively; ¶ [0024,0026]).
Regarding claim 3, Gove in view of Ma discloses the image sensing device of claim 2,
wherein the first unit pixel comprises a first photodiode, a second photodiode, a third photodiode, and a fourth photodiode (Ma; SW1-SW4 respectively, according to claim 1; Fig 1), and
wherein the first photodiode is connected to a first transfer transistor (Ma; TG1; Fig 1; ¶ [0024]),
the second photodiode is connected to a second transfer transistor (Ma; TG2; Fig 1; ¶ [0024]),
the third photodiode is connected to a third transfer transistor (Ma; TG3; Fig 1; ¶ [0024]), and
the fourth photodiode is connected to a fourth transfer transistor (Ma; TG4; Fig 1; ¶ [0024]).
Regarding claim 4, Gove in view of Ma discloses the image sensing device of claim 3, further comprising:
a timing controller (Ma; row signal generator 105; Fig 1; ¶ [0031])) configured to control operations of the first transfer transistor, the second transfer transistor, the third transfer transistor, and the fourth transfer transistor (Ma; TG1-TG4 respectively, Figs 2-4; ¶ [0031-33]),
wherein the first unit pixel comprises a first select transistor (Ma; 123; Fig 1; ¶ [0024]; corresponding to Gove; {RSA/B} 54, in region 70A; Fig3; ¶ [0028]) and
the second unit pixel comprises a second select transistor (Ma; 123; Fig 1; ¶ [0024]; corresponding to Gove; {RSA/B} 54, in region 70B; Fig3).
Gove in view of Ma does not specifically disclose wherein, in a full mode, the timing controller activates the first transfer transistor, the second transfer transistor, the third transfer transistor, and the fourth transfer transistor and turns on the first select transistor and the second select transistor so that both the first unit pixel and the second unit pixel are in an activated state. However, all of the elements of claim 4 are contained between Gove and Ma. For example, Figs 2-4 of Ma disclose timing sequences depending upon desired resolution to either alternately or simultaneously turn on each of the first through fourth transfer transistors along with the select transistors for each of the respective first and second unit pixels as combined under claim 1. It would have been obvious to a person having ordinary skill in the art to have combined the disclosed elements and to have recognized the results of the combination were predictable, since each element would perform the same function in combination as is disclosed separately, similar to the description by Gove with respect to Fig. 4 (Gove; ¶ [0039-52]). It is in this regard that a Prima Facie case of obviousness is established and limitations of claim 4 considered met. See MPEP 2141.I, 2141.III.A, and 2143.I.A.
Regarding claim 5, Gove in view of Ma discloses the image sensing device of claim 4,
wherein the first unit pixel comprises a first reset transistor (Gove; {RST} 48, in the first unit pixel per claim 1; Figs 3-4; ¶ [0026]; corresponding to Ma; {RST} 125; Fig 1; ¶ [0024]), and
the second unit pixel comprises a second reset transistor (Gove; {RST} 48, in the second unit pixel per claim 1; Figs 3-4; ¶ [0026]; corresponding to Ma; {RST} 125; Fig 1; ¶ [0024]).
Gove in view of Ma does not specifically disclose wherein the timing controller activate the first reset transistor so that the second unit pixel is in a deactivated state, when an object is detected while both the first unit pixel and the second unit pixel are in an activated state; wherein the timing controller sequentially turns on the second transfer transistor, the third transfer transistor, and the fourth transfer transistor, and sequentially turns on the second select transistor and the second reset transistor so that the first unit pixel is in an activated state.
However, all of the elements of claim 5 are contained between Gove and Ma. For example,
Fig 2 of Ma discloses the timing controller sequentially turns on the second to fourth transfer transistors (Ma; 1751, for example, depicting activation of transfer transistors TG1-TG4; Fig 2) and sends reset signal RST shown in 171 of Fig. 2 and read select signal RS/181 of Fig. 2 (Ma; ¶ [0031-32]). The limitation of activating the first reset transistor so that the second unit pixel is in a deactivated state, when an object is detected while both the first unit pixel and the second unit pixel are in an activated state would have been obvious to a person having ordinary skill in the art according to the desired properties of the image sensing device and in view of Gove (¶ [0039-44]), which discloses exemplary modes and sequences of utilizing the first and second pixel arrays 70A and 70B of Fig. 4. Further, no structural limitation is found in the image sensing device of Gove in view of Ma which would prevent it from operating according to claim 5.
Accordingly, it would have been obvious to a person having ordinary skill in the art to have combined the disclosed elements and to have recognized the results of the combination were predictable, since each element would perform the same function in combination as is disclosed separately. It is in this regard that a Prima Facie case of obviousness is established and limitations of claim 5 considered met. See MPEP 2141.I, 2141.III.A, and 2143.I.A.
Regarding claim 6, Gove in view of Ma discloses the image sensing device of claim 1,
wherein the second unit pixel comprises a plurality of photodiodes (Ma; 115, comprising SW1-SW4 {in the second unit pixel of Gove}; Fig 1; ¶ [0024-26]) and
each photodiode of the second unit pixel is connected to a zeroth transfer transistor (Ma; TG1, connected through TG2-TG4 to SW2-SW4 respectively; ¶ [0024,0026]).
Regarding claim 7, Gove in view of Ma discloses the image sensing device of claim 6,
wherein the first unit pixel comprises a first photodiode, a second photodiode, a third photodiode, and a fourth photodiode (Ma; SW1-SW4 respectively, according to claim 1; Fig 1), and
wherein the first photodiode is connected to a first transfer transistor (Ma; TG1; Fig 1; ¶ [0024]),
the second photodiode is connected to a second transfer transistor (Ma; TG2; Fig 1; ¶ [0024]),
the third photodiode is connected to a third transfer transistor (Ma; TG3; Fig 1; ¶ [0024]), and
the fourth photodiode is connected to a fourth transfer transistor (Ma; TG4; Fig 1; ¶ [0024]).
Regarding claim 8, Gove in view of Ma discloses the image sensing device of claim 7, further comprising:
a timing controller (Ma; row signal generator 105; Fig 1; ¶ [0031])) configured to activate the zeroth transfer transistor, the second transfer transistor, the third transfer transistor, and the fourth transfer transistor (Ma; TG1-TG4 respectively, Figs 2-4; ¶ [0031-33]),
wherein the first unit pixel and the second unit pixel comprise a first select transistor (Ma; 123; Fig 1; ¶ [0024]; corresponding to Gove; {RSA/B} 54, in region 70A; Fig3; ¶ [0028]) and
Gove in view of Ma does not specifically disclose wherein, in a full mode, the timing controller activates the zeroth transfer transistor, the first transfer transistor, the second transfer transistor, the third transfer transistor, and the fourth transfer transistor and turns on the first select transistor so that both the first unit pixel and the second unit pixel are in an activated state. However, all of the elements of claim 8 are contained between Gove and Ma. For example, Figs 2-4 of Ma disclose timing sequences depending upon desired resolution to either alternately or simultaneously turn on each of the zeroth through fourth transfer transistors along with the select transistors for each of the respective first and second unit pixels as combined under claim 1. Gove specifically discloses activating both the first and second unit pixels at the same time such that an image is captured from both 70A and 70B having different resolutions and having a smaller file size (Gove; ¶ [0037]).
It would have been obvious to a person having ordinary skill in the art to have combined the disclosed elements and to have recognized the results of the combination were predictable, since each element would perform the same function in combination as is disclosed separately. It is in this regard that a Prima Facie case of obviousness is established and limitations of claim 8 considered met. See MPEP 2141.I, 2141.III.A, and 2143.I.A.
Regarding claim 9, Gove in view of Ma discloses the image sensing device of claim 9,
wherein the first unit pixel and the second unit pixel comprise a first reset transistor (Gove; {RST} 48, in the first unit pixel and in the second unit pixel as described under claim 1; Figs 3-4; ¶ [0026]; corresponding to Ma; {RST} 125; Fig 1; ¶ [0024]), and
Gove in view of Ma does not specifically disclose wherein the timing controller, when an object is detected while both the first unit pixel and the second unit pixel are in an activated state, maintains the zeroth transfer transistor in a deactivated state so that the second unit pixel is in a deactivated state; sequentially activates the second transfer transistor, the third transfer transistor, and the fourth transfer transistor and sequentially turns on the first select transistor and the first reset transistor so that the first unit pixel is in an activated state.
However, all of the elements of claim 9 are contained between Gove and Ma. For example,
Fig 2 of Ma discloses the timing controller sequentially turns on the second to fourth transfer transistors (Ma; 1751, for example, depicting activation of transfer transistors TG1-TG4; Fig 2) and sends reset signal RST shown in 171 of Fig. 2 and read select signal RS/181 of Fig. 2 (Ma; ¶ [0031-32]). The limitation wherein the timing controller, when an object is detected while both the first unit pixel and the second unit pixel are in an activated state, maintains the zeroth transfer transistor in a deactivated state so that the second unit pixel is in a deactivated state would have been obvious to a person having ordinary skill in the art according to the desired properties of the image sensing device and in view of Gove (¶ [0039-44]), which discloses exemplary modes and sequences of utilizing the first and second pixel arrays 70A and 70B of Fig. 4. Further, no structural limitation is found in the image sensing device of Gove in view of Ma which would prevent it from operating according to claim 9.
Accordingly, it would have been obvious to a person having ordinary skill in the art to have combined the disclosed elements and to have recognized the results of the combination were predictable, since each element would perform the same function in combination as is disclosed separately. It is in this regard that a Prima Facie case of obviousness is established and limitations of claim 5 considered met. See MPEP 2141.I, 2141.III.A, and 2143.I.A.
Regarding claim 10, Gove in view of Ma discloses the image sensing device of claim 1,
wherein the second unit pixel comprises a (single) photodiode (Ma; SW1 {in the second unit pixel of Gove}; Fig 1; ¶ [0024-26]) and
the (single) photodiode of the second unit pixel is connected to a first transfer transistor (Ma; TG1; ¶ [0024,0026]).
Regarding claim 11, Gove in view of Ma discloses the image sensing device of claim 10,
wherein the first unit pixel comprises a first photodiode, a second photodiode, a third photodiode, and a fourth photodiode (Ma; SW1-SW4 respectively, according to claim 1; Fig 1), and
wherein the first photodiode is connected to a first transfer transistor (Ma; TG1; Fig 1; ¶ [0024]),
the second photodiode is connected to a second transfer transistor (Ma; TG2; Fig 1; ¶ [0024]),
the third photodiode is connected to a third transfer transistor (Ma; TG3; Fig 1; ¶ [0024]), and
the fourth photodiode is connected to a fourth transfer transistor (Ma; TG4; Fig 1; ¶ [0024]).
Regarding claim 16, Gove in view of Ma discloses the image sensing device of claim 1, wherein the second pixel array (Gove; 70B,70C; Fig 4) comprises:
a first peripheral pixel array (Gove; 70B; Fig 4; ¶ [0035-38) disposed to surround the first pixel array (Gove; 70A; Fig 4) and comprising a plurality of second unit pixels (Gove; 28, in region 70B; Figs 3-4; ¶ [0026,0035]); and
a second peripheral pixel array (Gove; 70C; Fig 4; ¶ [0035-38) disposed to surround the first peripheral pixel array and comprising a plurality of third unit pixels (Gove; 28, in region 70C; Figs 3-4; ¶ [0026,0035]).
Regarding claim 17, Gove in view of Ma discloses the image sensing device of claim 16, wherein
the second unit pixel comprises a plurality of photodiodes or a single photodiode (Gove; 44{44A}, in region 70B; Fig 3; ¶ [0026]), and
the third unit pixel comprises a plurality of photodiodes or a single photodiode (Gove; 44{44A}, in region 70C; Fig 3; ¶ [0026]).
Claims 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Gove; Robert et al. US 2013/0070109; hereinafter Gove) in view of Ma; Jiaju et al. (US 2021/0151485; hereinafter Ma), and further in view of Usui; Takafumi et al. (US 2018/0213142; hereinafter Usui).
Regarding claim 10 (2nd interpretation), Gove in view of Ma discloses the image sensing device of claim 1, wherein the second unit pixel (Gove; 28, in region 70B; Figs 3-4) is connected to a zeroth transfer transistor or a first transfer transistor (Gove; 52; Fig 3; ¶ [0027]), but does not disclose wherein the second unit pixel consists of a single photodiode, and the single photodiode of the second unit pixel is connected to a zeroth transfer transistor or a first transfer transistor.
In the same field of endeavor, Usui discloses an image sensing device wherein one pixel (Abstr; for example, 311R; Fig 3b; ¶ [0080-91]) includes a single photodiode and a second pixel includes a plurality of photodiodes (Abstr; for example, 311Gr; Fig 3b; ¶ [0088]). Accordingly, it would have been obvious for the second unit pixel of Gove in view of Ma to consist of a single photodiode, as taught by Usui. One may have been motivated to do this in order to ensure sensitivity of the second unit pixel to wavelengths of interest, enabled by a larger single photodiode rather than a plurality of smaller photodiodes (Usui; ¶ [0081,0180]). One would have had a reasonable expectation of success because of the similar structures disclosed in the similar endeavors, and because both single photodiode and multiple photodiode pixels are well-known in the art.
Regarding claim 11, Gove in view of Ma and further in view of Usui discloses the image sensing device of claim 10,
wherein the first unit pixel comprises a first photodiode, a second photodiode, a third photodiode, and a fourth photodiode (Ma; SW1-SW4 respectively, according to claim 1; Fig 1), and
wherein the first photodiode is connected to a first transfer transistor (Ma; TG1; Fig 1; ¶ [0024]),
the second photodiode is connected to a second transfer transistor (Ma; TG2; Fig 1; ¶ [0024]),
the third photodiode is connected to a third transfer transistor (Ma; TG3; Fig 1; ¶ [0024]), and
the fourth photodiode is connected to a fourth transfer transistor (Ma; TG4; Fig 1; ¶ [0024]).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Gove; Robert et al. US 2013/0070109; hereinafter Gove) in view of Ma; Jiaju et al. (US 2021/0151485; hereinafter Ma), and further in view of Yamazaki; Takeshi (US 2022/0068983; hereinafter Yamazaki).
Regarding claim 12, Gove in view of Ma discloses the image sensing device of claim 1, but does not disclose wherein the first unit pixel or the second unit pixel comprises a sawtooth-shaped concavo-convex structure formed on a substrate.
In the same field of endeavor Yamazaki discloses an image sensing device wherein a light-receiving element comprises a sawtooth-shaped concavo-convex structure (701; Fig 41; ¶ [0270]) formed on a substrate (40; Fig 41; ¶ [0270]). Accordingly, it would have been obvious to a person having ordinary skill in the art to have combined the sawtooth-shaped concavo-convex structure of Yamazaki with the image sensing device of claim 1 by including a similar structure in the first unit pixel or the second unit pixel. One would have been motivated to do this to reduce reflectivity and improve quantum efficiency and contrast between pixels (Yamazaki; ¶ [0270]).
Claims 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over Gove; Robert et al. US 2013/0070109; hereinafter Gove) in view of Ma; Jiaju et al. (US 2021/0151485; hereinafter Ma), and further in view of Hoshino; Kozo (US 2020/0358989; hereinafter Hoshino).
Regarding claim 13, Gove in view of Ma discloses the image sensing device of claim 3, but does not disclose comprising: a deep trench isolation layer configured to optically separate the first unit pixel from the second unit pixel, and wherein the deep trench isolation layer is formed between the first unit pixel and the second unit pixel and between regions comprising each photodiode of the first unit pixel.
In the same field of endeavor, Hoshino discloses an imaging device comprising a deep trench isolation layer (101; Fig 18; ¶ [0234]) between each photodiode (PD; Fig 18) in a pixel array. Accordingly, it would have been obvious for a person having ordinary skill in the art to have combined a deep trench isolation layer such as disclosed by Hoshino with the image sensing device of claim 3, satisfying the limitation of claim 13. One would have been motivated to do this because in order to isolate the signal of each photodiode from one another, as is well-known in the art, using a well-known isolation structure.
Regarding claim 14, Gove in view of Ma discloses the image sensing device of claim 3, but does not disclose wherein each of the first unit pixel and the second unit pixel comprises a plurality of microlenses formed at a top region of the first unit pixel and the second unit pixel, and wherein a microlens of the first unit pixel has a same width as a microlens of the second unit pixel.
In the same field of endeavor, Hoshino discloses an imaging device comprising a plurality of microlenses (on-chip lenses 38; Figs 3,18; ¶ [0083]) each having the same width (that of individual pixels). Accordingly, it would have been obvious to a person having ordinary skill in the art to have included microlenses such as those disclosed by Hoshino in the image sensing device of claim 3, satisfying the limitation of claim 14. One would have been motivated to do this in order to improve light gathering and focus light on the sensing area, as is well-known in the art, and would have had a reasonable expectation of success because of the similar structures including photodiodes in each disclosure.
Regarding claim 15, Gove in view of Ma and further in view of Usui discloses the image sensing device of claim 11 (second interpretation), but does not disclose wherein the first unit pixel comprises a plurality of microlenses formed at a top region of the first unit pixel, and the second unit pixel comprises a single microlens formed at a top region of the second unit pixel, and wherein a width of the microlens of the second unit pixel is greater than a width of the microlens of the first unit pixel.
In the same field of endeavor, Hoshino discloses an imaging device comprising a plurality of microlenses (on-chip lenses 38 and 91; Fig 17; ¶ [0222-224]) comprising different sizes (91 larger than 38). Accordingly, it would have been obvious to have included microlenses having different sizes, as disclosed by Hoshino, in the image sensing device of claim 11. One may have been motivated to configure a width of the microlens of the second unit pixel greater than a width of the microlens of the first unit pixel, because a photodiode of the second unit pixel is larger than a photodiode of the first unit pixel, as explained under claim 10 (second interpretation). One would have had a reasonable expectation of success because Hoshino discloses the microlenses may be formed of varying sizes, as is known in the art.
Claims 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lu; Peirui et al. (US 2024/0313011; hereinafter Lu) in view of Toda; Atsushi (US 2018/0081099; hereinafter Toda).
Regarding claim 18, Lu discloses an image sensing device, comprising:
a plurality of pixel arrays (101,102; Fig 7; ¶ [0005]), wherein the pixel arrays comprise:
a first pixel array (101 {darker regions in the figure}; Fig 7; ¶ [0033,0069-72]) formed in a central region and a corner region and comprising a plurality of first unit pixels (a first number of first pixel units; ¶ [0033]) ); and
a second pixel array (102 {lighter regions in the figure}; Fig 7; ¶ [0033-34,0069-72]) formed in a region other than the central region and the corner region and comprising a plurality of second unit pixels (a second number of second pixel units; ¶ [0033]),
wherein the first unit pixel comprises a plurality of (stacked) photosensitive elements (¶ [0033]),
Lu does not disclose (1) wherein an area of the first pixel array is smaller than an area of the second pixel array, and (2) the stacked photosensitive elements are photodiodes.
Regarding (1), Lu discloses that the ratio of first number of first pixel units to the second number of second pixel units may be set depending on actual needs (¶ [0036]), and implies that each pixel unit is of a same area (as number of pixels is increased, area of a single pixel becomes smaller; ¶ [0030]), such that a smaller number of pixel units produces a smaller area of an array of pixels. Accordingly, it would have been obvious to a person having ordinary skill in the art to have implemented the image sensing device of Lu such that an area of the first pixel array is smaller than an area of the second pixel array, when setting the ratio. One may have been motivated to do this based upon particular functionality requirements, design and manufacturing considerations. One would have had a reasonable expectation of success because of Lu’s disclosure that this may be set depending upon actual needs.
Regarding (2), in the same field of endeavor, Toda discloses a stacked photosensitive element (31; Fig 4; ¶ [0075]) comprising photodiodes. Accordingly, it would have been obvious to person having ordinary skill in the art the stacked photosensitive elements of Lu may be photodiodes. One may have been motivated to come to this conclusion, with a reasonable expectation of success, because Lu does not provide further structure detail about the stacked photosensitive element, choosing to disclose the generic element, and because 31 of Toda satisfies the requirement of Lu that the photosensitive elements of the first unit pixel 101 are configured to acquire photo signals of at least two colors (Lu; ¶ [0033]; Toda; ¶ [0075])).
Regarding claim 19, Lu in view of Toda discloses the image sensing device of claim 18, wherein the second unit pixel comprises a plurality of photodiodes or a single photodiode (Lu; ¶ [0034]).
Regarding claim 20, Lu discloses an image sensing device, comprising:
a plurality of pixel arrays (Fig 8; ¶ [0005]), wherein the pixel arrays comprise:
a first pixel array (the array comprising the plurality of 101 in Fig 8; ¶ [0074,0033]) formed in a region other than a central region and a corner region and comprising a plurality of first unit pixels (a number of first pixel unit 101; ¶ [0033]), and
a second pixel array (the array comprising the plurality of 1021,1022,1023 in Fig 8; ¶ [0074,0034]) formed in the central region and the corner region and comprising a plurality of second unit pixels (a second number of second pixel units comprising 1021,1022,1023; ¶ [0034,0074]),
wherein the first unit pixel comprises a plurality of (stacked) photosensitive elements (¶ [0033]), wherein an area of the first pixel array is smaller than an area of the second pixel array (as shown in Fig 8, there are three second unit pixels (1021-1023) for every one first unit pixel (101), and an area of the first pixel array is correspondingly smaller than an area of the second pixel array).
Lu does not disclose the stacked photosensitive elements are photodiodes.
In the same field of endeavor, Toda discloses a stacked photosensitive element (31; Fig 4; ¶ [0075]) comprising photodiodes. Accordingly, it would have been obvious to person having ordinary skill in the art the stacked photosensitive elements of Lu may be photodiodes. One may have been motivated to come to this conclusion, with a reasonable expectation of success, because Lu does not provide further structure detail about the stacked photosensitive element, choosing to disclose the generic element, and because 31 of Toda satisfies the requirement of Lu that the photosensitive elements of the first unit pixel 101 are configured to acquire photo signals of at least two colors (Lu; ¶ [0033]; Toda; ¶ [0075])).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lee; Ssang Soo (US 2020/0373339; the prior art disclose a plurality of pixel zones surrounding a central pixel zone where sizes of central pixels are smaller than surrounding pixels);
Kim; Junghyun (US 2021/0120199; the prior art disclose a plurality of pixel zones surrounding a central pixel zone where sizes of pixels are different in different zones
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRAD KNUDSON whose telephone number is (703)756-4582. The examiner can normally be reached Telework 9:30 -18:30 ET; M-F.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos Feliciano can be reached at 571-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/B.A.K./Examiner, Art Unit 2817
/ELISEO RAMOS FELICIANO/Supervisory Patent Examiner, Art Unit 2817