DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Amendment filed May 15, 2026.
Claims 1-30 are pending. Claims 21 and 30 are amended. Claims 1, 21 and 30 are independent.
Continued Examination Under 37 CFR 1.114 After Final Rejection
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on May 15, 2026 has been entered.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55 received on August 18, 2023.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 21-30 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Shin et al. (U.S. 2023/0071618; hereinafter “Shin”).
Regarding independent claim 21, Shin discloses a memory device (Fig. 1: 100), comprising:
a memory cell array (Fig. 2: 110) including memory cells (Fig. 4: MCs); and
peripheral circuitry (Fig. 2: 120 and 130) coupled to the memory cell array (Fig. 2: 110) through word lines (Fig. 4: WLs), wherein the peripheral circuitry includes a control logic (Fig. 2: 130), and wherein the control logic is programmed to control operation of the peripheral circuitry (see page 3, par. 0043) to
apply an N-th programming pulse (Fig. 5: Vpgms) to the memory cells (Fig. 4: MCs) each with a target programming state being an i-th programming state, wherein I and N are positive integers (see page 6, par. 0099).
As discussed above, Shin’s memory device is substantially identical in structure to the claimed “memory device,” where the differences reside only in the remaining limitations relating to function of “perform a first sub-verification and an M-th second sub-verification corresponding to the i-th programming state on the memory cells to obtain a first sub- result and an M-th second sub-result, respectively, wherein M is a positive integer, the first sub-result indicates whether a threshold voltage-of each of the memory cells is less than a preset voltage, the M-th second sub-result indicates whether the threshold voltage of each of the memory cells is less thana target threshold voltage of the i-th programming state, and wherein the target threshold voltage is greater than the preset voltage, determine a first subset of the memory cells to be programmed with an (N+1)-th programming pulse, based on the M-th second sub-result, wherein a voltage difference between the (N+L)-th programming pulse and the N-th programming pulse is greater than or equal to a voltage difference between the target threshold voltage and the preset voltage, and apply the (N+1)-th programming pulse to the word line, wherein the memory cells are determined to be successfully programmed to the i-th programming state after applying the (N+1)-th programming pulse to the word line, based on the first sub-result indicating that a number of failed bits in the first sub-verification is less than a first preset value.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Shin’s memory device appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 22, Shin discloses the limitations with respect to claim 21.
As discussed above, Shin’s memory device is substantially identical in structure to the claimed “memory device,” where the differences reside only in the remaining limitations relating to function of “perform the first sub-verification on the memory cells based on a first sensing duration to obtain the first sub-result and perform the M-th second sub-verification on the memory cells based on a second sensing duration to obtain the M-th second sub-result, wherein the second sensing duration is greater than the first sensing duration.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Shin’s memory device appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 23, Shin discloses the limitations with respect to claim 21.
As discussed above, Shin’s memory device is substantially identical in structure to the claimed “memory device,” where the differences reside only in the remaining limitations relating to function of “apply a first sub-verification voltage to the word line to perform the first sub- verification on the memory cells to obtain the first sub-result, wherein the first sub-verification voltage is equal to the preset voltage and apply a second sub-verification voltage to the word line to perform the M-th second sub-verification on the memory cells to obtain the M-th second sub-result, wherein the second sub-verification voltage is equal to the target threshold voltage.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Shin’s memory device appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 24, Shin discloses the limitations with respect to claim 21.
As discussed above, Shin’s memory device is substantially identical in structure to the claimed “memory device,” where the differences reside only in the remaining limitations relating to function of “apply a first pre-charging voltage to a bit line coupled to the memory cells to perform the first sub-verification on the memory cells based on a preset sensing duration to obtain the first sub-result and apply a second pre-charging voltage to the bit line to perform the M-th second sub-verification on the memory cells based on the preset sensing duration to obtain the M-th second sub-result, wherein the second pre-charging voltage is greater than the first pre-charging voltage.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Shin’s memory device appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 25, Shin discloses the limitations with respect to claim 21.
As discussed above, Shin’s memory device is substantially identical in structure to the claimed “memory device,” where the differences reside only in the remaining limitations relating to function of “wherein the threshold voltage of each of the first subset of the memory cells is less than the target threshold voltage based on the M-th second sub-result.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Shin’s memory device appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 26, Shin discloses the limitations with respect to claim 21.
As discussed above, Shin’s memory device is substantially identical in structure to the claimed “memory device,” where the differences reside only in the remaining limitations relating to function of “determine a second subset of the memory cells to be performed with an (M+1)-th second sub-verification, based on the first sub-result indicating that the number of failed bits in the first sub-verification is greater than or equal to the first preset value and perform the (M+1)-th second sub-verification on the second subset of the memory cells to obtain an (M+1)-th second sub-result after the (N+1)-th programming pulse is applied, wherein the (M+1)-th second sub-result indicates whether a threshold voltage of each of the second subset of the memory cells is less than the target threshold voltage.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Shin’s memory device appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 27, Shin discloses the limitations with respect to claim 21.
As discussed above, Shin’s memory device is substantially identical in structure to the claimed “memory device,” where the differences reside only in the remaining limitations relating to function of “count the number of failed bits in the first sub-verification during applying the (N+1)-th programming pulse.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Shin’s memory device appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 28, Shin discloses the limitations with respect to claim 21.
As discussed above, Shin’s memory device is substantially identical in structure to the claimed “memory device,” where the differences reside only in the remaining limitations relating to function of “wherein the number of failed bits is within a range allowed by an error correction mechanism.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Shin’s memory device appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 29, Shin discloses the limitations with respect to claim 21.
As discussed above, Shin’s memory device is substantially identical in structure to the claimed “memory device,” where the differences reside only in the remaining limitations relating to function of “in response to the first sub-result indicating that the number of failed bits in the first sub-verification is less than the first preset value, determine that a programming verification operation is not performed on the memory cells after applying the (N+1)-th programming pulse.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Shin’s memory device appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding independent claim 30, Shin discloses a memory system (Fig. 1), comprising:
a memory device (Fig. 2: 100) comprising:
a memory cell array (Fig. 2: 110) including memory cells (Fig. 4: MCs), and
peripheral circuitry (Fig. 2: 120 and 130) coupled to the memory cell array (Fig. 2: 110) through word lines (Fig. 4: WLs), wherein the peripheral circuitry includes a control logic (Fig. 2: 130), and wherein the control logic is programmed to control operations of the peripheral circuitry (see page 3, par. 0043) to
apply an N-th programming pulse (Fig. 5: Vpgms) to a word line (Fig. 4: WLs) coupled to the memory cells (Fig. 4: MCs) each with a target programming state being an i-th programming state, wherein i and N are positive integers (see page 6, par. 0099); and
a memory controller (Fig. 1: 200) coupled to the memory device and configured to control the memory device (Fig. 1: 100).
As discussed above, Shin’s memory device is substantially identical in structure to the claimed “memory device,” where the differences reside only in the remaining limitations relating to function of “perform a first sub-verification and an M-th second sub-verification corresponding to the i-th programming state on the memory cells to obtain a first sub-result and an M-th second sub-result, respectively, wherein M is a positive integer, the first sub-result indicates whether a threshold voltage of each of the memory cells is less than a preset voltage, the M-th second sub-result indicates whether the threshold voltage of each of the memory cells is less than a target threshold voltage of the i-th programming state and wherein the target threshold voltage is greater than the preset voltage, determine a first subset of the memory cells to be programmed with an (N+1)-th programming pulse, based on the M-th second sub-result, wherein a voltage difference between the (N+1)-th programming pulse and the N-th programming pulse is greater than or equal to a voltage difference between the target threshold voltage and the preset voltage, and apply the (N+1)-th programming pulse to the word line, wherein the memory cells are determined to be successfully programmed to the i-th programming state after applying the (N+1) programming pulse to the word line, based on the first sub-result indicating that a number of failed bits in the first sub-verification is less than a first preset value and a-memory controller coupled to the memory device and configured to control the memory device.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Shin’s memory device appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Allowable Subject Matter
Claims 1-20 are allowed.
The following is an examiner’s statement of reasons for allowance:
With respect to independent claim 1, there is no teaching or suggestion in the prior art of record to provide the recited steps of determining a first subset of the memory cells to be programmed with an (N+1)-th programming pulse, based on the M-th second sub-result, wherein a voltage difference between the (N+1)-th programming pulse and the N-th programming pulse is greater than or equal to a voltage difference between the target threshold voltage and the preset voltage, and applying the (N+1)-th programming pulse to the word line, wherein the memory cells are determined to be successfully programmed to the i-th programming state after applying the (N+1-th programming pulse to the word line, based on the first sub-result indicating that a number of failed bits in the first sub-verification is less than a first preset value,
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Response to Arguments
Applicant's arguments filed with respect to apparatus claims 21 and 30 have been fully considered but they are not persuasive.
With respect to apparatus claims 21 and 30, Applicant asserts that the recited features are not merely statements of intended functions, but define a particular control arrangement within the peripheral circuitry. Applicant also asserts that the programmed state of the control logic recited in Claim 21 represents a distinct physical structure created by the programming operation, and Shin does not disclose or suggest a control logic in the same programmed state, see Applicant’s Remarks page 13. These particular remarks are not considered persuasive.
The functional limitations as claimed does not recite a particular structure configuration that differentiate the claimed apparatus from the prior art apparatus. Claims 21 and 30 only discloses structurally a memory device comprising a memory cell array including memory cells, and a peripheral circuitry that includes a control logic couple to the memory cell array through word lines to perform certain operations. Claims 21 and 30 does not disclose how the control logic is programmed to control the operation of the peripheral circuitry neither disclose how the structure is arranged to differentiate from the prior art structure. MPEP 2114(II)’s heading states “Manner of operating the device does not differentiate apparatus claims from the prior art.”
Further, Applicant asserts that the Office Action rests on an asserted similarity of overall device structure and on the unsupported assumption that Shin’s control logic would inherently perform the claimed operation, and that assumption is insufficient to establish inherency. Additionally, Applicant asserts that the fact that a certain result or characteristic may occur or be present in the prior art is not sufficient to establish the inherency of that result or characteristic, and accordingly to MPEP 2112 “the Examiner must provide a basis in fact and/or technical reasoning to reasonably support the determination that the allegedly inherent characteristic necessarily flow from the teachings of the applied prior art”, see Applicant’s Remarks pages 14-15. These particular remarks are not considered persuasive.
The rejection above makes clear the necessary rational and evidence by pointing to Shin figures, which show the identical apparatus as applicant shows in their figures. The identity of the subject matter of these figures satisfied the sufficient rational as authorize under MPEP 2182, 2112.01(I) and 2112.02(I), and the burden was properly shifted to applicant to either demonstrate the devices are not the same or prove with evidence the prior art device cannot perform the functions.
Finally, Applicant asserts that the features of Claim 21 constitutes a specific structural configuration of the control logic that is distinct from a control logic that controls the peripheral circuitry to perform a different operation sequence, see Applicant’s Remarks pages 15-16. This particular remark is not considered persuasive.
As recited above, Claims 21 and 30 do not recite how the claimed control logic is configured differently from Shin’s control logic in terms of structure (i.e. a particular structure connection between the control logic and the peripheral circuitry and/or additional circuitry within the control logic) to perform the disclosed functions. Applicant fails to show how the prior art device and claimed device are not the same in terms of structure and fail to prove that the prior art device is incapable of performing the claimed functions.
For the above reasons, the applied rejections are considered proper and maintained.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALFREDO BERMUDEZ LOZADA whose telephone number is (571)272-0877. The examiner can normally be reached 7:00AM-3:30PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander G Sofocleous can be reached at 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Alfredo Bermudez Lozada/ Primary Examiner, Art Unit 2825
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