Prosecution Insights
Last updated: April 19, 2026
Application No. 18/358,727

THREE-DIMENSIONAL MEMORY DEVICE AND METHOD OF MAKING THEREOF INCLUDING EXPANDED SUPPORT OPENINGS AND DOUBLE SPACER WORD LINE CONTACT FORMATION

Non-Final OA §102§103
Filed
Jul 25, 2023
Examiner
LE, THAO P
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sandisk Technologies LLC
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
2y 0m
To Grant
91%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allow Rate
740 granted / 800 resolved
+24.5% vs TC avg
Minimal -1% lift
Without
With
+-1.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
15 currently pending
Career history
815
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
40.5%
+0.5% vs TC avg
§102
42.3%
+2.3% vs TC avg
§112
3.4%
-36.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 800 resolved cases

Office Action

§102 §103
DETAILED ACTION Election/Restrictions Applicant’s election without traverse of claims 1-14 in the reply filed on 12/22/2025 is acknowledged. Information Disclosure Statement The information disclosure statement (IDS) submitted on 08/04/2025, 05/14/2024, 11/03/2023, 7/25/23 were filed after the mailing date of the application. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim 1-4, 8 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kang, U.S. Pub. 2023/0389338. Regarding claim 1, Kang discloses a device comprising: At least one alternating stack of insulating layers (ISL, Fig. 3) and electrically conductive layer (CDL, Fig. 3), memory stack structures vertically extending through the at least one alternating stack, wherein each of the memory stack structures comprises a respective vertical stack of memory elements and a vertical semiconductor channel (CHL, VRL, Fig. 3), and an electrically conductive layer contact via structure (VIS, Fig. 3) vertically extending through an upper portion of the at least one alternating stack and contacting a top surface of one of the electrically conductive layers CDL, wherein the layer contact via structure is electrically isolated from each electrically conductive layer CDL within the at least one alternating stack that overlies the one of the electrically conductive layers by a set of at least one dielectric isolation structure that comprises a first dielectric spacer, and wherein a sidewall of the layer contact via structure comprises a first straight sidewall segment (where it contacts layer CDL) that contacts a first portion of the first dielectric spacer and a first convex surface (where it contacts layer ISL) segment that contacts a concave surface of a second portion of the first dielectric spacer (See Fig. 3). Regarding claim 2, Kang disclose the top periphery of first convex surface segment is adjoined to a bottom periphery of the first straight sidewall segment (considered the first straight line and the first convex of the spacer). Regarding claim 3, Kang discloses wherein the first convex surface segment laterally protrudes outward relative to the bottom periphery of the first straight sidewall segment (Fig. 3). Regarding claim 4, Kang discloses wherein the first convex surface segment laterally protrudes outward from a periphery of an interface between the layer contact via structure and the one of the electrically conductive layers (the non-straight spacer, Fig. 3). Regarding claim 8, Kang discloses wherein the first dielectric spacer comprises a tubular dielectric spacer that laterally encloses the layer contact via structure and the tubular dielectric spacer comprises a straight cylindrical outer sidewall that vertically extends from an outer periphery of a top surface of the tubular dielectric spacer to an outer periphery of a bottom surface of the tubular dielectric spacer (Figs. 3-5). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Kang, U.S. Pub. 2023/0389338, in view of Nabesaka et al., U.S. Pub. No. 2024/0090217. Regarding claim 9, Kang fails to disclose plurality of support pillar structures vertically extending through each layer within the at least one alternating stack and contacting a respective sidewall segment of the layer contact via structure. Nabesaka discloses pillar structures 19, 49 vertically extending through each layer (Fig. 3A; Fig. 4). It would have been obvious to one having ordinary skill in the art at the time the invention was made to have pillar as disclosed in Nabesaka in the alternating stacks in structure of Kang in order to support the device. Allowable Subject Matter Claims 5-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior made of record and considered pertinent to the applicant’s disclosure does not teach or suggest the claimed limitations of claim 1, wherein at least one alternating stack comprises a plurality of alternating stacks that are stacked along the vertical direction, the set of at least one dielectric isolation structure comprises at least one additional dielectric spacer that overlies the first dielectric spacer and laterally surrounded by a respective alternating stack among the plurality of alternating stacks, and each of the at least one addition dielectric spacer has respective top surface located within a horizontal plane including a top surface of a respective alternating stack. Claims 10-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior made of record and considered pertinent to the applicant’s disclosure does not teach or suggest the claimed limitations of claims 1, 9 wherein the set of at least one dielectric isolation structure comprises at least one additional first dielectric spacer having a same vertical extend as the first dielectric spacer, and the first dielectric spacer and the at least one additional first dielectric spacer are azimuthally spaced apart around the layer contact via structure and are not in direct contact among one another. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to THAO P LE whose telephone number is (571)272-1785. The examiner can normally be reached on Monday-Friday 9AM-6PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached on 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 703-872-9306. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /THAO P LE/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Jul 25, 2023
Application Filed
Feb 21, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
91%
With Interview (-1.3%)
2y 0m
Median Time to Grant
Low
PTA Risk
Based on 800 resolved cases by this examiner. Grant probability derived from career allow rate.

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