DETAILED ACTION
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 05/07/2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Arguments
In light of applicants’ amendments to the specification and the claims, the objections are withdrawn.
Applicants’ arguments with respect to claims 1-14 have been considered but are moot based on the new grounds of rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-12 and 21-27 are rejected under 35 U.S.C. 103 as being unpatentable over PIROVANO et al. (US 20190252607 A1), hereinafter “Pirovano,” in view of REDAELLI (US 20200303463 A1), hereinafter “Redaelli.”
Re: Claim 1, Pirovano discloses a memory device (See Fig. 2), comprising:
a first electrode (Fig. 2: bottom electrode 205);
a second electrode (Fig. 2: top electrode 210);
an ovonic threshold switching material portion located between the first electrode and the second electrode (Fig. 2: 220; See ¶0046: Self-selecting memory component 220 includes chalcogenide materials, i.e., ovonic... Self-selecting memory component 220 may also serve as a selector device),
wherein a first surface of the ovonic threshold switching material portion facing the first electrode is wider than an opposing second surface of the ovonic threshold switching material portion facing the second electrode (See Figs. 2, 3A and 3B; Fig. 3B shows an embodiment wherein memory component 220 has a wider bottom surface 310 in contact with the first/bottom electrode 205 than a second surface 305, shown in Fig. 3A, which is in contact with the second/top electrode 210);
a first electrically conductive line that laterally extends along a first horizontal direction (Fig. 2: word line 110-a; ¶0031: word lines 110 and bit lines 115 may be made of conductive materials);
a second electrically conductive line that laterally extends along a second horizontal direction (Fig. 2: digit/bit line 115-a; ¶0031: word lines 110 and bit lines 115 may be made of conductive materials); and
However, Pirovano does not specifically disclose a metallic pillar structure located between and in contact with the first electrode and the first electrically conductive line, wherein the second electrode is in contact with the second electrically conductive line.
In a similar field of endeavor, Redaelli discloses a metallic pillar structure located between and in contact with the first electrode and the first electrically conductive line, wherein the second electrode is in contact with the second electrically conductive line (Fig. 2: Interlayer 260; ¶0020: interlayer includes one or more of tungsten ...; Also see ¶0026).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to have modified the Pirovano structure to have a metallic pillar, composed of a material such as Tungsten, between an electrode and a conductive line such as a word/bit-line to reduce or eliminate the reset current offset and therefore enable better management of the power consumption and maximum current that can be delivered (See Redaelli, ¶0020).
Re: claim 2, the combination of Pirovano and Redaelli discloses the memory device of claim 1.
Pirovano further discloses wherein:
the first surface of the ovonic threshold switching material portion contacts the first electrode (Fig. 3B: first surface 310 of memory component 220 contacts first/bottom electrode 210 shown in Fig. 2); and
the second surface of the ovonic threshold switching material portion contacts the second electrode (Fig. 3A: second surface 305 of memory component 220 contacts second/top electrode 205 shown in Fig. 2).
Re: claim 3, the combination of Pirovano and Redaelli discloses the memory device of claim 2.
Pirovano further discloses wherein the first electrode is located above the second electrode (Note: The first electrode is interpreted as being the electrode in contact with the wider surface of the self-selecting memory component; Figs. 3A, 3B and 4B show a self-selecting memory component that is wider at the bottom; Fig. 6A, 7A and 7B show a self-selecting memory component that is wider at the top; Therefore, Pirovano shows wherein a first electrode may be above a second electrode in an embodiment wherein the self-selecting memory component has a wider portion at the top within the cell stack.).
Re: claim 4, the combination of Pirovano and Redaelli discloses the memory device of claim 2.
Pirovano further discloses wherein the first electrode is located below the second electrode (Fig. 2 shows a first/bottom electrode 210 located below second/top electrode 205; Fig. 4B shows a first electrode 210-a in contact with the wider portion of the self-selecting memory component 220-b and a second electrode 205-a which is above the first electrode 210-a).
Re: claim 5, the combination of Pirovano and Redaelli discloses the memory device of claim 1.
Pirovano further discloses wherein the ovonic threshold switching material portion comprises a chalcogenide material (Fig. 2: 220; ¶0046: Self-selecting memory component 220 may include a chalcogenide material).
Re: claim 6, the combination of Pirovano and Redaelli discloses the memory device of claim 1.
Pirovano further discloses wherein the ovonic threshold switching material portion has a shape of a frustum (¶0050: self-selecting memory component 220-a may be a frustum).
Re: claim 7, the combination of Pirovano and Redaelli discloses the memory device of claim 6.
Pirovano further discloses wherein a tapered surface of the ovonic threshold switching material portion continuously extends from the first electrode to the second electrode (See Figs. 3A, 3B, 4B, 6A, 7A and 7B).
Re: claim 8, the combination of Pirovano and Redaelli discloses the memory device of claim 6.
Pirovano further discloses wherein the ovonic threshold switching material portion has a variable horizontal cross-sectional area that decreases with a vertical distance from the second electrode to the first electrode (See Figs. 3A and 3B).
Re: claim 9, the combination of Pirovano and Redaelli discloses the memory device of claim 8.
Pirovano further discloses wherein the ovonic threshold switching material portion has a circular or oval-shaped horizontal cross-sectional shape (¶0051: memory component 220 may have a conical shape (e.g., a taper profile having curved edges), curved profiles, etc.).
Re: claim 10, the combination of Pirovano and Redaelli discloses the memory device of claim 8.
Pirovano further discloses wherein the ovonic threshold switching material portion has a rectangular horizontal cross-sectional shape (See Figs. 3A and 3B; 0051: self-selecting memory component 220-a may be a trapezoidal shape... pyramidal shape, etc.).
Re: claim 11, the combination of Pirovano and Redaelli discloses the memory device of claim 1.
Pirovano further discloses wherein the ovonic threshold switching material portion is configured to store data (¶0024: A memory cell 105 may include a chalcogenide material, which may be referred to as a self-selecting memory component, that has a variable and configurable threshold voltage or electrical resistance, or both, that is representative of the logic states, i.e., stores data such a logic state of 0 or 1; Also see ¶0041 and ¶0059: ).
Re: claim 12, the combination of Pirovano and Redaelli discloses the memory device of claim 1.
Pirovano teaches that the self-selecting memory component has a variable threshold voltage that represents the stored logic state (¶0016: distribution of ions in memory cell affects threshold voltage). Programming with one polarity crowds ions at one electrode and produces a first threshold voltage; programming with the opposite polarity crowds ions at the other electrode and produces a second, different threshold voltage (See ¶0016, ¶0024 and ¶0032). The cell is read by applying a voltage between the electrodes and sensing which threshold (or resulting current) is present. Pirovano further teaches that a tapered/unequal-area profile increases the difference between those two threshold voltages and “enhances the sense window” (¶0016: tapered profile enhances sense window), producing greater distinctions in cell response between logic states (¶0032: crowding of ions may affect resistivity and/or threshold voltage). Therefore, an interface-area difference is expressly tied to a larger sense window. The geometry of the chalcogenide (taper, relative electrode-contact areas) is therefore taught as a parameter that modulates the magnitude of the threshold-voltage shift used to distinguish logic state “0” from “1.”
Pirovano differs from claim 12 in that it does not expressly discloses wherein the ovonic memory element has a ΔVth/Vth value of greater than 15%. The difference between the programmed high and low threshold voltages, and by extension the normalized ratio of ΔVth/Vth as defined in the present application, is a result-effect variable. Pirovano recognizes that varying the taper and the differential contact area of the self-selecting chalcogenide modulates that difference in order to improve state distinguishability and sensing accuracy.
Therefore, a person of ordinary skill in the art before the effective filing date of the current application, motivated to enlarge the sense window of a polarity-programmed self-selecting cell so that “0” and “1” remain distinguishable after drift and array variation, would have routinely varied the fabrication variables Pirovano already identifies—taper angle, relative first/second surface areas, and chalcogenide composition/thickness—to increase the relative threshold-voltage shift. Such routine optimization within the general conditions taught by Pirovano would have let to ΔVth/Vth value of greater than 15%, with reasonable expectation of success because Pirovano already teaches that those same variables increase the Vth difference. See MPEP § 2144.05(II)(“Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation” (citing In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)).
Re: Claim 21, the combination of Pirovano and Redaelli discloses the memory device of Claim 1.
Redaelli further discloses wherein the first electrode comprises one or more of a first carbon-based electrode material layer and a first metallic material layer (¶0019: electrodes can include of a variety of materials... including carbon (C) (e.g. crystalline carbon, amorphous carbon), carbon nitride (CxNy)..., metals ..., the like, or a combination thereof.).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to have modified the Pirovano structure to include electrodes composed of materials such as carbon and certain metals in order to reduce the reset current and therefore enabled better management of the power consumption and maximum current that can be delivered (See Redaelli, ¶0026.).
Re: Claim 22, the combination of Pirovano and Redaelli discloses the memory device of Claim 21.
Redaelli further discloses wherein the first electrode consists of the first carbon-based electrode material layer (¶0019: electrodes can include of a variety of materials... including carbon (C) (e.g. crystalline carbon, amorphous carbon), carbon nitride (CxNy)...).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to have modified the Pirovano structure to include electrodes composed of materials such as carbon and certain metals in order to reduce the reset current and therefore enabled better management of the power consumption and maximum current that can be delivered (See Redaelli, ¶0026.).
Re: Claim 23, the combination of Pirovano and Redaelli discloses the memory device of Claim 21.
Redaelli further discloses wherein the first electrode consists of the first metallic material layer (¶0019: electrodes can include of a variety of materials... including carbon (C) (e.g. crystalline carbon, amorphous carbon), carbon nitride (CxNy)..., metals ..., the like, or a combination thereof.).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to have modified the Pirovano structure to include electrodes composed of materials such as carbon and certain metals in order to reduce the reset current and therefore enabled better management of the power consumption and maximum current that can be delivered (See Redaelli, ¶0026.).
Re: Claim 24, the combination of Pirovano and Redaelli discloses the memory device of Claim 21.
Redaelli further discloses wherein the first electrode consists of the first carbon-based electrode material layer and the first metallic material layer (¶0019: electrodes can include of a variety of materials... including carbon (C) (e.g. crystalline carbon, amorphous carbon), carbon nitride (CxNy)..., metals ..., the like, or a combination thereof.).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to have modified the Pirovano structure to include electrodes composed of materials such as carbon and certain metals in order to reduce the reset current and therefore enabled better management of the power consumption and maximum current that can be delivered (See Redaelli, ¶0026.).
Re: Claim 25, the combination of Pirovano and Redaelli discloses the memory device of Claim 21.
Redaelli further discloses wherein the second electrode comprises one or more of a second carbon-based electrode material layer and a second metallic material layer (¶0019: electrodes can include of a variety of materials... including carbon (C) (e.g. crystalline carbon, amorphous carbon), carbon nitride (CxNy)..., metals ..., the like, or a combination thereof.).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to have modified the Pirovano structure to include electrodes composed of materials such as carbon and certain metals in order to reduce the reset current and therefore enabled better management of the power consumption and maximum current that can be delivered (See Redaelli, ¶0026.).
Re: Claim 26, the combination of Pirovano and Redaelli discloses the memory device of Claim 25.
Redaelli further discloses wherein the second electrode consists of the second carbon-based electrode material layer, or the second electrode consists of the second metallic material layer (¶0019: electrodes can include of a variety of materials... including carbon (C) (e.g. crystalline carbon, amorphous carbon), carbon nitride (CxNy)..., metals ..., the like, or a combination thereof.).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to have modified the Pirovano structure to include electrodes composed of materials such as carbon and certain metals in order to reduce the reset current and therefore enabled better management of the power consumption and maximum current that can be delivered (See Redaelli, ¶0026.).
Re: Claim 27, the combination of Pirovano and Redaelli discloses the memory device of Claim 25.
Redaelli further discloses wherein the second electrode consists of the second carbon-based electrode material layer and the second metallic material layer (¶0019: electrodes can include of a variety of materials... including carbon (C) (e.g. crystalline carbon, amorphous carbon), carbon nitride (CxNy)..., metals ..., the like, or a combination thereof.).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to have modified the Pirovano structure to include electrodes composed of materials such as carbon and certain metals in order to reduce the reset current and therefore enabled better management of the power consumption and maximum current that can be delivered (See Redaelli, ¶0026.).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over PIROVANO et al. (US 20190252607 A1).
Re: Independent Claim 14, Pirovano discloses a method of operating the memory device of claim 1, comprising:
programming the ovonic threshold switching material portion to store data by applying a programming voltage between the first electrode and the second electrode (¶0035: A memory cell 105 may be programmed, or written, by similarly activating the relevant word line 110 and digit line 115—i.e., a logic value may be stored in the memory cell 105... Depending on the logic state written to memory cell 105—e.g., logic “1” or logic “0”— ions may crowd at or near a particular electrode.); and
reading the data stored in the ovonic threshold switching material portion by applying a read voltage between the first electrode and the second electrode (¶0038: The memory controller 140 may control the operation (read, write, re-write, refresh, discharge, etc.) of memory cells 105... Memory controller 140 may also generate and control various voltages or currents used during the operation of memory array 100. For example, it may apply discharge voltages to a word line 110 or digit line 115 after accessing one or more memory cells 105.).
However, Pirovano does not specifically disclose wherein the ovonic memory element has a ΔVth/Vth value of greater than 15%.
Pirovano teaches that the self-selecting memory component has a variable threshold voltage that represents the stored logic state (¶0016: distribution of ions in memory cell affects threshold voltage). Programming with one polarity crowds ions at one electrode and produces a first threshold voltage; programming with the opposite polarity crowds ions at the other electrode and produces a second, different threshold voltage (See ¶0016, ¶0024 and ¶0032). The cell is read by applying a voltage between the electrodes and sensing which threshold (or resulting current) is present. Pirovano further teaches that a tapered/unequal-area profile increases the difference between those two threshold voltages and “enhances the sense window” (¶0016: tapered profile enhances sense window), producing greater distinctions in cell response between logic states (¶0032: crowding of ions may affect resistivity and/or threshold voltage). Therefore, an interface-area difference is expressly tied to a larger sense window. The geometry of the chalcogenide (taper, relative electrode-contact areas) is therefore taught as a parameter that modulates the magnitude of the threshold-voltage shift used to distinguish logic state “0” from “1.”
Pirovano differs from claim 12 in that it does not expressly discloses wherein the ovonic memory element has a ΔVth/Vth value of greater than 15%. The difference between the programmed high and low threshold voltages, and by extension the normalized ratio of ΔVth/Vth as defined in the present application, is a result-effect variable. Pirovano recognizes that varying the taper and the differential contact area of the self-selecting chalcogenide modulates that difference in order to improve state distinguishability and sensing accuracy.
Therefore, a person of ordinary skill in the art before the effective filing date of the current application, motivated to enlarge the sense window of a polarity-programmed self-selecting cell so that “0” and “1” remain distinguishable after drift and array variation, would have routinely varied the fabrication variables Pirovano already identifies—taper angle, relative first/second surface areas, and chalcogenide composition/thickness—to increase the relative threshold-voltage shift. Such routine optimization within the general conditions taught by Pirovano would have let to ΔVth/Vth value of greater than 15%, with reasonable expectation of success because Pirovano already teaches that those same variables increase the Vth difference. See MPEP § 2144.05(II)(“Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation” (citing In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
REDAELLI et al. (US 20180315475 A1) – Fig. 3 shows self-selecting memory cells 105 with tapered profiles. Also see Figs. 7 and 8 for different tapered structural embodiments.
GEALY et al. (US 20150123066 A1) – ¶0014 discloses that chalcogenides readily reach with tungsten (W) and molybdenum (Mo) at elevated temperatures and that tungsten is known to reduce interface resistance between C and various GST-based phase-change memory materials which is relevant to the metallic pillar (tungsten) structure claimed in the current application.
BERNHARDT et al. (US 20170263862 A1) – Figs. 3C-3G show memory cell arrangements including chalcogenides and a conductive hard mask (i.e., metallic pillar structure); See ¶0017: hard mask has desirable characteristics; ¶0019: conductive hard mask.
REDAELLI et al. (US 20190252605 A1) – See Figs. 4D-4F which show a conductive material 420 which may be relevant to the metallic pillar structure in the current claims. ¶0092: carbon or tungsten conductive materials.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/WILLIAM ADROVEL/Examiner, Art Unit 2898
/Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
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