Prosecution Insights
Last updated: July 17, 2026
Application No. 18/361,061

ELECTROLYTIC CAPACITORS HAVING ENCLOSURES THAT ENABLE THE CAPACITORS TO BE SURFACE MOUNTED TO A SUBSTRATE

Non-Final OA §102§103
Filed
Jul 28, 2023
Priority
Jun 01, 2023 — provisional 63/505,629
Examiner
DINH, TUAN T
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
SanDisk Technologies Inc.
OA Round
3 (Non-Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
930 granted / 1181 resolved
+10.7% vs TC avg
Strong +22% interview lift
Without
With
+22.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
30 currently pending
Career history
1221
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
65.0%
+25.0% vs TC avg
§102
17.5%
-22.5% vs TC avg
§112
1.9%
-38.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1181 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Note: an aluminum electrolytic capacitor can be either a liquid (wet) or a solid type. Electrolytic capacitor leads (or pins) are predominantly made of tin-plated copper-clad steel (CP wire) or tinned copper wire. The capacitance of the lead or pin of an electrolytic capacitor is a stray (or parasitic) capacitance, typically measuring between 1pF to 10pF. PNG media_image1.png 1 1 media_image1.png Greyscale A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/11/26 has been entered. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 9-13, 15-16, and 18-22 is/are rejected under 35 U.S.C. 102a(1) as being anticipated by Novacek (U.S. Patent 4,763,227), hereafter Novacek. As to claim 9, Novacek discloses an electrolytic capacitor (30) for a semiconductor package, as shown in figures 4-8 comprising: a first lead (36 or 46) and a second lead (38 or 48), extending from a proximal end of the electrolytic capacitor (30); the electrolytic capacitor including a capacitor housing (the housing is formed below the element 31); and an enclosure (31) separate from and surrounding at least a distal end of the capacitor housing of the electrolytic capacitor, the enclosure (31) defining a non-electrical support bar (34 or 44), wherein the first and second leads (36, 38 or 46, 48) are electrically coupleable to solder pads (copper lands, column 1, line 53+) provided on a surface of a printed circuit board (32) and the non-electrical support bar (34 or 44) is coupleable to a support pad (copper lands, column 1, line 53+) provided on the surface of the printed circuit board (32) to provide mechanical support for the electrolytic capacitor when the electrolytic capacitor is coupled to the printed circuit board (32). As to claims 10 and 12, Novacek discloses the aluminum electrolytic capacitor is a liquid electrolytic capacitor or a solid electrolytic capacitor. As to claim 11, Novacek discloses the enclosure (31) comprises a thermal isolation material (aluminum). As to claim 13, Novacek discloses the support bar (34 or 44) is comprised of one or more of copper and tin, the EC-CAP having the leads/terminals made copper or tin. As to claim 15, Novacek discloses an electrolytic capacitor (30) for a semiconductor package, as shown in figures 4-8 comprising: a first lead (36 or 46) and a second lead (38 or 48) extending from a first end of the electrolytic capacitor (30); the electrolytic capacitor (30) including a housing means (the housing is formed below the element 31); an enclosure means (31) separate from and at least partially surrounding a second end of the electrolytic capacitor (30), the second end being opposite from the first end; and a non-electrical support means (34 or 44) extending from the surface of the enclosure means (31), wherein the first lead (36 or 46) is electrically coupleable to a first solder pad (copper lands) on a printed circuit board (32), the second lead (38 or 48) is electrically coupleable to a second solder pad (copper lands) on the printed circuit board (32), and the non-electrical support means (34 or 44) is coupleable to a support pad (copper lands) of the printed circuit board (32) to provide mechanical support for the electrolytic capacitor (30) when the electrolytic capacitor is mounted on the printed circuit board. As to claim 16, Novacek discloses the electrolytic capacitor has a capacitance of at least one-thousand (1000) microfarads (µF), the electrolytic capacitor typically ranges in value from 0.1 microfarads to 2.7 farads. As to claims 18 and 20, Novacek discloses the electrolytic capacitor is inherently a liquid electrolytic capacitor or a solid electrolytic capacitor. As to claim 19, Novacek discloses the enclosure means comprises a thermal isolation material, aluminum can. As to claim 21, Novacek discloses the first and second leads (36, 38 or 46, 48) are electrically coupleable to the first and second solder pads (solder lands) on the printed circuit board (32) respectively, and the non-electrical support means (34 or 44) is coupleable to the support pad of the printed circuit board (32) using a reflow soldering process. Regarding claim 22, Novacek disclose the enclosure means (31) completely surrounds the electrolytic capacitor and the first lead (36) and the second lead (38) extend through the enclosure means. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Novacek in view of Ryu et al. (U.S. 2021/0345489). Regarding claim 24, Novacek discloses all of the limitations of claimed invention except for the non-electrical support bar has at least one of a substantially flat profile and a rectangular shape. Ryu teaches a horizontally mounted capacitor module (100) as shown in figures 5-7 comprising the non-electrical support bar (121c) has at least one of a substantially flat profile and a rectangular shape. It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Ryu employed in the electrolytic capacitor (EC) of Novacek in order to reduce mounting or connecting space structure. Claim(s) 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Novacek in view of Kuriyama (U.S. Patent 7,729,102). Regarding claim 25, Novacek discloses all of the limitations of claimed invention except for the first lead and the second lead are each arranged in a Z-shaped configuration comprising a first portion extending from the proximal end of the electrolytic capacitor, a second portion extending from the first portion, and a third portion extending from the second portion and configured to be coupled to the solder pads on the surface of the printed circuit board. Kuriyama teaches a solid electrolytic capacitor (1) as shown in figures 8-11 comprising the first and second leads (T2 or 7) are each arranged in a Z-shaped (figure 8) configuration comprising a first portion extending from the proximal end of the electrolytic capacitor (1), a second portion extending from the first portion, and a third portion extending from the second portion and configured to be coupled to the solder pads (12, 13) on the surface of the printed circuit board (10). It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Kuriyama employed in the electrolytic capacitor (EC) of Novacek in order to reduce force for mounting connection structure. Claim(s) 1-4, 6-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ryu in view of Novacek, the references cited as above. As to claim 1, Ryu discloses a semiconductor package, para-0023+ as shown in figures 1-2, and 5-6, comprising: a substrate (PCB, para-0023+) defining an opening, para-0048; a pair of solder pads (Ta-Tb) provided on a surface of the substrate (PCB) at a proximal side of the opening, see figure 6B; a support pad (Tc) provided on the surface of the substrate (PCB) at a distal side of the opening opposite from the pair of solder pads (Ta-Tb); an electrolytic capacitor (EC, capacitor module 100 having electrolytic capacitor 110) horizontally disposed within the opening of the substrate (PCB) and comprising a first lead (121a) extending from a first side of the electrolytic capacitor and electrically coupled to a first solder pad (Ta) of the pair of solder pads and a second lead (121b) extending from the first side of the electrolytic capacitor and electrically coupled to a second solder pad (Tb) of the pair of solder pads; and a non-electrical support pin (121c) extending from a surface of the body of the capacitor module 100, the non-electrical support pin (121c) extending opposite the first side of the electrolytic capacitor and coupled to the support pad (Tc) to provide mechanical support to the electrolytic capacitor disposed within the opening of the substrate (PCB). Ryu does not specifically disclose an enclosure separate from, and at least partial surrounding a housing of the EC (100). Novacek teaches an aluminum EC (30) as shown in figures 4-8 comprising an enclosure (outer housing 31) separate from, and at least partial surrounding a housing (inner housing formed below the element 31) of the EC (30). It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Novacek employed in the electrolytic capacitor (EC) of Ryu in order to provide excellent protect and heat dissipation structure for the EC. Regarding claims 2 and 4, Ryu as modified by Novacek discloses the electrolytic capacitor (100) is one of a liquid electrolytic capacitor and a solid electrolytic capacitor. Regarding claim 3, Ryu as modified by Novacek teaches the enclosure (31) comprises a thermal isolation material (the aluminum), and wherein when the enclosure (31) comprises the thermal isolation material, the enclosure substantially surrounds the electrolytic capacitor (30). Regarding claim 6, Ryu as modified by Novacek discloses the non-electrical support pin (121c) is comprised of one or more of copper and tin, the EC-CAP having the leads/terminals made copper or tin. As to claim 7, Ryu as modified by Novacek discloses the first and second leads (121a, 121b) are electrically coupleable to the first and second solder pads (Ta, Tb) on the substrate (PCB) respectively, and the non-electrical support means (121c) is coupleable to the support pad (Tc) of the substrate (PCB) using a reflow soldering process. Response to Arguments Applicant’s arguments with respect to claim(s) 1-4, 6-7, 9-13, 15-16, 18-22, and 24-25 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUAN T DINH whose telephone number is (571)272-1929. The examiner can normally be reached 8am-5pm, M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUAN T DINH/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Show 3 earlier events
Oct 10, 2025
Applicant Interview (Telephonic)
Oct 14, 2025
Response Filed
Feb 09, 2026
Final Rejection mailed — §102, §103
Apr 10, 2026
Applicant Interview (Telephonic)
Apr 14, 2026
Examiner Interview Summary
May 11, 2026
Request for Continued Examination
May 13, 2026
Response after Non-Final Action
May 21, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12666552
HOUSING PART, ESPECIALLY HOUSING PART IN PARTICULAR FOR AN ELECTRONIC HOUSING, SUCH AS AN E-COMPRESSOR TERMINAL
3y 5m to grant Granted Jun 23, 2026
Patent 12660157
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
2y 4m to grant Granted Jun 16, 2026
Patent 12641727
ELECTRONIC DEVICE
2y 3m to grant Granted May 26, 2026
Patent 12641725
PRINTED CIRCUIT BOARD OVER PRINTED CIRCUIT BOARD ASSEMBLY
2y 5m to grant Granted May 26, 2026
Patent 12635588
SEMICONDUCTOR DEVICE AND CIRCUIT BOARD
2y 8m to grant Granted May 19, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+22.3%)
2y 11m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 1181 resolved cases by this examiner. Grant probability derived from career allowance rate.

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