Prosecution Insights
Last updated: April 19, 2026
Application No. 18/361,909

DISPLAY DEVICE AND DISPLAY SYSTEM

Non-Final OA §102§103
Filed
Jul 31, 2023
Examiner
HENRY, CALEB E
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Magnolia White Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
93%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
1052 granted / 1217 resolved
+18.4% vs TC avg
Moderate +6% lift
Without
With
+6.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
48 currently pending
Career history
1265
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
49.8%
+9.8% vs TC avg
§102
36.3%
-3.7% vs TC avg
§112
11.2%
-28.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1217 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 2 and 5 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Suzumura (20210109412). PNG media_image1.png 452 657 media_image1.png Greyscale Regarding claim 1, Suzumura teaches an display device comprising: an array substrate (fig. 1-4: AR); and a counter substrate (fig. 1-4: CT) facing the array substrate, wherein the array substrate includes a plurality of signal lines (please see fig. 1-4, specifically fig. 3, which shows signal lines overlapping, and perpendicular, to scanning lines) arranged at an interval in a first direction, a plurality of scanning lines (please see fig. 1-4, specifically fig. 3, which shows scanning lines overlapping, and perpendicular, to signal lines) arranged at an interval in a second direction, a color filter (please see fig. 1-4, specifically fig. 4, which shows CF) disposed at a position overlapping an opening (please see fig. 4 which shows CF overlapping the opening between switching elements) surrounded by two of the signal lines adjacent to each other and two of the scanning lines adjacent to each other (please see fig. 3 which shows between switching elements, wherein CF is placed, multiple signal lines and multiple scan lines cross each other), a plurality of pixel electrodes (please see fig. 1-4, specifically fig. 4, which shows PE) disposed for respective pixels, a common electrode (please see fig. 1-4, specifically fig. 4, which shows CE1) superimposed on the pixel electrodes with an insulating film (please see fig. 1-4, specifically fig. 4, which shows OI) interposed between the common electrode and the pixel electrodes, a conductive layer (fig. 9: CE2) having a lattice shape and overlapping the signal lines and the scanning lines in plan view (please see fig. 9 which shows CE2 being lattice shape above and overlapping signal lines and scan lines), a light interference thin film (please see fig. 1-4, specifically fig. 4, which shows CN1), being translucent and provided on the conductive layer along the conductive layer (par. 91 teaches that CN1 can be made of ITO which is known to not be completely transparent; while ITO is optically clear, the material has a slight yellow tint and can reflect certain EM), and a metal thin film (please see fig. 1-4, specifically fig. 4, which shows ME) provided on the light interference thin film along the conductive layer (par. 104 teaches ME being a metal layer and can be seen on CN1 along CE2). Regarding claim 2, Suzumura teaches an display device according to claim 1, wherein the common electrode covers the metal thin film (please see fig. 4 and 9). Regarding claim 5, Suzumura teaches an display device according to claim 1, wherein the counter substrate has a display region and a peripheral region around the display region (please see fig. 1-4), a light-shielding layer is provided in the peripheral region of the counter substrate (par. 49, 56, 60 and 95), and no light-shielding layer is provided in the display region of the counter substrate (par. 49, 56, 60 and 95). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 6, 7 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Suzumura (20210109412), in view of Uehara (20090243971). Regarding claim 6, Suzumura teaches an display device comprising: an array substrate (fig. 1-4: AR); and a counter substrate (fig. 1-4: CT) facing the array substrate, wherein the array substrate includes a plurality of signal lines (please see fig. 1-4, specifically fig. 3, which shows signal lines overlapping, and perpendicular, to scanning lines) arranged at an interval in a first direction, a plurality of scanning lines (please see fig. 1-4, specifically fig. 3, which shows scanning lines overlapping, and perpendicular, to signal lines) arranged at an interval in a second direction, a color filter (please see fig. 1-4, specifically fig. 4, which shows CF) disposed at a position overlapping an opening (please see fig. 4 which shows CF overlapping the opening between switching elements) surrounded by two of the signal lines adjacent to each other and two of the scanning lines adjacent to each other (please see fig. 3 which shows between switching elements, wherein CF is placed, multiple signal lines and multiple scan lines cross each other), a plurality of pixel electrodes (please see fig. 1-4, specifically fig. 4, which shows PE) disposed for respective pixels, a common electrode (please see fig. 1-4, specifically fig. 4, which shows CE1) superimposed on the pixel electrodes with an insulating film (please see fig. 1-4, specifically fig. 4, which shows OI) interposed between the common electrode and the pixel electrodes, a conductive layer (fig. 9: CE2) having a lattice shape and overlapping the signal lines and the scanning lines in plan view (please see fig. 9 which shows CE2 being lattice shape above and overlapping signal lines and scan lines), a light interference thin film (please see fig. 1-4, specifically fig. 4, which shows CN1), being translucent and provided on the conductive layer along the conductive layer (par. 91 teaches that CN1 can be made of ITO which is known to not be completely transparent; while ITO is optically clear, the material has a slight yellow tint and can reflect certain EM), and a metal thin film (please see fig. 1-4, specifically fig. 4, which shows ME) provided on the light interference thin film along the conductive layer (par. 104 teaches ME being a metal layer and can be seen on CN1 along CE2). Suzumura fails to teach an display a lens a display device including a display region visually recognized through the lens Uehara teaches a LCD with a lenticular lens atop the display device wherein the lens, taught Uehara, allows for the switching between two modes: angle limited mode and normal display mode. Further, as taught in Uehara, the display device contents can be visually recognized from a wide-angle range by using this particular type of lens (par. 232). Thus, the TSM in Uehara would have led a PHOSITA to modify Suzumura to arrive at the claimed invention. Thus, it would have been obvious to a PHOSITA, at the time of filing, to utilize aforementioned teachings of the prior art(s) in the primary prior art(s) due to aforementioned reason(s). Regarding claim 7, Suzumura, in view of Uehara, teaches an display system according to claim 6, wherein the common electrode covers the metal thin film (please see fig. 4 and 9). Regarding claim 10, Suzumura, in view of Uehara, teaches an display system according to claim 6, wherein the counter substrate has a display region and a peripheral region around the display region (please see fig. 1-4), a light-shielding layer is provided in the peripheral region of the counter substrate (par. 49, 56, 60 and 95), and no light-shielding layer is provided in the display region of the counter substrate (par. 49, 56, 60 and 95). Allowable Subject Matter Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 4 is objected to based on its dependency on claim 3. Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 9 is objected to based on its dependency on claim 8. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEB E HENRY whose telephone number is (571)270-5370. The examiner can normally be reached Mon-Fri. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CALEB E HENRY/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Jul 31, 2023
Application Filed
Jan 16, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
93%
With Interview (+6.2%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 1217 resolved cases by this examiner. Grant probability derived from career allow rate.

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